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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Xu Yilun <yilun.xu@intel.com>
Cc: matthew.gerlach@linux.intel.com, hao.wu@intel.com,
	russell.h.weight@intel.com, basheer.ahmed.muddebihal@intel.com,
	trix@redhat.com, mdf@kernel.org, linux-fpga@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	tianfei.zhang@intel.com, corbet@lwn.net,
	gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
	jirislaby@kernel.org, geert+renesas@glider.be,
	niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk,
	johan@kernel.org, lukas@wunner.de, ilpo.jarvinen@linux.intel.com,
	marpagan@redhat.com, bagasdotme@gmail.com
Subject: Re: [PATCH v10 3/4] fpga: dfl: add basic support for DFHv1
Date: Thu, 12 Jan 2023 12:27:13 +0200	[thread overview]
Message-ID: <Y7/ggajPS2WNrPPU@smile.fi.intel.com> (raw)
In-Reply-To: <Y74bSzUBLYH4cLDh@yilunxu-OptiPlex-7050>

On Wed, Jan 11, 2023 at 10:13:31AM +0800, Xu Yilun wrote:
> On 2023-01-10 at 14:07:16 -0800, matthew.gerlach@linux.intel.com wrote:
> > On Tue, 10 Jan 2023, Andy Shevchenko wrote:
> > > On Mon, Jan 09, 2023 at 04:30:28PM -0800, matthew.gerlach@linux.intel.com wrote:
> > > > From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

...

> > > > v10: change dfh_find_param to return size of parameter data in bytes
> > > 
> > > The problem that might occur with this approach is byte ordering.
> > > When we have u64 items, we know that they all are placed in CPU
> > > ordering by the bottom layer. What's the contract now? Can it be
> > > a problematic? Please double check this (always keep in mind BE32
> > > as most interesting case for u64/unsigned long representation and
> > > other possible byte ordering outcomes).
> > 
> > A number of u64 items certainly states explicit alignment of the memory, but
> > I think byte ordering is a different issue.
> > 
> > The bottom layer, by design, is still enforcing a number u64 items under the
> > hood. So the contract has not changed. Changing units of size from u64s to
> > bytes was suggested to match the general practice of size of memory being in
> > bytes. I think the suggestion was made because the return type for
> > dfh_find_param() changed from u64* to void* in version 9, when indirectly
> > returning the size of the parameter data was introduced.  So a void * with a
> > size in bytes makes sense. On the other hand, returning a u64 * is a more
> > precise reflection of the data alignment. I think the API should be as
> 
> I prefer (void *) + bytes. The properties in the parameter block are not
> guarateed to be u64 for each, e.g. the REG_LAYOUT, so (void *) could better
> indicate it is not. It is just a block of data unknown to DFL core and to
> be parsed by drivers.

If the hardware / protocol is capable of communicating the arbitrary lengths
of parameters, then yes, bytes make sense. But this should be clear what byte
ordering is there if the items can be words / dwords / qwords.

TL;DR: The Q is: Is the parameter block a byte stream? If yes, then your
proposal is okay. If no, no void * should be used. In the latter it should
be union of possible items or a like as defined by a protocol.

> And why users/drivers need to care about the alignment of the parameter
> block?
> 
> > follows:

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2023-01-12 10:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-10  0:30 [PATCH v10 0/4] Enhance definition of DFH and use enhancements for UART driver matthew.gerlach
2023-01-10  0:30 ` [PATCH v10 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2023-01-10  0:30 ` [PATCH v10 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2023-01-10  0:30 ` [PATCH v10 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2023-01-10 10:21   ` Andy Shevchenko
2023-01-10 22:07     ` matthew.gerlach
2023-01-11  2:13       ` Xu Yilun
2023-01-12 10:27         ` Andy Shevchenko [this message]
2023-01-12 15:36           ` matthew.gerlach
2023-01-13  2:22             ` Xu Yilun
2023-01-13 19:05               ` matthew.gerlach
2023-01-12 15:30         ` matthew.gerlach
2023-01-10  0:30 ` [PATCH v10 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
2023-01-10 10:32   ` Andy Shevchenko
2023-01-10 22:17     ` matthew.gerlach

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