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[5.89.66.224]) by smtp.gmail.com with ESMTPSA id d20-20020adfa354000000b002bc50ba3d06sm829071wrb.9.2023.01.08.15.50.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 15:50:25 -0800 (PST) Date: Mon, 9 Jan 2023 00:50:23 +0100 From: Piergiorgio Beruto To: Andrew Lunn Cc: Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Oleksij Rempel , mailhol.vincent@wanadoo.fr, sudheer.mogilappagari@intel.com, sbhatta@marvell.com, linux-doc@vger.kernel.org, wangjie125@huawei.com, corbet@lwn.net, lkp@intel.com, gal@nvidia.com, gustavoars@kernel.org Subject: Re: [PATCH v2 net-next 4/5] drivers/net/phy: add helpers to get/set PLCA configuration Message-ID: References: <35720efb893ac9ae2667110d4c2dc2828e9d4222.1673030528.git.piergiorgio.beruto@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Sat, Jan 07, 2023 at 07:07:52PM +0100, Andrew Lunn wrote: > > +/** > > + * genphy_c45_plca_set_cfg - set PLCA configuration using standard registers > > + * @phydev: target phy_device struct > > + * @plca_cfg: structure containing the PLCA configuration. Fields set to -1 are > > + * not to be changed. > > + * > > + * Description: if the PHY complies to the Open Alliance TC14 10BASE-T1S PLCA > > + * Management Registers specifications, this function can be used to modify > > + * the PLCA configuration using the standard registers in MMD 31. > > + */ > > +int genphy_c45_plca_set_cfg(struct phy_device *phydev, > > + const struct phy_plca_cfg *plca_cfg) > > +{ > > + int ret; > > + u16 val; > > + > > + // PLCA IDVER is read-only > > + if (plca_cfg->version >= 0) > > + return -EINVAL; > > + > > + // first of all, disable PLCA if required > > + if (plca_cfg->enabled == 0) { > > + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, > > + MDIO_OATC14_PLCA_CTRL0, > > + MDIO_OATC14_PLCA_EN); > > + > > + if (ret < 0) > > + return ret; > > + } > > + > > + if (plca_cfg->node_cnt >= 0 || plca_cfg->node_id >= 0) { > > + if (plca_cfg->node_cnt < 0 || plca_cfg->node_id < 0) { > > I think it would be good to add some comments since this code is not > immediately obvious to me. I had to think about it for a while. Yes, I realize it is not very intuitive at furst glance :-) I have added a comment explaining that we need to read back the register to perform merge/pure of the configuration IFF we need to set one among node ID / node count but not both. > > > + if (plca_cfg->burst_cnt >= 0 || plca_cfg->burst_tmr >= 0) { > > + if (plca_cfg->burst_cnt < 0 || plca_cfg->burst_tmr < 0) { > > + ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, > > + MDIO_OATC14_PLCA_BURST); > > + > > This follows the same patterns, so maybe comments here as well? Yup, added the same comment. > > With that, you can add my Reviewed-by. Thanks! > > Andrew