From: Sean Christopherson <seanjc@google.com>
To: Maxim Levitsky <mlevitsk@redhat.com>
Cc: kvm@vger.kernel.org,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, Jim Mattson <jmattson@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Joerg Roedel <joro@8bytes.org>, "H. Peter Anvin" <hpa@zytor.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jonathan Corbet <corbet@lwn.net>, Borislav Petkov <bp@alien8.de>,
Ingo Molnar <mingo@redhat.com>,
"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>
Subject: Re: [PATCH 5/6] KVM: nSVM: avoid loading PDPTRs after migration when possible
Date: Mon, 5 Apr 2021 17:01:46 +0000 [thread overview]
Message-ID: <YGtCeiyzUrRbbNKG@google.com> (raw)
In-Reply-To: <20210401141814.1029036-6-mlevitsk@redhat.com>
On Thu, Apr 01, 2021, Maxim Levitsky wrote:
> if new KVM_*_SREGS2 ioctls are used, the PDPTRs are
> part of the migration state and thus are loaded
> by those ioctls.
>
> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
> ---
> arch/x86/kvm/svm/nested.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
> index ac5e3e17bda4..b94916548cfa 100644
> --- a/arch/x86/kvm/svm/nested.c
> +++ b/arch/x86/kvm/svm/nested.c
> @@ -373,10 +373,9 @@ static int nested_svm_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3,
> return -EINVAL;
>
> if (!nested_npt && is_pae_paging(vcpu) &&
> - (cr3 != kvm_read_cr3(vcpu) || pdptrs_changed(vcpu))) {
> + (cr3 != kvm_read_cr3(vcpu) || !kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR)))
> if (CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3)))
What if we ditch the optimizations[*] altogether and just do:
if (!nested_npt && is_pae_paging(vcpu) &&
CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
return -EINVAL;
Won't that obviate the need for KVM_{GET|SET}_SREGS2 since KVM will always load
the PDPTRs from memory? IMO, nested migration with shadowing paging doesn't
warrant this level of optimization complexity.
[*] For some definitions of "optimization", since the extra pdptrs_changed()
check in the existing code is likely a net negative.
> return -EINVAL;
> - }
>
> /*
> * TODO: optimize unconditional TLB flush/MMU sync here and in
next prev parent reply other threads:[~2021-04-05 17:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 14:18 [PATCH 0/6] Introduce KVM_{GET|SET}_SREGS2 and fix PDPTR migration Maxim Levitsky
2021-04-01 14:18 ` [PATCH 1/6] KVM: nVMX: delay loading of PDPTRs to KVM_REQ_GET_NESTED_STATE_PAGES Maxim Levitsky
2021-04-01 14:31 ` Paolo Bonzini
2021-04-02 17:27 ` Sean Christopherson
2021-04-06 10:22 ` Maxim Levitsky
2021-04-01 14:18 ` [PATCH 2/6] KVM: nSVM: call nested_svm_load_cr3 on nested state load Maxim Levitsky
2021-04-01 14:31 ` Paolo Bonzini
2021-04-01 14:18 ` [PATCH 3/6] KVM: x86: introduce kvm_register_clear_available Maxim Levitsky
2021-04-01 14:31 ` Paolo Bonzini
2021-04-05 17:03 ` Sean Christopherson
2021-04-01 14:18 ` [PATCH 4/6] KVM: x86: Introduce KVM_GET_SREGS2 / KVM_SET_SREGS2 Maxim Levitsky
2021-04-01 14:44 ` Paolo Bonzini
2021-04-01 17:10 ` Maxim Levitsky
2021-04-01 17:33 ` Paolo Bonzini
2021-04-01 14:18 ` [PATCH 5/6] KVM: nSVM: avoid loading PDPTRs after migration when possible Maxim Levitsky
2021-04-05 17:01 ` Sean Christopherson [this message]
2021-04-06 10:12 ` Maxim Levitsky
2021-04-01 14:18 ` [PATCH 6/6] KVM: nVMX: " Maxim Levitsky
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