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[180.214.233.78]) by smtp.gmail.com with ESMTPSA id n68-20020a622747000000b0053e599d7032sm2467023pfn.54.2022.09.10.20.25.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Sep 2022 20:25:03 -0700 (PDT) Received: by debian.me (Postfix, from userid 1000) id F3C40103990; Sun, 11 Sep 2022 10:24:58 +0700 (WIB) Date: Sun, 11 Sep 2022 10:24:58 +0700 From: Bagas Sanjaya To: alexlzhu@fb.com Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Kernel-team@fb.com Subject: Re: [PATCH] docs/mm: Improve grammar on mmu_notifier documentation Message-ID: References: <20220908001948.3014216-1-alexlzhu@fb.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="krJoGUX3JHCMjCSM" Content-Disposition: inline In-Reply-To: <20220908001948.3014216-1-alexlzhu@fb.com> Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org --krJoGUX3JHCMjCSM Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 07, 2022 at 05:19:48PM -0700, alexlzhu@fb.com wrote: > @@ -86,14 +87,13 @@ they are write protected for COW (other case of B app= ly too). > CPU-thread-3 {} > DEV-thread-0 {read addrA from old page} > DEV-thread-2 {read addrB from new page} > - > -So here because at time N+2 the clear page table entry was not pair with= a > -notification to invalidate the secondary TLB, the device see the new val= ue for > -addrB before seeing the new value for addrA. This break total memory ord= ering > +Here because at time N+2 the clear page table entry was not paired with a > +notification to invalidate the secondary TLB, the device sees the new va= lue for > +addrB before seeing the new value for addrA. This breaks total memory or= dering You remove the blank line separator between the code block and paragraph, which kernel test robot (and Sphinx) complains; so you need to keep it: ---- >8 ---- diff --git a/Documentation/mm/mmu_notifier.rst b/Documentation/mm/mmu_notif= ier.rst index e22b591fc4061f..751b6eaf456e52 100644 --- a/Documentation/mm/mmu_notifier.rst +++ b/Documentation/mm/mmu_notifier.rst @@ -87,6 +87,7 @@ they are write protected for COW (other case of B applies= as well). CPU-thread-3 {} DEV-thread-0 {read addrA from old page} DEV-thread-2 {read addrB from new page} + Here because at time N+2 the clear page table entry was not paired with a notification to invalidate the secondary TLB, the device sees the new valu= e for addrB before seeing the new value for addrA. This breaks total memory orde= ring Thanks. --=20 An old man doll... just what I always wanted! - Clara --krJoGUX3JHCMjCSM Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCYx1VBAAKCRD2uYlJVVFO o++dAP4pXGa5ossOKkNSjQEYDTxVMhNZLYZFSt1AhiC7OJFvMgEA3Iab+k8i32LL lv3y50CVIQ9rO8sDKawhraNWAXzzngc= =vpHt -----END PGP SIGNATURE----- --krJoGUX3JHCMjCSM--