* [PATCH 1/3] arm64: add FEAT_MTE_TAGGED_FAR feature
2025-04-03 14:15 [PATCH 0/3] support FEAT_MTE_TAGGED_FAR feature Yeoreum Yun
@ 2025-04-03 14:15 ` Yeoreum Yun
2025-04-03 15:13 ` Mark Brown
2025-04-03 14:15 ` [PATCH 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported Yeoreum Yun
2025-04-03 14:15 ` [PATCH 3/3] Documentation/arm64: reflects FEAT_MTE_TAGGED_FAR description Yeoreum Yun
2 siblings, 1 reply; 8+ messages in thread
From: Yeoreum Yun @ 2025-04-03 14:15 UTC (permalink / raw)
To: catalin.marinas, will, broonie, anshuman.khandual, joey.gouly,
yury.khrustalev, maz, oliver.upton, frederic,
shameerali.kolothum.thodi, james.morse, mark.rutland,
huangxiaojia2, akpm, surenb, robin.murphy
Cc: linux-arm-kernel, linux-kernel, linux-doc, Yeoreum Yun
Add FEAT_MTE_TAGGED_FAR cpucap which makes FAR_ELx report
all non-address bits on a synchronous MTE tag check fault since Armv8.9
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
---
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 9 +++++++++
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/tools/cpucaps | 1 +
5 files changed, 13 insertions(+)
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 1c3f9617d54f..28dd1ac29ecc 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -176,6 +176,7 @@
#define KERNEL_HWCAP_POE __khwcap2_feature(POE)
#define __khwcap3_feature(x) (const_ilog2(HWCAP3_ ## x) + 128)
+#define KERNEL_HWCAP_MTE_FAR __khwcap3_feature(MTE_FAR)
/*
* This yields a mask that user programs can use to figure out what
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index 705a7afa8e58..7d22527a7975 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -143,5 +143,6 @@
/*
* HWCAP3 flags - for AT_HWCAP3
*/
+#define HWCAP3_MTE_FAR (1UL << 0)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 9c4d6d552b25..183b4b7e3074 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -312,6 +312,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {
static const struct arm64_ftr_bits ftr_id_aa64pfr2[] = {
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_FPMR_SHIFT, 4, 0),
+ ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI),
ARM64_FTR_END,
};
@@ -2861,6 +2862,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.matches = has_cpuid_feature,
ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, MTE, MTE3)
},
+ {
+ .desc = "FAR on MTE Tag Check Fault",
+ .capability = ARM64_MTE_FAR,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .matches = has_cpuid_feature,
+ ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTEFAR, IMP)
+ },
#endif /* CONFIG_ARM64_MTE */
{
.desc = "RCpc load-acquire (LDAPR)",
@@ -3191,6 +3199,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
#ifdef CONFIG_ARM64_MTE
HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE),
HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3),
+ HWCAP_CAP(ID_AA64PFR2_EL1, MTEFAR, IMP, CAP_HWCAP, KERNEL_HWCAP_MTE_FAR),
#endif /* CONFIG_ARM64_MTE */
HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV),
HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP),
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 285d7d538342..e2b13454e38a 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -160,6 +160,7 @@ static const char *const hwcap_str[] = {
[KERNEL_HWCAP_SME_SFEXPA] = "smesfexpa",
[KERNEL_HWCAP_SME_STMOP] = "smestmop",
[KERNEL_HWCAP_SME_SMOP4] = "smesmop4",
+ [KERNEL_HWCAP_MTE_FAR] = "mte_far",
};
#ifdef CONFIG_COMPAT
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index 772c1b008e43..ef62ea04ba37 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -67,6 +67,7 @@ MPAM
MPAM_HCR
MTE
MTE_ASYMM
+MTE_FAR
SME
SME_FA64
SME2
--
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported
2025-04-03 14:15 [PATCH 0/3] support FEAT_MTE_TAGGED_FAR feature Yeoreum Yun
2025-04-03 14:15 ` [PATCH 1/3] arm64: add " Yeoreum Yun
@ 2025-04-03 14:15 ` Yeoreum Yun
2025-04-03 14:15 ` [PATCH 3/3] Documentation/arm64: reflects FEAT_MTE_TAGGED_FAR description Yeoreum Yun
2 siblings, 0 replies; 8+ messages in thread
From: Yeoreum Yun @ 2025-04-03 14:15 UTC (permalink / raw)
To: catalin.marinas, will, broonie, anshuman.khandual, joey.gouly,
yury.khrustalev, maz, oliver.upton, frederic,
shameerali.kolothum.thodi, james.morse, mark.rutland,
huangxiaojia2, akpm, surenb, robin.murphy
Cc: linux-arm-kernel, linux-kernel, linux-doc, Yeoreum Yun
Use the original FAR_EL1 value when an MTE tag check fault occurs,
if ARM64_MTE_FAR is supported.
This allows reports to include not only the logical tag (memory tag)
but also the address tag information.
Applications that require this information should install a signal handler with
the SA_EXPOSE_TAGBITS flag.
While this introduces a minor ABI change,
most applications do not set this flag and therefore will not be affected.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
---
arch/arm64/mm/fault.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index ec0a337891dd..8d10603e574f 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -837,9 +837,12 @@ static int do_tag_check_fault(unsigned long far, unsigned long esr,
/*
* The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
* for tag check faults. Set them to corresponding bits in the untagged
- * address.
+ * address if ARM64_MTE_FAR doesn't support.
+ * Otherwise, bits 63:60 of FAR_EL1 are KNOWN.
*/
- far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
+ if (!cpus_have_cap(ARM64_MTE_FAR))
+ far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
+
do_bad_area(far, esr, regs);
return 0;
}
--
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 3/3] Documentation/arm64: reflects FEAT_MTE_TAGGED_FAR description
2025-04-03 14:15 [PATCH 0/3] support FEAT_MTE_TAGGED_FAR feature Yeoreum Yun
2025-04-03 14:15 ` [PATCH 1/3] arm64: add " Yeoreum Yun
2025-04-03 14:15 ` [PATCH 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported Yeoreum Yun
@ 2025-04-03 14:15 ` Yeoreum Yun
2025-04-03 15:31 ` Mark Brown
2 siblings, 1 reply; 8+ messages in thread
From: Yeoreum Yun @ 2025-04-03 14:15 UTC (permalink / raw)
To: catalin.marinas, will, broonie, anshuman.khandual, joey.gouly,
yury.khrustalev, maz, oliver.upton, frederic,
shameerali.kolothum.thodi, james.morse, mark.rutland,
huangxiaojia2, akpm, surenb, robin.murphy
Cc: linux-arm-kernel, linux-kernel, linux-doc, Yeoreum Yun
When FEAT_MTE_TAGGED_FAR feature is supported, the value of address bits
[63:60] is preserved on synchronous tag check fault.
This patch reflects the above feature in the documentation.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
---
Documentation/arch/arm64/tagged-pointers.rst | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/Documentation/arch/arm64/tagged-pointers.rst b/Documentation/arch/arm64/tagged-pointers.rst
index 81b6c2a770dd..73c59a9c7a63 100644
--- a/Documentation/arch/arm64/tagged-pointers.rst
+++ b/Documentation/arch/arm64/tagged-pointers.rst
@@ -60,11 +60,12 @@ that signal handlers in applications making use of tags cannot rely
on the tag information for user virtual addresses being maintained
in these fields unless the flag was set.
-Due to architecture limitations, bits 63:60 of the fault address
-are not preserved in response to synchronous tag check faults
-(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should
-treat the values of these bits as undefined in order to accommodate
-future architecture revisions which may preserve the bits.
+If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault address
+are preserved in response to synchronous tag check faults (SEGV_MTESERR)
+otherwise not preserved even if SA_EXPOSE_TAGBITS was set.
+Applications should interpret the values of these bits based on
+the support for the 'mte_far' hwcap. If the support is not present,
+the values of these bits should be considered as undefined otherwise valid.
For signals raised in response to watchpoint debug exceptions, the
tag information will be preserved regardless of the SA_EXPOSE_TAGBITS
--
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}
^ permalink raw reply related [flat|nested] 8+ messages in thread