From: Vinod Koul <vkoul@kernel.org>
To: Bartosz Golaszewski <brgl@bgdev.pl>
Cc: Thara Gopinath <thara.gopinath@gmail.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Jonathan Corbet <corbet@lwn.net>,
Md Sadre Alam <quic_mdalam@quicinc.com>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
linux-doc@vger.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v7 1/8] dmaengine: add DMA_PREP_LOCK and DMA_PREP_UNLOCK flag
Date: Sun, 30 Mar 2025 21:50:49 +0530 [thread overview]
Message-ID: <Z+lvYUeAElcW5uNl@vaman> (raw)
In-Reply-To: <20250311-qce-cmd-descr-v7-1-db613f5d9c9f@linaro.org>
On 11-03-25, 10:25, Bartosz Golaszewski wrote:
> From: Md Sadre Alam <quic_mdalam@quicinc.com>
>
> Add lock and unlock flags for the command descriptor. With the former set
> in the requester pipe, the bam controller will lock all other pipes and
> process the request only from requester pipe. Unlocking can only be
> performed from the same pipe.
>
> Setting the DMA_PREP_LOCK/DMA_PREP_UNLOCK flags in the command
> descriptor means, the caller requests the BAM controller to be locked
> for the duration of the transaction. In this case the BAM driver must
> set the LOCK/UNLOCK bits in the HW descriptor respectively.
>
> Only BAM IPs version 1.4.0 and above support the LOCK/UNLOCK feature.
>
> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
> [Bartosz: reworked the commit message]
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
> Documentation/driver-api/dmaengine/provider.rst | 15 +++++++++++++++
> include/linux/dmaengine.h | 6 ++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst
> index 3085f8b460fa..a032e55d0a4f 100644
> --- a/Documentation/driver-api/dmaengine/provider.rst
> +++ b/Documentation/driver-api/dmaengine/provider.rst
> @@ -628,6 +628,21 @@ DMA_CTRL_REUSE
> - This flag is only supported if the channel reports the DMA_LOAD_EOT
> capability.
>
> +- DMA_PREP_LOCK
> +
> + - If set, the DMA will lock all other pipes not related to the current
> + pipe group, and keep handling the current pipe only.
> +
> + - All pipes not within this group will be locked by this pipe upon lock
> + event.
> +
> + - only pipes which are in the same group and relate to the same Environment
> + Execution(EE) will not be locked by a certain pipe.
This does not make sense for me in generic context... Pipes and EEs are
implementation details... Please generalise the description for a
dma controller...
--
~Vinod
next prev parent reply other threads:[~2025-03-30 16:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 9:25 [PATCH v7 0/8] dmaengine: qcom: bam_dma: add command descriptor support Bartosz Golaszewski
2025-03-11 9:25 ` [PATCH v7 1/8] dmaengine: add DMA_PREP_LOCK and DMA_PREP_UNLOCK flag Bartosz Golaszewski
2025-03-11 15:59 ` Dmitry Baryshkov
2025-03-30 16:20 ` Vinod Koul [this message]
2025-03-11 9:25 ` [PATCH v7 2/8] dmaengine: qcom: bam_dma: extend the driver's device match data Bartosz Golaszewski
2025-03-11 16:00 ` Dmitry Baryshkov
2025-03-11 9:25 ` [PATCH v7 3/8] dmaengine: qcom: bam_dma: add bam_pipe_lock flag support Bartosz Golaszewski
2025-03-11 16:02 ` Dmitry Baryshkov
2025-03-30 16:22 ` Vinod Koul
2025-03-11 9:25 ` [PATCH v7 4/8] crypto: qce - use devres to allocate the result buffer Bartosz Golaszewski
2025-03-11 9:25 ` [PATCH v7 5/8] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2025-03-11 9:25 ` [PATCH v7 6/8] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2025-03-11 9:25 ` [PATCH v7 7/8] crypto: qce - Switch to using DMA Bartosz Golaszewski
2025-03-11 9:25 ` [PATCH v7 8/8] crypto: qce - Add support for BAM locking Bartosz Golaszewski
2025-03-21 9:06 ` [PATCH v7 0/8] dmaengine: qcom: bam_dma: add command descriptor support Herbert Xu
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