From: Stephan Gerhold <stephan.gerhold@linaro.org>
To: Md Sadre Alam <quic_mdalam@quicinc.com>
Cc: vkoul@kernel.org, corbet@lwn.net, thara.gopinath@gmail.com,
herbert@gondor.apana.org.au, davem@davemloft.net,
martin.petersen@oracle.com, enghua.yu@intel.com,
u.kleine-koenig@baylibre.com, dmaengine@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org,
quic_utiwari@quicinc.com, quic_srichara@quicinc.com,
quic_varada@quicinc.com
Subject: Re: [PATCH v6 01/12] dmaengine: qcom: bam_dma: Add bam_sw_version register read
Date: Thu, 16 Jan 2025 18:06:48 +0100 [thread overview]
Message-ID: <Z4k8qBEEfoyl0Qj1@linaro.org> (raw)
In-Reply-To: <20250115103004.3350561-2-quic_mdalam@quicinc.com>
On Wed, Jan 15, 2025 at 03:59:53PM +0530, Md Sadre Alam wrote:
> Add bam_sw_version register read. This will help to
> differentiate b/w some new BAM features across multiple
> BAM IP, feature like LOCK/UNLOCK of BAM pipe.
>
> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
> ---
>
> change in [v6]
>
> * No change
>
> change in [v5]
>
> * No change
>
> change in [v4]
>
> * Added BAM_SW_VERSION register read
>
> change in [v3]
>
> * This patch was not included in [v3]
>
> change in [v2]
>
> * This patch was not included in [v2]
>
> change in [v1]
>
> * This patch was not included in [v1]
>
> drivers/dma/qcom/bam_dma.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
> index c14557efd577..daeacd5cb8e9 100644
> --- a/drivers/dma/qcom/bam_dma.c
> +++ b/drivers/dma/qcom/bam_dma.c
> @@ -83,6 +83,7 @@ struct bam_async_desc {
> enum bam_reg {
> BAM_CTRL,
> BAM_REVISION,
> + BAM_SW_VERSION,
> BAM_NUM_PIPES,
> BAM_DESC_CNT_TRSHLD,
> BAM_IRQ_SRCS,
> @@ -117,6 +118,7 @@ struct reg_offset_data {
> static const struct reg_offset_data bam_v1_3_reg_info[] = {
> [BAM_CTRL] = { 0x0F80, 0x00, 0x00, 0x00 },
> [BAM_REVISION] = { 0x0F84, 0x00, 0x00, 0x00 },
> + [BAM_SW_VERSION] = { 0x0F88, 0x00, 0x00, 0x00 },
> [BAM_NUM_PIPES] = { 0x0FBC, 0x00, 0x00, 0x00 },
> [BAM_DESC_CNT_TRSHLD] = { 0x0F88, 0x00, 0x00, 0x00 },
> [BAM_IRQ_SRCS] = { 0x0F8C, 0x00, 0x00, 0x00 },
> @@ -146,6 +148,7 @@ static const struct reg_offset_data bam_v1_3_reg_info[] = {
> static const struct reg_offset_data bam_v1_4_reg_info[] = {
> [BAM_CTRL] = { 0x0000, 0x00, 0x00, 0x00 },
> [BAM_REVISION] = { 0x0004, 0x00, 0x00, 0x00 },
> + [BAM_SW_VERSION] = { 0x0008, 0x00, 0x00, 0x00 },
> [BAM_NUM_PIPES] = { 0x003C, 0x00, 0x00, 0x00 },
> [BAM_DESC_CNT_TRSHLD] = { 0x0008, 0x00, 0x00, 0x00 },
> [BAM_IRQ_SRCS] = { 0x000C, 0x00, 0x00, 0x00 },
> @@ -175,6 +178,7 @@ static const struct reg_offset_data bam_v1_4_reg_info[] = {
> static const struct reg_offset_data bam_v1_7_reg_info[] = {
> [BAM_CTRL] = { 0x00000, 0x00, 0x00, 0x00 },
> [BAM_REVISION] = { 0x01000, 0x00, 0x00, 0x00 },
> + [BAM_SW_VERSION] = { 0x01004, 0x00, 0x00, 0x00 },
> [BAM_NUM_PIPES] = { 0x01008, 0x00, 0x00, 0x00 },
> [BAM_DESC_CNT_TRSHLD] = { 0x00008, 0x00, 0x00, 0x00 },
> [BAM_IRQ_SRCS] = { 0x03010, 0x00, 0x00, 0x00 },
> @@ -393,6 +397,7 @@ struct bam_device {
> bool controlled_remotely;
> bool powered_remotely;
> u32 active_channels;
> + u32 bam_sw_version;
>
> const struct reg_offset_data *layout;
>
> @@ -1306,6 +1311,9 @@ static int bam_dma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + bdev->bam_sw_version = readl_relaxed(bam_addr(bdev, 0, BAM_SW_VERSION));
> + dev_info(bdev->dev, "BAM software version:0x%08x\n", bdev->bam_sw_version);
This will cause crashes for the same reason as your other patch. During
probe(), we can't read from BAM registers if we don't have a clock
assigned. There is no guarantee that the BAM is powered up.
To make this work properly on all platforms, you would need to defer
reading this register until the first channel is requested by the
consumer driver. Or limit this functionality to the if (bdev->bamclk)
case for now.
We should also prioritize fixing the existing regression before adding
new functionality.
Thanks,
Stephan
next prev parent reply other threads:[~2025-01-16 17:06 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 10:29 [PATCH v6 00/12] dmaengine: qcom: bam_dma: add cmd descriptor support Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 01/12] dmaengine: qcom: bam_dma: Add bam_sw_version register read Md Sadre Alam
2025-01-16 17:06 ` Stephan Gerhold [this message]
2025-01-17 4:32 ` Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 02/12] dmaengine: add DMA_PREP_LOCK and DMA_PREP_UNLOCK flag Md Sadre Alam
2025-03-10 20:36 ` Vinod Koul
2025-03-11 5:11 ` Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 03/12] dmaengine: qcom: bam_dma: add bam_pipe_lock flag support Md Sadre Alam
2025-03-07 13:37 ` Bartosz Golaszewski
2025-01-15 10:29 ` [PATCH v6 04/12] crypto: qce - Add support for crypto address read Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 05/12] crypto: qce - Add bam dma support for crypto register r/w Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 06/12] crypto: qce - Convert register r/w for skcipher via BAM/DMA Md Sadre Alam
2025-01-15 10:29 ` [PATCH v6 07/12] crypto: qce - Convert register r/w for sha " Md Sadre Alam
2025-01-15 10:30 ` [PATCH v6 08/12] crypto: qce - Convert register r/w for aead " Md Sadre Alam
2025-01-15 10:30 ` [PATCH v6 09/12] crypto: qce - Add LOCK and UNLOCK flag support Md Sadre Alam
2025-01-15 10:30 ` [PATCH v6 10/12] crypto: qce - Add support for lock/unlock in skcipher Md Sadre Alam
2025-01-15 10:30 ` [PATCH v6 11/12] crypto: qce - Add support for lock/unlock in sha Md Sadre Alam
2025-01-15 10:30 ` [PATCH v6 12/12] crypto: qce - Add support for lock/unlock in aead Md Sadre Alam
2025-02-20 14:27 ` [PATCH v6 00/12] dmaengine: qcom: bam_dma: add cmd descriptor support brgl
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