From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Will Deacon <will@kernel.org>, <kevin.tian@intel.com>,
<corbet@lwn.net>, <joro@8bytes.org>,
<suravee.suthikulpanit@amd.com>, <robin.murphy@arm.com>,
<dwmw2@infradead.org>, <baolu.lu@linux.intel.com>,
<linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kselftest@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<eric.auger@redhat.com>, <jean-philippe@linaro.org>,
<mdf@kernel.org>, <mshavit@google.com>,
<shameerali.kolothum.thodi@huawei.com>, <smostafa@google.com>,
<ddutile@redhat.com>, <yi.l.liu@intel.com>, <praan@google.com>,
<patches@lists.linux.dev>
Subject: Re: [PATCH v8 12/14] iommu/arm-smmu-v3: Introduce struct arm_smmu_vmaster
Date: Mon, 17 Mar 2025 11:49:14 -0700 [thread overview]
Message-ID: <Z9huquCf7YuzIjqx@Asurada-Nvidia> (raw)
In-Reply-To: <20250317154423.GI9311@nvidia.com>
On Mon, Mar 17, 2025 at 12:44:23PM -0300, Jason Gunthorpe wrote:
> On Tue, Mar 11, 2025 at 10:43:08AM -0700, Nicolin Chen wrote:
> > > > +int arm_smmu_attach_prepare_vmaster(struct arm_smmu_attach_state *state,
> > > > + struct arm_smmu_nested_domain *nested_domain)
> > > > +{
> > > > + struct arm_smmu_vmaster *vmaster;
> > > > + unsigned long vsid;
> > > > + int ret;
> > > > +
> > > > + iommu_group_mutex_assert(state->master->dev);
> > > > +
> > > > + /* Skip invalid vSTE */
> > > > + if (!(nested_domain->ste[0] & cpu_to_le64(STRTAB_STE_0_V)))
> > > > + return 0;
> > >
> > > Ok, and we don't need to set 'state->vmaster' in this case because we
> > > only report stage-1 faults back to the vSMMU?
> >
> > This is a good question that I didn't ask myself hard enough..
> >
> > I think we should probably drop it. An invalid STE should trigger
> > a C_BAD_STE event that is in the supported vEVENT list. I'll run
> > some test before removing this line from v9.
>
> It won't trigger C_BAD_STE, recall Robin was opposed to thatm so we have this:
>
> static void arm_smmu_make_nested_domain_ste(
> struct arm_smmu_ste *target, struct arm_smmu_master *master,
> struct arm_smmu_nested_domain *nested_domain, bool ats_enabled)
> {
> unsigned int cfg =
> FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(nested_domain->ste[0]));
>
> /*
> * Userspace can request a non-valid STE through the nesting interface.
> * We relay that into an abort physical STE with the intention that
> * C_BAD_STE for this SID can be generated to userspace.
> */
> if (!(nested_domain->ste[0] & cpu_to_le64(STRTAB_STE_0_V)))
> cfg = STRTAB_STE_0_CFG_ABORT;
>
> So, in the case of a non-valid STE, and a device access, the HW will
> generate one of the translation faults and that will be forwarded.
>
> Some software component will have to transform those fault events into
> C_BAD_STE for the VM.
Hmm, double checked the spec. It does say that C_BAD_STE would be
triggered:
" V, bit [0] STE Valid.
[...]
Device transactions that select an STE with this field configured
to 0 are terminated with an abort reported back to the device and
a C_BAD_STE event is recorded."
I also did a hack test unsetting the V bit in the kernel. Then, the
HW did report C_BAD_STE (0x4) back to the VM (via vEVENTQ).
Thanks
Nicolin
next prev parent reply other threads:[~2025-03-17 18:49 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-25 17:25 [PATCH v8 00/14] iommufd: Add vIOMMU infrastructure (Part-3: vEVENTQ) Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 01/14] iommufd/fault: Move two fault functions out of the header Nicolin Chen
2025-02-26 5:42 ` Baolu Lu
2025-02-25 17:25 ` [PATCH v8 02/14] iommufd/fault: Add an iommufd_fault_init() helper Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 03/14] iommufd: Abstract an iommufd_eventq from iommufd_fault Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 04/14] iommufd: Rename fault.c to eventq.c Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 05/14] iommufd: Add IOMMUFD_OBJ_VEVENTQ and IOMMUFD_CMD_VEVENTQ_ALLOC Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 06/14] iommufd/viommu: Add iommufd_viommu_get_vdev_id helper Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 07/14] iommufd/viommu: Add iommufd_viommu_report_event helper Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 08/14] iommufd/selftest: Require vdev_id when attaching to a nested domain Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 09/14] iommufd/selftest: Add IOMMU_TEST_OP_TRIGGER_VEVENT for vEVENTQ coverage Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 10/14] iommufd/selftest: Add IOMMU_VEVENTQ_ALLOC test coverage Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 11/14] Documentation: userspace-api: iommufd: Update FAULT and VEVENTQ Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 12/14] iommu/arm-smmu-v3: Introduce struct arm_smmu_vmaster Nicolin Chen
2025-02-25 17:52 ` Pranjal Shrivastava
2025-03-11 15:57 ` Will Deacon
2025-03-11 17:43 ` Nicolin Chen
2025-03-17 15:44 ` Jason Gunthorpe
2025-03-17 18:49 ` Nicolin Chen [this message]
2025-03-17 19:27 ` Jason Gunthorpe
2025-04-07 12:08 ` Zhangfei Gao
2025-04-07 17:17 ` Jason Gunthorpe
2025-04-07 18:00 ` Nicolin Chen
2025-04-08 11:44 ` Zhangfei Gao
2025-02-25 17:25 ` [PATCH v8 13/14] iommu/arm-smmu-v3: Report events that belong to devices attached to vIOMMU Nicolin Chen
2025-02-25 17:57 ` Pranjal Shrivastava
2025-03-11 15:56 ` Will Deacon
2025-03-11 16:26 ` Nicolin Chen
2025-02-25 17:25 ` [PATCH v8 14/14] iommu/arm-smmu-v3: Set MEV bit in nested STE for DoS mitigations Nicolin Chen
2025-02-25 17:59 ` Pranjal Shrivastava
2025-03-11 15:56 ` Will Deacon
2025-03-01 4:16 ` [PATCH v8 00/14] iommufd: Add vIOMMU infrastructure (Part-3: vEVENTQ) Zhangfei Gao
2025-03-01 4:40 ` Nicolin Chen
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