From: Sunil V L <sunilvl@ventanamicro.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Jonathan Corbet <corbet@lwn.net>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
'Conor Dooley ' <conor.dooley@microchip.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH V3 10/20] RISC-V: smpboot: Add ACPI support in smp_setup()
Date: Fri, 3 Mar 2023 23:24:21 +0530 [thread overview]
Message-ID: <ZAI0TaskDCDz7bB/@sunil-laptop> (raw)
In-Reply-To: <20230303154920.dq65hkcivpv7zyev@orel>
On Fri, Mar 03, 2023 at 04:49:20PM +0100, Andrew Jones wrote:
> On Fri, Mar 03, 2023 at 07:06:37PM +0530, Sunil V L wrote:
> > Enable SMP boot on ACPI based platforms by using the RINTC
> > structures in the MADT table.
> >
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > arch/riscv/kernel/smpboot.c | 72 ++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 71 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> > index 26214ddefaa4..27047322d3bb 100644
> > --- a/arch/riscv/kernel/smpboot.c
> > +++ b/arch/riscv/kernel/smpboot.c
> > @@ -8,6 +8,7 @@
> > * Copyright (C) 2017 SiFive
> > */
> >
> > +#include <linux/acpi.h>
> > #include <linux/arch_topology.h>
> > #include <linux/module.h>
> > #include <linux/init.h>
> > @@ -70,6 +71,72 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
> > }
> > }
> >
> > +#ifdef CONFIG_ACPI
> > +static unsigned int cpu_count = 1;
> > +
> > +static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end)
> > +{
> > + unsigned long hart;
> > + static bool found_boot_cpu;
> > + struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header;
> > +
> > + /*
> > + * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED
> > + * bit in the flag is not enabled, it means OS should not try to enable
> > + * the cpu to which RINTC belongs.
> > + */
> > + if (!(processor->flags & ACPI_MADT_ENABLED))
> > + return 0;
> > +
> > + if (BAD_MADT_ENTRY(processor, end))
> > + return -EINVAL;
> > +
> > + acpi_table_print_madt_entry(&header->common);
> > +
> > + hart = processor->hart_id;
> > + if (hart == INVALID_HARTID) {
> > + pr_warn("Invalid hartid\n");
> > + return 0;
> > + }
> > +
> > + if (hart == cpuid_to_hartid_map(0)) {
> > + BUG_ON(found_boot_cpu);
> > + found_boot_cpu = true;
> > + early_map_cpu_to_node(0, NUMA_NO_NODE);
>
> We should have kept
>
> static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
>
> and only dropped the
>
> #ifdef CONFIG_ACPI_NUMA
> int acpi_numa_get_nid(unsigned int cpu);
> #else
> ...
> #endif
>
Okay, I thought we better add it when we enable NUMA with ACPI.
> > + return 0;
> > + }
> > +
> > + if (cpu_count >= NR_CPUS) {
> > + pr_warn("NR_CPUS is too small for the number of ACPI tables.\n");
> > + return 0;
> > + }
> > +
> > + cpuid_to_hartid_map(cpu_count) = hart;
> > + early_map_cpu_to_node(cpu_count, NUMA_NO_NODE);
> > + cpu_count++;
> > +
> > + return 0;
> > +}
> > +
> > +static void __init acpi_parse_and_init_cpus(void)
> > +{
> > + int cpuid;
> > +
> > + cpu_set_ops(0);
> > +
> > + acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0);
> > +
> > + for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) {
> > + if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) {
> > + cpu_set_ops(cpuid);
> > + set_cpu_possible(cpuid, true);
> > + }
> > + }
> > +}
> > +#else
> > +#define acpi_parse_and_init_cpus(...) do { } while (0)
> > +#endif
> > +
> > static void __init of_parse_and_init_cpus(void)
> > {
> > struct device_node *dn;
> > @@ -118,7 +185,10 @@ static void __init of_parse_and_init_cpus(void)
> >
> > void __init setup_smp(void)
> > {
> > - of_parse_and_init_cpus();
> > + if (acpi_disabled)
> > + of_parse_and_init_cpus();
> > + else
> > + acpi_parse_and_init_cpus();
> > }
> >
> > static int start_secondary_cpu(int cpu, struct task_struct *tidle)
> > --
> > 2.34.1
> >
>
> Thanks,
> drew
next prev parent reply other threads:[~2023-03-03 17:54 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-03 13:36 [PATCH V3 00/20] Add basic ACPI support for RISC-V Sunil V L
2023-03-03 13:36 ` [PATCH V3 01/20] riscv: move sbi_init() earlier before jump_label_init() Sunil V L
2023-03-03 13:36 ` [PATCH V3 02/20] ACPICA: MADT: Add RISC-V INTC interrupt controller Sunil V L
2023-03-03 13:36 ` [PATCH V3 03/20] ACPICA: Add structure definitions for RISC-V RHCT Sunil V L
2023-03-03 13:36 ` [PATCH V3 04/20] ACPI: tables: Print RINTC information when MADT is parsed Sunil V L
2023-03-03 14:58 ` Andrew Jones
2023-03-03 13:36 ` [PATCH V3 05/20] ACPI: OSL: Make should_use_kmap() 0 for RISC-V Sunil V L
2023-03-03 13:36 ` [PATCH V3 06/20] RISC-V: Add support to build the ACPI core Sunil V L
2023-03-03 15:36 ` Andrew Jones
2023-03-04 14:38 ` Andrew Jones
2023-03-06 20:00 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 07/20] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Sunil V L
2023-03-03 13:36 ` [PATCH V3 08/20] drivers/acpi: RISC-V: Add RHCT related code Sunil V L
2023-03-03 13:36 ` [PATCH V3 09/20] RISC-V: smpboot: Create wrapper smp_setup() Sunil V L
2023-03-03 13:36 ` [PATCH V3 10/20] RISC-V: smpboot: Add ACPI support in smp_setup() Sunil V L
2023-03-03 15:49 ` Andrew Jones
2023-03-03 17:54 ` Sunil V L [this message]
2023-03-03 13:36 ` [PATCH V3 11/20] RISC-V: ACPI: Cache and retrieve the RINTC structure Sunil V L
2023-03-03 16:05 ` Andrew Jones
2023-03-03 16:58 ` Conor Dooley
2023-03-03 17:21 ` Andrew Jones
2023-03-03 17:49 ` Sunil V L
2023-03-03 17:58 ` Sunil V L
2023-03-03 18:04 ` Andrew Jones
2023-03-03 18:17 ` Sunil V L
2023-03-03 13:36 ` [PATCH V3 12/20] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Sunil V L
2023-03-03 16:16 ` Andrew Jones
2023-03-03 17:55 ` Sunil V L
2023-03-06 20:26 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 13/20] RISC-V: cpu: Enable cpuinfo for ACPI systems Sunil V L
2023-03-03 16:18 ` Andrew Jones
2023-03-06 20:39 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 14/20] irqchip/riscv-intc: Add ACPI support Sunil V L
2023-03-06 20:53 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 15/20] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Sunil V L
2023-03-06 21:01 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 16/20] clocksource/timer-riscv: Add ACPI support Sunil V L
2023-03-06 21:06 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 17/20] RISC-V: time.c: Add ACPI support for time_init() Sunil V L
2023-03-06 21:09 ` Conor Dooley
2023-03-08 9:43 ` Sunil V L
2023-03-03 13:36 ` [PATCH V3 18/20] RISC-V: Add ACPI initialization in setup_arch() Sunil V L
2023-03-06 21:17 ` Conor Dooley
2023-03-08 9:42 ` Sunil V L
2023-03-08 10:21 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 19/20] RISC-V: Enable ACPI in defconfig Sunil V L
2023-03-03 16:23 ` Andrew Jones
2023-03-06 21:18 ` Conor Dooley
2023-03-03 13:36 ` [PATCH V3 20/20] MAINTAINERS: Add entry for drivers/acpi/riscv Sunil V L
2023-03-06 21:51 ` [PATCH V3 00/20] Add basic ACPI support for RISC-V Conor Dooley
2023-03-07 5:06 ` Sunil V L
2023-03-07 6:13 ` Conor Dooley
2023-03-07 18:44 ` Conor Dooley
2023-03-08 1:01 ` Sunil V L
2023-04-04 6:35 ` Ley Foon Tan
2023-04-04 6:54 ` Sunil V L
2023-04-06 2:45 ` Atish Kumar Patra
2023-04-19 8:07 ` Ley Foon Tan
2023-04-19 23:34 ` Atish Patra
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