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Wysocki" , "David S . Miller" , "Rafael J . Wysocki" , Andrew Jones Subject: Re: [PATCH V4 13/23] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Message-ID: References: <20230404182037.863533-1-sunilvl@ventanamicro.com> <20230404182037.863533-14-sunilvl@ventanamicro.com> <20230429-voucher-tutor-715fd4f6c24e@spud> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230429-voucher-tutor-715fd4f6c24e@spud> Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Sat, Apr 29, 2023 at 11:31:20AM +0100, Conor Dooley wrote: > Hey Sunil, > > On Tue, Apr 04, 2023 at 11:50:27PM +0530, Sunil V L wrote: > > > @@ -103,14 +109,36 @@ void __init riscv_fill_hwcap(void) > > > > bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); > > > > - for_each_of_cpu_node(node) { > > + if (!acpi_disabled) { > > + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); > > + if (ACPI_FAILURE(status)) > > + return; > > + } > > + > > + for_each_possible_cpu(cpu) { > > unsigned long this_hwcap = 0; > > DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX); > > const char *temp; > > > > - if (of_property_read_string(node, "riscv,isa", &isa)) { > > - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); > > - continue; > > + if (acpi_disabled) { > > + node = of_cpu_device_node_get(cpu); > > + if (node) { > > + rc = of_property_read_string(node, "riscv,isa", &isa); > > + of_node_put(node); > > + if (rc) { > > + pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); > > + continue; > > + } > > + } else { > > + pr_warn("Unable to find cpu node\n"); > > + continue; > > I was poking at this the last few days and went back to look at the ACPI > code again. Is there a reason we don't do early-return here? IOW: > > node = of_cpu_device_node_get(cpu); > if (!node) { > pr_warn() > continue; > } > > rc = of_property_read_string(node, "riscv,isa", &isa); > of_node_put(node); > if (rc) { > pr_warn(); > continue; > } > This looks better. Will update when I send the next revision of the series. Thank you!, Conor.