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Date: Tue, 24 Oct 2023 13:26:00 +0100
From: Matthew Wilcox <willy@infradead.org>
To: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
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Subject: Re: [PATCH v2 0/6] Delay VERW
Message-ID: <ZTe32IOvhBNkIlKa@casper.infradead.org>
References: <20231024-delay-verw-v2-0-f1881340c807@linux.intel.com>
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In-Reply-To: <20231024-delay-verw-v2-0-f1881340c807@linux.intel.com>

On Tue, Oct 24, 2023 at 01:08:14AM -0700, Pawan Gupta wrote:
> Legacy instruction VERW was overloaded by some processors to clear

Can you raise a bug against the SDM?  The VERR/VERW instruction is
out-of-order alphabetically; my copy of Volume 2 from June 2023 has it
placed between VEXPANDPS and VEXTRACTF128.