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AJvYcCXXqwO0T4BvM7VimmcOdNjrMBTmE/FhWNhUUoz24vCp08k+0Ez/C88v+o9s4DoWeAW2IrDY+B3/yTCehLxn+p1qeigrwCajKLqz X-Gm-Message-State: AOJu0YxpoCP8DrhVmheKNNrleqtwGDz/7byyQqXEvkmmnRvjjMZtCmlP SU+fjgafgZdxnEVglqvkTpMaOAjfqLKJyFXzivAzmHgFLeqB74AMdvu2KqLFLU0= X-Google-Smtp-Source: AGHT+IGotfMmm5x9Xi19DeFfmbyjknJKTAh4y49q6+Q/YPgYYL/De9ObYQYYyxWmR72uNSf6FbQ1Zw== X-Received: by 2002:a17:90a:72c6:b0:299:4fa7:71e5 with SMTP id l6-20020a17090a72c600b002994fa771e5mr11324761pjk.8.1708562402076; Wed, 21 Feb 2024 16:40:02 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id qc17-20020a17090b289100b002993743e4a7sm2480570pjb.20.2024.02.21.16.39.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Feb 2024 16:40:01 -0800 (PST) Date: Wed, 21 Feb 2024 16:39:57 -0800 From: Deepak Gupta To: "Edgecombe, Rick P" Cc: "ajones@ventanamicro.com" , "bjorn@rivosinc.com" , "conor.dooley@microchip.com" , "broonie@kernel.org" , "keescook@chromium.org" , "kito.cheng@sifive.com" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "alex@ghiti.fr" , "Szabolcs.Nagy@arm.com" , "alexghiti@rivosinc.com" , "atishp@atishpatra.org" , "cleger@rivosinc.com" , "josh@joshtriplett.org" , "linux-arch@vger.kernel.org" , "gerg@kernel.org" , "linux-kselftest@vger.kernel.org" , "bhe@redhat.com" , "charlie@rivosinc.com" , "david@redhat.com" , "samitolvanen@google.com" , "heiko@sntech.de" , "panqinglin2020@iscas.ac.cn" , "mchitale@ventanamicro.com" , "corbet@lwn.net" , "revest@chromium.org" , "mason.huo@starfivetech.com" , "ojeda@kernel.org" , "baruch@tkos.co.il" , "waylingii@gmail.com" , "linux-riscv@lists.infradead.org" , "joey.gouly@arm.com" , "ancientmodern4@gmail.com" , "mathis.salmen@matsal.de" , "aou@eecs.berkeley.edu" , "shr@devkernel.io" , "andy.chiu@sifive.com" , "shuah@kernel.org" , "arnd@arndb.de" , "linux-kernel@vger.kernel.org" , "vincent.chen@sifive.com" , "greentime.hu@sifive.com" , "oleg@redhat.com" , "willy@infradead.org" , "zhangqing@loongson.cn" , "jhubbard@nvidia.com" , "ebiederm@xmission.com" , "Wang, Xiao W" , "cuiyunhui@bytedance.com" , "brauner@kernel.org" , "catalin.marinas@arm.com" , "ruscur@russell.cc" , "shikemeng@huaweicloud.com" , "jszhang@kernel.org" , "jeeheng.sia@starfivetech.com" , "alx@kernel.org" , "guoren@kernel.org" , "omosnace@redhat.com" , "linux-mm@kvack.org" , "evan@rivosinc.com" , "bgray@linux.ibm.com" , "apatel@ventanamicro.com" , "akpm@linux-foundation.org" , "linux-doc@vger.kernel.org" Subject: Re: [RFC PATCH v1 11/28] riscv: Implementing "PROT_SHADOWSTACK" on riscv Message-ID: References: <20240125062739.1339782-1-debug@rivosinc.com> <20240125062739.1339782-12-debug@rivosinc.com> <2914cf78e47010e195d963857b37807e8446e3be.camel@intel.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <2914cf78e47010e195d963857b37807e8446e3be.camel@intel.com> On Fri, Feb 09, 2024 at 08:44:35PM +0000, Edgecombe, Rick P wrote: >On Wed, 2024-01-24 at 22:21 -0800, debug@rivosinc.com wrote: >> +       /* >> +        * PROT_SHADOWSTACK is a kernel only protection flag on risc- >> v. >> +        * mmap doesn't expect PROT_SHADOWSTACK to be set by user >> space. >> +        * User space can rely on `map_shadow_stack` syscall to >> create >> +        * shadow stack pages. >> +        */ >> +       if (unlikely(prot & PROT_SHADOWSTACK)) >> +               return -EINVAL; > >Are you sure you need PROT_SHADOWSTACK? Since you are passing >VM_SHADOW_STACK into do_mmap() directly. Sorry for (very) late response. In this patch series since VM_SHADOW_STACK was an alias to VM_WRITE. And that's why I needed PROT_SHADOWSTACK to disambiguate. I am updating my patches and going with ARCH_5 bit (and thus only 64bit support). So x86, aarch64 and risc-v will be using same bit position.