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From: Andrea Parri <parri.andrea@gmail.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
	Waiman Long <longman@redhat.com>,
	Boqun Feng <boqun.feng@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
	Leonardo Bras <leobras@redhat.com>, Guo Ren <guoren@kernel.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org
Subject: Re: [PATCH 7/7] riscv: Add qspinlock support based on Zabha extension
Date: Fri, 31 May 2024 17:52:09 +0200	[thread overview]
Message-ID: <ZlnyKclZOQdrJTtU@andrea> (raw)
In-Reply-To: <39a9b28c-2792-45ce-a8c6-1703cab0f2de@ghiti.fr>

> > > +	select ARCH_USE_QUEUED_SPINLOCKS if TOOLCHAIN_HAS_ZABHA
> > IIUC, we should make sure qspinlocks run with ARCH_WEAK_RELEASE_ACQUIRE,
> > perhaps a similar select for the latter?  (not a kconfig expert)
> 
> 
> Where did you see this dependency? And if that is really a dependency of
> qspinlocks, shouldn't this be under CONFIG_QUEUED_SPINLOCKS? (not a Kconfig
> expert too).

The comment on smp_mb__after_unlock_lock() in include/linux/rcupdate.h
(the barrier is currently only used by the RCU subsystem) recalls:

  /*
   * Place this after a lock-acquisition primitive to guarantee that
   * an UNLOCK+LOCK pair acts as a full barrier.  This guarantee applies
   * if the UNLOCK and LOCK are executed by the same CPU or if the
   * UNLOCK and LOCK operate on the same lock variable.
   */
  #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE
  #define smp_mb__after_unlock_lock()	smp_mb()  /* Full ordering for lock. */
  #else /* #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE */
  #define smp_mb__after_unlock_lock()	do { } while (0)
  #endif /* #else #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE */

Architectures whose UNLOCK+LOCK implementation does not (already) meet
the required "full barrier" ordering property (currently, only powerpc)
can overwrite the "default"/common #define for this barrier (NOP) and
meet the ordering by opting in for ARCH_WEAK_RELEASE_ACQUIRE.

The (current) "generic" ticket lock implementation provides "the full
barrier" in its LOCK operations (hence in part. in UNLOCK+LOCK), cf.

  arch_spin_trylock() -> atomic_try_cmpxchg()
  arch_spin_lock() -> atomic_fetch_add()
                   -> atomic_cond_read_acquire(); smp_mb()

but the "UNLOCK+LOCK pairs act as a full barrier" property doesn't hold
true for riscv (and powerpc) when switching over to queued spinlocks.
OTOH, I see no particular reason for other "users" of queued spinlocks
(notably, x86 and arm64) for selecting ARCH_WEAK_RELEASE_ACQUIRE.

But does this address your concern?  Let me know if I misunderstood it.

  Andrea

  reply	other threads:[~2024-05-31 15:52 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-28 15:10 [PATCH 0/7] Zacas/Zabha support and qspinlocks Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 1/7] riscv: Implement cmpxchg32/64() using Zacas Alexandre Ghiti
2024-05-28 15:34   ` Conor Dooley
2024-05-29 12:20     ` Alexandre Ghiti
2024-05-30 14:43       ` Conor Dooley
2024-05-28 18:16   ` Andrea Parri
2024-05-28 15:10 ` [PATCH 2/7] riscv: Implement cmpxchg8/16() using Zabha Alexandre Ghiti
2024-05-28 19:31   ` Nathan Chancellor
2024-05-29 12:49     ` Alexandre Ghiti
2024-05-29 15:57       ` Nathan Chancellor
2024-06-03 15:31         ` Alexandre Ghiti
2024-05-28 23:54   ` Andrea Parri
2024-05-29 12:29     ` Alexandre Ghiti
2024-05-29 12:55       ` Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 3/7] riscv: Implement arch_cmpxchg128() using Zacas Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 4/7] riscv: Implement xchg8/16() using Zabha Alexandre Ghiti
2024-05-28 15:22   ` Conor Dooley
2024-05-29  6:15     ` Alexandre Ghiti
2024-05-28 18:00   ` Andrea Parri
2024-05-29  8:04     ` Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 5/7] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 6/7] asm-generic: ticket-lock: Add separate ticket-lock.h Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 7/7] riscv: Add qspinlock support based on Zabha extension Alexandre Ghiti
2024-05-29  0:55   ` Andrea Parri
2024-05-31 13:37     ` Alexandre Ghiti
2024-05-31 15:52       ` Andrea Parri [this message]
2024-06-01  6:18         ` Guo Ren
2024-06-03  0:41           ` Andrea Parri
2024-05-29  9:23   ` Guo Ren
2024-05-29 13:03     ` Alexandre Ghiti
2024-05-30  1:54       ` Guo Ren
2024-05-30  5:30         ` Alexandre Ghiti
2024-05-31  1:57           ` Guo Ren
2024-05-31  6:22             ` Alexandre Ghiti
2024-05-31  6:42               ` Guo Ren
2024-06-03  9:21                 ` Alexandre Ghiti
2024-06-03 11:11                   ` Guo Ren
2024-05-31 13:10       ` Guo Ren
2024-06-03  9:49         ` Alexandre Ghiti
2024-06-03 11:28           ` Guo Ren
2024-06-03 11:34             ` Alexandre Ghiti
2024-06-03 11:44               ` Guo Ren
2024-06-03 11:49                 ` Alexandre Ghiti
2024-06-03 11:57                   ` Guo Ren

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