[PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo

[PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo

[Kuan-Ying Lee]

Since arm64 supports 5-level page tables, we need to add this
information to vmcoreinfo to make debug tools know if 5-level
page table is enabled or not.

Missing this information will break the debug tool like crash [1].

[1] https://github.com/crash-utility/crash

Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
---
 Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++
 arch/arm64/kernel/vmcore_info.c                | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst
index 0f714fc945ac..557a1cbe5098 100644
--- a/Documentation/admin-guide/kdump/vmcoreinfo.rst
+++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst
@@ -466,6 +466,12 @@ Used to get the correct ranges:
 	VMALLOC_START ~ VMALLOC_END-1 : vmalloc() / ioremap() space.
 	VMEMMAP_START ~ VMEMMAP_END-1 : vmemmap region, used for struct page array.
 
+pgtable_l5_enabled
+------------------
+
+User-space tools need to know whether the crash kernel was in 5-level
+paging mode.
+
 arm
 ===
 
diff --git a/arch/arm64/kernel/vmcore_info.c b/arch/arm64/kernel/vmcore_info.c
index b19d5d6cb8b3..be65d664bdb7 100644
--- a/arch/arm64/kernel/vmcore_info.c
+++ b/arch/arm64/kernel/vmcore_info.c
@@ -7,6 +7,7 @@
 #include <linux/vmcore_info.h>
 #include <asm/cpufeature.h>
 #include <asm/memory.h>
+#include <asm/pgtable.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pointer_auth.h>
 
@@ -36,4 +37,6 @@ void arch_crash_save_vmcoreinfo(void)
 	vmcoreinfo_append_str("NUMBER(KERNELPACMASK)=0x%llx\n",
 						system_supports_address_auth() ?
 						ptrauth_kernel_pac_mask() : 0);
+	vmcoreinfo_append_str("NUMBER(pgtable_l5_enabled)=%d\n",
+						pgtable_l5_enabled());
 }
-- 
2.43.0

Re: [PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo

[Will Deacon]

On Mon, Aug 26, 2024 at 02:52:02PM +0800, Kuan-Ying Lee wrote:
> Since arm64 supports 5-level page tables, we need to add this
> information to vmcoreinfo to make debug tools know if 5-level
> page table is enabled or not.
> 
> Missing this information will break the debug tool like crash [1].
> 
> [1] https://github.com/crash-utility/crash
> 
> Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
> ---
>  Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++
>  arch/arm64/kernel/vmcore_info.c                | 3 +++
>  2 files changed, 9 insertions(+)

In which case, wouldn't you also want to know about pgtable_l4_enabled()?

Will

Re: [PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo

[Baoquan He]

On 08/27/24 at 01:24pm, Will Deacon wrote:
> On Mon, Aug 26, 2024 at 02:52:02PM +0800, Kuan-Ying Lee wrote:
> > Since arm64 supports 5-level page tables, we need to add this
> > information to vmcoreinfo to make debug tools know if 5-level
> > page table is enabled or not.
> > 
> > Missing this information will break the debug tool like crash [1].
> > 
> > [1] https://github.com/crash-utility/crash
> > 
> > Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
> > ---
> >  Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++
> >  arch/arm64/kernel/vmcore_info.c                | 3 +++
> >  2 files changed, 9 insertions(+)
> 
> In which case, wouldn't you also want to know about pgtable_l4_enabled()?

That is a good question. I guess it's deduced in code, mostly needed for
different PAGE_OFFSET, how to transfer virtual addr to physical addr,
etc.

Add Crash utility experts here.

Re: [PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo

[Kuan-Ying Lee]

On Wed, Aug 28, 2024 at 05:37:07PM +0800, lijiang wrote:
> On Wed, Aug 28, 2024 at 6:48 AM Baoquan He <bhe@redhat.com> wrote:
> 
> > On 08/27/24 at 01:24pm, Will Deacon wrote:
> > > On Mon, Aug 26, 2024 at 02:52:02PM +0800, Kuan-Ying Lee wrote:
> > > > Since arm64 supports 5-level page tables, we need to add this
> > > > information to vmcoreinfo to make debug tools know if 5-level
> > > > page table is enabled or not.
> > > >
> > > > Missing this information will break the debug tool like crash [1].

Sorry, the above line was mistakenly expressed.

Currently, the crash tool doesn't support 4K page with 5-level
page tables (LPA2), so I initially planned to add this
information to implement support for 4K page with 5-level page
table in the crash tool.

> > > >
> > > > [1] https://github.com/crash-utility/crash
> > > >
> > > > Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
> > > > ---
> > > >  Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++
> > > >  arch/arm64/kernel/vmcore_info.c                | 3 +++
> > > >  2 files changed, 9 insertions(+)
> > >
> > > In which case, wouldn't you also want to know about pgtable_l4_enabled()?
> >
> > That is a good question. I guess it's deduced in code, mostly needed for
> > different PAGE_OFFSET, how to transfer virtual addr to physical addr,
> > etc.
> >
> >
> Thanks for the information, Baoquan.
> 
> If I understand correctly, for arm64, currently, the crash tool determines
> the levels of the page table based on page size and va_bits, and then
> decides how to translate the address, such as calculating it in conjunction
> with other values, e.g: kernel pgd, offset, etc.

Thanks for the information. I will then try to use VA_BITS to determine
if it is a 5-level page table.
Let me investigate further.

Thanks,
Kuan-Ying Lee

> 
> For more details, please refer to this one:
> https://github.com/crash-utility/crash/blob/master/arm64.c
> 
> 
> Thanks
> Lianbo
> 
> 
> > Add Crash utility experts here.
> >
> >