From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Linu Cherian <lcherian@marvell.com>,
suzuki.poulose@arm.com, mike.leach@linaro.org,
james.clark@arm.com
Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
corbet@lwn.net, devicetree@vger.kernel.org, sgoutham@marvell.com,
gcherian@marvell.com
Subject: Re: [PATCH v10 8/8] Documentation: coresight: Panic support
Date: Tue, 17 Sep 2024 08:46:46 +0700 [thread overview]
Message-ID: <ZujfhpLezHtbXhjs@archie.me> (raw)
In-Reply-To: <20240916103437.226816-9-lcherian@marvell.com>
[-- Attachment #1: Type: text/plain, Size: 5689 bytes --]
On Mon, Sep 16, 2024 at 04:04:37PM +0530, Linu Cherian wrote:
> +3. On a kernel panic, all coresight blocks are disabled, necessary
> + metadata is synced by kernel panic handler.
"... and necessary metadata ..."
> +
> + System would eventually reboot or boot a crashdump kernel.
> +
> +4. For platforms that supports crashdump kernel, raw trace data can be
> + dumped using the coresight sysfs interface from the crashdump kernel
> + itself. Persistent RAM is not a requirement in this case.
> +
> +5. For platforms that supports persistent RAM, trace data can be dumped
> + using the coresight sysfs interface in the subsequent Linux boot.
> + Crashdump kernel is not a requirement in this case. Persistent RAM
> + ensures that trace data is intact across reboot.
> +
> +Coresight trace during Watchdog reset
> +-------------------------------------
> +The main difference between addressing the watchdog reset and kernel panic
> +case are below,
"... are:"
> +Sample commands for testing a Kernel panic case with ETR sink
> +-------------------------------------------------------------
> +
> +1. Boot Linux kernel with "crash_kexec_post_notifiers" added to the kernel
> + bootargs. This is mandatory if the user would like to read the tracedata
> + from the crashdump kernel.
> +
> +2. Enable the preloaded ETM configuration
> +
> + #echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable
> +
> +3. Configure CTI using sysfs interface::
> +
> + #./cti_setup.sh
> +
> + #cat cti_setup.sh
> +
> +
> + cd /sys/bus/coresight/devices/
> +
> + ap_cti_config () {
> + #ETM trig out[0] trigger to Channel 0
> + echo 0 4 > channels/trigin_attach
> + }
> +
> + etf_cti_config () {
> + #ETF Flush in trigger from Channel 0
> + echo 0 1 > channels/trigout_attach
> + echo 1 > channels/trig_filter_enable
> + }
> +
> + etr_cti_config () {
> + #ETR Flush in from Channel 0
> + echo 0 1 > channels/trigout_attach
> + echo 1 > channels/trig_filter_enable
> + }
> +
> + ctidevs=`find . -name "cti*"`
> +
> + for i in $ctidevs
> + do
> + cd $i
> +
> + connection=`find . -name "ete*"`
> + if [ ! -z "$connection" ]
> + then
> + echo "AP CTI config for $i"
> + ap_cti_config
> + fi
> +
> + connection=`find . -name "tmc_etf*"`
> + if [ ! -z "$connection" ]
> + then
> + echo "ETF CTI config for $i"
> + etf_cti_config
> + fi
> +
> + connection=`find . -name "tmc_etr*"`
> + if [ ! -z "$connection" ]
> + then
> + echo "ETR CTI config for $i"
> + etr_cti_config
> + fi
> +
> + cd ..
> + done
> +
> +Note: CTI connections are SOC specific and hence the above script is
> +added just for reference.
> +
> +4. Choose reserved buffer mode for ETR buffer
> + #echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred
> +
> +5. Enable stop on flush trigger configuration
> + #echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush
> +
> +6. Start Coresight tracing on cores 1 and 2 using sysfs interface
> +
> +7. Run some application on core 1
> + #taskset -c 1 dd if=/dev/urandom of=/dev/null &
> +
> +8. Invoke kernel panic on core 2
> + #echo 1 > /proc/sys/kernel/panic
> + #taskset -c 2 echo c > /proc/sysrq-trigger
> +
> +9. From rebooted kernel or crashdump kernel, read crashdata
> +
> + #dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin
> +
> +10. Run opencsd decoder tools/scripts to generate the instruction trace.
Format all command lines as literal code blocks to be consistent:
---- >8 ----
diff --git a/Documentation/trace/coresight/panic.rst b/Documentation/trace/coresight/panic.rst
index 3b53d91cace8fd..864f6c05b3f7af 100644
--- a/Documentation/trace/coresight/panic.rst
+++ b/Documentation/trace/coresight/panic.rst
@@ -113,7 +113,7 @@ Sample commands for testing a Kernel panic case with ETR sink
bootargs. This is mandatory if the user would like to read the tracedata
from the crashdump kernel.
-2. Enable the preloaded ETM configuration
+2. Enable the preloaded ETM configuration::
#echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable
@@ -176,22 +176,26 @@ Sample commands for testing a Kernel panic case with ETR sink
Note: CTI connections are SOC specific and hence the above script is
added just for reference.
-4. Choose reserved buffer mode for ETR buffer
+4. Choose reserved buffer mode for ETR buffer::
+
#echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred
-5. Enable stop on flush trigger configuration
+5. Enable stop on flush trigger configuration::
+
#echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush
6. Start Coresight tracing on cores 1 and 2 using sysfs interface
-7. Run some application on core 1
+7. Run some application on core 1::
+
#taskset -c 1 dd if=/dev/urandom of=/dev/null &
-8. Invoke kernel panic on core 2
+8. Invoke kernel panic on core 2::
+
#echo 1 > /proc/sys/kernel/panic
#taskset -c 2 echo c > /proc/sysrq-trigger
-9. From rebooted kernel or crashdump kernel, read crashdata
+9. From rebooted kernel or crashdump kernel, read crashdata::
#dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin
Thanks.
--
An old man doll... just what I always wanted! - Clara
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next prev parent reply other threads:[~2024-09-17 1:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 10:34 [PATCH v10 0/8] Coresight for Kernel panic and watchdog reset Linu Cherian
2024-09-16 10:34 ` [PATCH v10 1/8] dt-bindings: arm: coresight-tmc: Add "memory-region" property Linu Cherian
2024-09-16 10:34 ` [PATCH v10 2/8] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian
2024-09-16 10:34 ` [PATCH v10 3/8] coresight: core: Add provision for panic callbacks Linu Cherian
2024-09-16 10:34 ` [PATCH v10 4/8] coresight: tmc: Enable panic sync handling Linu Cherian
2024-10-01 16:43 ` Suzuki K Poulose
2024-10-17 12:12 ` Linu Cherian
2024-10-28 9:40 ` Linu Cherian
2024-10-29 6:24 ` Linu Cherian
2024-10-29 8:27 ` Linu Cherian
2024-10-29 6:59 ` Linu Cherian
2024-09-16 10:34 ` [PATCH v10 5/8] coresight: tmc: Add support for reading crash data Linu Cherian
2024-10-03 13:25 ` Suzuki K Poulose
2024-10-17 11:40 ` Linu Cherian
2024-10-18 9:46 ` Suzuki K Poulose
2024-10-21 12:40 ` Linu Cherian
2024-10-29 6:21 ` Linu Cherian
2024-10-30 5:34 ` Linu Cherian
2024-09-16 10:34 ` [PATCH v10 6/8] coresight: tmc: Stop trace capture on FlIn Linu Cherian
2024-09-16 10:34 ` [PATCH v10 7/8] coresight: config: Add preloaded configuration Linu Cherian
2024-10-03 13:29 ` Suzuki K Poulose
2024-10-16 10:11 ` Linu Cherian
2024-09-16 10:34 ` [PATCH v10 8/8] Documentation: coresight: Panic support Linu Cherian
2024-09-17 1:46 ` Bagas Sanjaya [this message]
2024-09-19 2:09 ` Linu Cherian
2024-10-03 13:43 ` Suzuki K Poulose
2024-10-16 9:28 ` Linu Cherian
2024-09-16 11:16 ` [PATCH v10 0/8] Coresight for Kernel panic and watchdog reset Linu Cherian
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