linux-doc.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Atish Patra <atish.patra@linux.dev>
To: "Clément Léger" <cleger@rivosinc.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Anup Patel" <anup@brainfault.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Shuah Khan" <shuah@kernel.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: Samuel Holland <samuel.holland@sifive.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Deepak Gupta <debug@rivosinc.com>
Subject: Re: [PATCH v6 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions
Date: Thu, 8 May 2025 17:26:52 -0700	[thread overview]
Message-ID: <a34e5893-0b7e-47e7-a655-a49e3472e0e9@linux.dev> (raw)
In-Reply-To: <20250424173204.1948385-12-cleger@rivosinc.com>

On 4/24/25 10:31 AM, Clément Léger wrote:
> The FWFT SBI extension will need to dynamically allocate memory and do
> init time specific initialization. Add an init/deinit callbacks that
> allows to do so.
> 
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>   arch/riscv/include/asm/kvm_vcpu_sbi.h |  9 +++++++++
>   arch/riscv/kvm/vcpu.c                 |  2 ++
>   arch/riscv/kvm/vcpu_sbi.c             | 26 ++++++++++++++++++++++++++
>   3 files changed, 37 insertions(+)
> 
> diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> index 4ed6203cdd30..bcb90757b149 100644
> --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> @@ -49,6 +49,14 @@ struct kvm_vcpu_sbi_extension {
>   
>   	/* Extension specific probe function */
>   	unsigned long (*probe)(struct kvm_vcpu *vcpu);
> +
> +	/*
> +	 * Init/deinit function called once during VCPU init/destroy. These
> +	 * might be use if the SBI extensions need to allocate or do specific
> +	 * init time only configuration.
> +	 */
> +	int (*init)(struct kvm_vcpu *vcpu);
> +	void (*deinit)(struct kvm_vcpu *vcpu);
>   };
>   
>   void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run);
> @@ -69,6 +77,7 @@ const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
>   bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx);
>   int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
>   void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
> +void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu);
>   
>   int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num,
>   				   unsigned long *reg_val);
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 60d684c76c58..877bcc85c067 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -185,6 +185,8 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
>   
>   void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
>   {
> +	kvm_riscv_vcpu_sbi_deinit(vcpu);
> +
>   	/* Cleanup VCPU AIA context */
>   	kvm_riscv_vcpu_aia_deinit(vcpu);
>   
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index d1c83a77735e..3139f171c20f 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -508,5 +508,31 @@ void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu)
>   		scontext->ext_status[idx] = ext->default_disabled ?
>   					KVM_RISCV_SBI_EXT_STATUS_DISABLED :
>   					KVM_RISCV_SBI_EXT_STATUS_ENABLED;
> +
> +		if (ext->init && ext->init(vcpu) != 0)
> +			scontext->ext_status[idx] = KVM_RISCV_SBI_EXT_STATUS_UNAVAILABLE;
> +	}
> +}
> +
> +void kvm_riscv_vcpu_sbi_deinit(struct kvm_vcpu *vcpu)
> +{
> +	struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context;
> +	const struct kvm_riscv_sbi_extension_entry *entry;
> +	const struct kvm_vcpu_sbi_extension *ext;
> +	int idx, i;
> +
> +	for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) {
> +		entry = &sbi_ext[i];
> +		ext = entry->ext_ptr;
> +		idx = entry->ext_idx;
> +
> +		if (idx < 0 || idx >= ARRAY_SIZE(scontext->ext_status))
> +			continue;
> +
> +		if (scontext->ext_status[idx] == KVM_RISCV_SBI_EXT_STATUS_UNAVAILABLE ||
> +		    !ext->deinit)
> +			continue;
> +
> +		ext->deinit(vcpu);
>   	}
>   }

LGTM.
Reviewed-by: Atish Patra <atishp@rivosinc.com>

  parent reply	other threads:[~2025-05-09  0:27 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-24 17:31 [PATCH v6 00/14] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-04-24 17:31 ` [PATCH v6 01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-05-08 20:17   ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 02/14] riscv: sbi: remove useless parenthesis Clément Léger
2025-04-25  7:46   ` Andrew Jones
2025-05-08 20:18   ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 03/14] riscv: sbi: add new SBI error mappings Clément Léger
2025-05-08 20:18   ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 04/14] riscv: sbi: add FWFT extension interface Clément Léger
2025-05-08 22:52   ` Atish Patra
2025-05-09  0:18   ` Atish Patra
2025-05-12  8:14     ` Clément Léger
2025-05-12 18:00       ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 05/14] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-05-08 23:01   ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 06/14] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-04-24 17:31 ` [PATCH v6 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-04-24 17:31 ` [PATCH v6 08/14] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-04-24 17:31 ` [PATCH v6 09/14] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-04-24 17:31 ` [PATCH v6 10/14] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-04-24 18:18   ` ALOK TIWARI
2025-04-24 17:31 ` [PATCH v6 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-05-08 17:27   ` Palmer Dabbelt
2025-05-09  3:20     ` Anup Patel
2025-05-09  0:26   ` Atish Patra [this message]
2025-04-24 17:31 ` [PATCH v6 12/14] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-05-09  0:28   ` Atish Patra
2025-04-24 17:32 ` [PATCH v6 13/14] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-05-09 18:49   ` Atish Patra
2025-04-24 17:32 ` [PATCH v6 14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-05-09 18:09   ` Atish Patra
2025-05-12  8:28     ` Clément Léger

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a34e5893-0b7e-47e7-a655-a49e3472e0e9@linux.dev \
    --to=atish.patra@linux.dev \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=atishp@atishpatra.org \
    --cc=cleger@rivosinc.com \
    --cc=corbet@lwn.net \
    --cc=debug@rivosinc.com \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=samuel.holland@sifive.com \
    --cc=shuah@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).