From: Yicong Yang <yangyicong@huawei.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: <catalin.marinas@arm.com>, <will@kernel.org>, <maz@kernel.org>,
<oliver.upton@linux.dev>, <corbet@lwn.net>,
<linux-arm-kernel@lists.infradead.org>, <kvmarm@lists.linux.dev>,
<linux-kselftest@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<yangyicong@hisilicon.com>, <joey.gouly@arm.com>,
<yuzenghui@huawei.com>, <shuah@kernel.org>,
<jonathan.cameron@huawei.com>,
<shameerali.kolothum.thodi@huawei.com>, <linuxarm@huawei.com>,
<prime.zeng@hisilicon.com>, <xuwei5@huawei.com>,
<tangchengchang@huawei.com>
Subject: Re: [PATCH v2 1/6] arm64: Provide basic EL2 setup for FEAT_{LS64, LS64_V} usage at EL0/1
Date: Mon, 7 Apr 2025 11:50:45 +0800 [thread overview]
Message-ID: <a520bb9c-839d-fd96-7ecf-365371e65e44@huawei.com> (raw)
In-Reply-To: <957ccba4-2ae1-4358-b62d-3b5c44d7f1ca@arm.com>
On 2025/4/3 17:04, Suzuki K Poulose wrote:
> On 31/03/2025 10:43, Yicong Yang wrote:
>> From: Yicong Yang <yangyicong@hisilicon.com>
>>
>> Instructions introduced by FEAT_{LS64, LS64_V} is controlled by
>> HCRX_EL2.{EnALS, EnASR}. Configure all of these to allow usage
>> at EL0/1.
>>
>> This doesn't mean these instructions are always available in
>> EL0/1 if provided. The hypervisor still have the control at
>> runtime.
>>
>> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
>> ---
>> arch/arm64/include/asm/el2_setup.h | 12 +++++++++++-
>> 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
>> index ebceaae3c749..0259941602c4 100644
>> --- a/arch/arm64/include/asm/el2_setup.h
>> +++ b/arch/arm64/include/asm/el2_setup.h
>> @@ -57,9 +57,19 @@
>> /* Enable GCS if supported */
>> mrs_s x1, SYS_ID_AA64PFR1_EL1
>> ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
>> - cbz x1, .Lset_hcrx_\@
>> + cbz x1, .Lskip_gcs_hcrx_\@
>> orr x0, x0, #HCRX_EL2_GCSEn
>> +.Lskip_gcs_hcrx_\@:
>
> minor nit: For consistency, could we rename this "set_ls64", similar to "set_hcrx" ?
>
IIUC, set_xxx really touches the registers and skip_xxx should just check and prepare
the feature bits. so here using .Lskip_gcs_hrcx_\@ should be more proper and consistent
with other places in el2_setup.h, like __init_el2_debug/__init_el2_fgt which also use
.Lskip_xxx for skipping an unsupported feature?
Thanks.
>> + /* Enable LS64, LS64_V if supported */
>> + mrs_s x1, SYS_ID_AA64ISAR1_EL1
>> + ubfx x1, x1, #ID_AA64ISAR1_EL1_LS64_SHIFT, #4
>> + cbz x1, .Lset_hcrx_\@
>> + orr x0, x0, #HCRX_EL2_EnALS
>> + cmp x1, #ID_AA64ISAR1_EL1_LS64_LS64_V
>> + b.lt .Lset_hcrx_\@
>> + orr x0, x0, #HCRX_EL2_EnASR
>> +
>> .Lset_hcrx_\@:
>> msr_s SYS_HCRX_EL2, x0
>> .Lskip_hcrx_\@:
>
> Suzuki
>
> .
next prev parent reply other threads:[~2025-04-07 3:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 9:43 [PATCH v2 0/6] Add support for FEAT_{LS64, LS64_V} and related tests Yicong Yang
2025-03-31 9:43 ` [PATCH v2 1/6] arm64: Provide basic EL2 setup for FEAT_{LS64, LS64_V} usage at EL0/1 Yicong Yang
2025-04-03 9:04 ` Suzuki K Poulose
2025-04-07 3:50 ` Yicong Yang [this message]
2025-04-29 14:47 ` Will Deacon
2025-04-29 14:47 ` Will Deacon
2025-03-31 9:43 ` [PATCH v2 2/6] arm64: Add support for FEAT_{LS64, LS64_V} Yicong Yang
2025-03-31 9:43 ` [PATCH v2 3/6] KVM: arm64: Enable FEAT_{LS64, LS64_V} in the supported guest Yicong Yang
2025-03-31 9:43 ` [PATCH v2 4/6] kselftest/arm64: Add HWCAP test for FEAT_{LS64, LS64_V} Yicong Yang
2025-03-31 9:43 ` [PATCH v2 5/6] arm64: Add ESR.DFSC definition of unsupported exclusive or atomic access Yicong Yang
2025-04-01 16:15 ` Oliver Upton
2025-04-07 3:33 ` Yicong Yang
2025-03-31 9:43 ` [PATCH v2 6/6] KVM: arm64: Handle DABT caused by LS64* instructions on unsupported memory Yicong Yang
2025-04-01 16:13 ` Oliver Upton
2025-04-07 3:33 ` Yicong Yang
2025-04-07 5:35 ` Oliver Upton
2025-04-08 8:11 ` Yicong Yang
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