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Rozycki" , "Thomas Bogendoerfer" Cc: "Jonathan Corbet" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, "linux-mips@vger.kernel.org" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v3] MIPS: Implement ieee754 NAN2008 emulation mode Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=8810=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=885:21=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A > On Wed, 10 Jul 2024, Thomas Bogendoerfer wrote: > >> > > I'm considering to apply your patch, how much testing/verificatio= n did >> > > this patch see ? Do have some test binaries ? >> >=20 >> > It has been tested against Debian rootfs. There is no need to test = againt special binary, >> > but you need NaN2008 hardware such as Loongson 3A4000. >>=20 >> that's just one case, what about NaN2008 binaries on a legacy MIPS CP= U ? > > It would be good to check with hard-float QEMU configured for writabl= e=20 > FCSR.NAN2008 (which is one way original code was verified) that things=20 > have not regressed. And also what happens if once our emulation has=20 > triggered for the unsupported FCSR.NAN2008 mode, an attempt is made to=20 > flip the mode bit via ptrace(2), e.g. under GDB, which I reckon our=20 > emulation permits for non-legacy CPUs (and which I think should not be=20 > allowed under the new setting). PTrace is working as expected (reflects emulated value). The actual switchable NaN hardware (M5150, P5600) uses a dedicated Confi= g7 bit rather than writable FCSR.NAN2008 to control NaN2008 mode. This is u= ndocumented and not present on some RTL releases. FCSR.NAN2008 is R/O as per The MIP= S32 Instruction Set Manual. This renders the purposed test pointless. That being said, I'll catch some time later to test behaviour with purpo= sed QEMU modification but I think it's good to go now.=20 Thanks - Jiaxun > > Maciej --=20 - Jiaxun