From: Catalin Marinas <catalin.marinas@arm.com>
To: Yeoreum Yun <yeoreum.yun@arm.com>, Peter Collingbourne <pcc@google.com>
Cc: will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com,
joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org,
oliver.upton@linux.dev, frederic@kernel.org,
shmeerali.kolothum.thodi@huawei.com, james.morse@arm.com,
mark.rutland@arm.com, huangxiaojia2@huawei.com,
akpm@linux-foundation.org, surenb@google.com,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
nd@arm.com
Subject: Re: [PATCH v3 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported
Date: Fri, 2 May 2025 18:08:21 +0100 [thread overview]
Message-ID: <aBT8BWqoljvcAU_w@arm.com> (raw)
In-Reply-To: <20250410074721.947380-3-yeoreum.yun@arm.com>
+ Peter Collingbourne as he added the SA_EXPOSE_TAGBITS flag.
On Thu, Apr 10, 2025 at 08:47:20AM +0100, Yeoreum Yun wrote:
> Use the original FAR_EL1 value when an MTE tag check fault occurs,
> if ARM64_MTE_FAR is supported.
> This allows reports to include not only the logical tag (memory tag)
> but also the address tag information.
>
> Applications that require this information should install a signal handler with
> the SA_EXPOSE_TAGBITS flag.
> While this introduces a minor ABI change,
> most applications do not set this flag and therefore will not be affected.
It is indeed a minor ABI in that a tag check fault resulting in a
signal will report the bits 63:60 as well, not just 59:56 of the address
(if the signal handler was registered with SA_EXPOSE_TAGBITS).
I don't think user-space would notice but asking Peter.
> Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> ---
> arch/arm64/mm/fault.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index ec0a337891dd..f21d972f99b1 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -837,9 +837,12 @@ static int do_tag_check_fault(unsigned long far, unsigned long esr,
> /*
> * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
> * for tag check faults. Set them to corresponding bits in the untagged
> - * address.
> + * address if ARM64_MTE_FAR isn't supported.
> + * Otherwise, bits 63:60 of FAR_EL1 are KNOWN.
> */
> - far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
> + if (!cpus_have_cap(ARM64_MTE_FAR))
> + far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
> +
> do_bad_area(far, esr, regs);
> return 0;
> }
> --
> LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}
next prev parent reply other threads:[~2025-05-02 17:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-10 7:47 [PATCH v3 0/3] support FEAT_MTE_TAGGED_FAR feature Yeoreum Yun
2025-04-10 7:47 ` [PATCH v3 1/3] arm64: add " Yeoreum Yun
2025-05-02 17:12 ` Catalin Marinas
2025-05-06 23:54 ` Yeoreum Yun
2025-04-10 7:47 ` [PATCH v3 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported Yeoreum Yun
2025-05-02 17:08 ` Catalin Marinas [this message]
2025-05-02 18:25 ` Peter Collingbourne
2025-05-06 14:33 ` Yeoreum Yun
2025-04-10 7:47 ` [PATCH v3 3/3] tools/kselftest: add MTE_FAR hwcap test Yeoreum Yun
2025-05-02 17:15 ` Catalin Marinas
2025-05-06 23:56 ` Yeoreum Yun
2025-04-24 13:49 ` [PATCH v3 0/3] support FEAT_MTE_TAGGED_FAR feature Yeoreum Yun
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