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From: Oliver Upton <oliver.upton@linux.dev>
To: Colton Lewis <coltonlewis@google.com>
Cc: kvm@vger.kernel.org, pbonzini@redhat.com, corbet@lwn.net,
	linux@armlinux.org.uk, catalin.marinas@arm.com, will@kernel.org,
	maz@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com,
	yuzenghui@huawei.com, mark.rutland@arm.com, shuah@kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-perf-users@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v2 01/23] arm64: cpufeature: Add cpucap for HPMN0
Date: Tue, 24 Jun 2025 00:28:05 -0700	[thread overview]
Message-ID: <aFpThZIE2PxjVAVw@linux.dev> (raw)
In-Reply-To: <gsntqzza9uxp.fsf@coltonlewis-kvm.c.googlers.com>

On Mon, Jun 23, 2025 at 06:25:38PM +0000, Colton Lewis wrote:
> Oliver Upton <oliver.upton@linux.dev> writes:
> 
> > On Fri, Jun 20, 2025 at 10:13:01PM +0000, Colton Lewis wrote:
> > > Add a capability for FEAT_HPMN0, whether MDCR_EL2.HPMN can specify 0
> > > counters reserved for the guest.
> 
> > > This required changing HPMN0 to an UnsignedEnum in tools/sysreg
> > > because otherwise not all the appropriate macros are generated to add
> > > it to arm64_cpu_capabilities_arm64_features.
> 
> > > Signed-off-by: Colton Lewis <coltonlewis@google.com>
> > > ---
> > >   arch/arm64/kernel/cpufeature.c | 8 ++++++++
> > >   arch/arm64/tools/cpucaps       | 1 +
> > >   arch/arm64/tools/sysreg        | 6 +++---
> > >   3 files changed, 12 insertions(+), 3 deletions(-)
> 
> > > diff --git a/arch/arm64/kernel/cpufeature.c
> > > b/arch/arm64/kernel/cpufeature.c
> > > index b34044e20128..278294fdc97d 100644
> > > --- a/arch/arm64/kernel/cpufeature.c
> > > +++ b/arch/arm64/kernel/cpufeature.c
> > > @@ -548,6 +548,7 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
> > >   };
> 
> > >   static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
> > > +	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_HPMN0_SHIFT, 4, 0),
> > >   	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_DoubleLock_SHIFT, 4, 0),
> > >   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_PMSVer_SHIFT, 4, 0),
> > >   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_CTX_CMPs_SHIFT, 4, 0),
> > > @@ -2896,6 +2897,13 @@ static const struct arm64_cpu_capabilities
> > > arm64_features[] = {
> > >   		.matches = has_cpuid_feature,
> > >   		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, FGT2)
> > >   	},
> > > +	{
> > > +		.desc = "Allow MDCR_EL2.HPMN = 0",
> 
> > This feedback still stands...
> 
> > 		.desc = "HPMN0",
> 
> > [*] https://lore.kernel.org/kvm/aD4ijUaSGm9b2g5H@linux.dev/
> 
> Sorry for ignoring your previous feedback. I looked at the other .desc
> fields and they had more descriptive English, so I think this one should
> be more than "FEAT_HPMN0" for consistency.
> 
> If you insist I'll change it.

I'm not exactly sold on the merits of using descriptive names for the
capabilities, as the architecture extension names are exact terms that
can be related back to documentation.

Thanks,
Oliver

  reply	other threads:[~2025-06-24  7:28 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-20 22:13 [PATCH v2 00/23] ARM64 PMU Partitioning Colton Lewis
2025-06-20 22:13 ` [PATCH v2 01/23] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2025-06-21  0:44   ` Oliver Upton
2025-06-23 18:25     ` Colton Lewis
2025-06-24  7:28       ` Oliver Upton [this message]
2025-06-24 20:05         ` Colton Lewis
2025-06-20 22:13 ` [PATCH v2 02/23] arm64: Generate sign macro for sysreg Enums Colton Lewis
2025-06-20 22:13 ` [PATCH v2 03/23] arm64: cpufeature: Add cpucap for PMICNTR Colton Lewis
2025-06-21  0:45   ` Oliver Upton
2025-06-23 18:25     ` Colton Lewis
2025-06-20 22:13 ` [PATCH v2 04/23] arm64: Define PMI{CNTR,FILTR}_EL0 as undef_access Colton Lewis
2025-06-20 22:13 ` [PATCH v2 05/23] KVM: arm64: Cleanup PMU includes Colton Lewis
2025-06-21 14:56   ` kernel test robot
2025-06-23 22:04     ` Colton Lewis
2025-06-20 22:13 ` [PATCH v2 06/23] KVM: arm64: Reorganize PMU functions Colton Lewis
2025-06-20 22:13 ` [PATCH v2 07/23] perf: arm_pmuv3: Introduce method to partition the PMU Colton Lewis
2025-06-21  1:06   ` Oliver Upton
2025-06-23 18:26     ` Colton Lewis
2025-06-24  7:05       ` Oliver Upton
2025-06-24 20:05         ` Colton Lewis
2025-06-20 22:13 ` [PATCH v2 07/23] perf: pmuv3: " Colton Lewis
2025-06-20 22:13 ` [PATCH v2 08/23] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-06-20 22:13 ` [PATCH v2 09/23] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-06-20 22:13 ` [PATCH v2 10/23] KVM: arm64: Correct kvm_arm_pmu_get_max_counters() Colton Lewis
2025-06-20 22:13 ` [PATCH v2 11/23] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2025-06-20 22:13 ` [PATCH v2 12/23] KVM: arm64: Writethrough trapped PMEVTYPER register Colton Lewis
2025-06-20 22:13 ` [PATCH v2 13/23] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned Colton Lewis
2025-06-20 22:13 ` [PATCH v2 14/23] KVM: arm64: Writethrough trapped PMOVS register Colton Lewis
2025-06-20 22:13 ` [PATCH v2 15/23] KVM: arm64: Write fast path PMU register handlers Colton Lewis
2025-06-20 22:13 ` [PATCH v2 16/23] KVM: arm64: Setup MDCR_EL2 to handle a partitioned PMU Colton Lewis
2025-06-20 22:13 ` [PATCH v2 17/23] KVM: arm64: Account for partitioning in PMCR_EL0 access Colton Lewis
2025-06-22  9:32   ` kernel test robot
2025-06-23 22:11     ` Colton Lewis
2025-06-20 22:13 ` [PATCH v2 18/23] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2025-06-20 22:13 ` [PATCH v2 19/23] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2025-06-20 22:13 ` [PATCH v2 20/23] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2025-06-20 22:13 ` [PATCH v2 20/23] perf: pmuv3: " Colton Lewis
2025-06-20 22:13 ` [PATCH v2 21/23] KVM: arm64: Inject recorded guest interrupts Colton Lewis
2025-06-20 22:13 ` [PATCH v2 22/23] KVM: arm64: Add ioctl to partition the PMU when supported Colton Lewis
2025-06-20 22:13 ` [PATCH v2 23/23] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis

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