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Wed, 02 Jul 2025 17:22:41 -0700 (PDT) Received: from archie.me ([103.124.138.155]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-74af57ee836sm15934075b3a.152.2025.07.02.17.22.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Jul 2025 17:22:40 -0700 (PDT) Received: by archie.me (Postfix, from userid 1000) id A043E4206887; Thu, 03 Jul 2025 07:22:38 +0700 (WIB) Date: Thu, 3 Jul 2025 07:22:38 +0700 From: Bagas Sanjaya To: Alexandre Courbot , Danilo Krummrich , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet Cc: nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, rust-for-linux@vger.kernel.org, Joel Fernandes Subject: Re: [PATCH v3 5/7] Documentation: gpu: nova-core: Document devinit process Message-ID: References: <20250702-nova-docs-v3-0-f362260813e2@nvidia.com> <20250702-nova-docs-v3-5-f362260813e2@nvidia.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="xHavB6NUYjLSItap" Content-Disposition: inline In-Reply-To: <20250702-nova-docs-v3-5-f362260813e2@nvidia.com> --xHavB6NUYjLSItap Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jul 02, 2025 at 08:00:42PM +0900, Alexandre Courbot wrote: > diff --git a/Documentation/gpu/nova/core/devinit.rst b/Documentation/gpu/= nova/core/devinit.rst > new file mode 100644 > index 0000000000000000000000000000000000000000..70c819a96a00a0a27846e7e96= 525470d07721a10 > --- /dev/null > +++ b/Documentation/gpu/nova/core/devinit.rst > @@ -0,0 +1,61 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > +Device Initialization (devinit) > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > +The devinit process is complex and subject to change. This document prov= ides a high-level > +overview using the Ampere GPU family as an example. The goal is to provi= de a conceptual > +overview of the process to aid in understanding the corresponding kernel= code. > + > +Device initialization (devinit) is a crucial sequence of register read/w= rite operations > +that occur after a GPU reset. The devinit sequence is essential for prop= erly configuring > +the GPU hardware before it can be used. > + > +The devinit engine is an interpreter program that typically runs on the = PMU (Power Management > +Unit) microcontroller of the GPU. This interpreter executes a "script" o= f initialization > +commands. The devinit engine itself is part of the VBIOS ROM in the same= ROM image as the > +FWSEC (Firmware Security) image (see fwsec.rst and vbios.rst) and it run= s before the > +nova-core driver is even loaded. On an Ampere GPU, the devinit ucode is = separate from the > +FWSEC ucode. It is launched by FWSEC, which runs on the GSP in 'heavy-se= cure' mode, while > +devinit runs on the PMU in 'light-secure' mode. > + > +Key Functions of devinit > +------------------------ > +devinit performs several critical tasks: > + > +1. Programming VRAM memory controller timings > +2. Power sequencing > +3. Clock and PLL (Phase-Locked Loop) configuration > +4. Thermal management > + > +Low-level Firmware Initialization Flow > +-------------------------------------- > +Upon reset, several microcontrollers on the GPU (such as PMU, SEC2, GSP,= etc.) run GPU > +firmware (gfw) code to set up the GPU and its core parameters. Most of t= he GPU is > +considered unusable until this initialization process completes. > + > +These low-level GPU firmware components are typically: > + > +1. Located in the VBIOS ROM in the same ROM partition (see vbios.rst and= fwsec.rst). > +2. Executed in sequence on different microcontrollers: > + > + - The devinit engine typically but not necessarily runs on the PMU. > + - On an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Pr= ocessor) in > + heavy-secure mode. > + > +Before the driver can proceed with further initialization, it must wait = for a signal > +indicating that core initialization is complete (known as GFW_BOOT). Thi= s signal is > +asserted by the FWSEC running on the GSP in heavy-secure mode. > + > +Runtime Considerations > +---------------------- > +It's important to note that the devinit sequence also needs to run durin= g suspend/resume > +operations at runtime, not just during initial boot, as it is critical t= o power management. > + > +Security and Access Control > +--------------------------- > +The initialization process involves careful privilege management. For ex= ample, before > +accessing certain completion status registers, the driver must check pri= vilege level > +masks. Some registers are only accessible after secure firmware (FWSEC) = lowers the > +privilege level to allow CPU (LS/low-secure) access. This is the case, f= or example, > +when receiving the GFW_BOOT signal. The wording LGTM, thanks! Reviewed-by: Bagas Sanjaya --=20 An old man doll... just what I always wanted! - Clara --xHavB6NUYjLSItap Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCaGXNTgAKCRD2uYlJVVFO oyaYAP9dYPzPZJL4k8IbXaAQtRvwo3hRmPlPJlB7ltR0JkTvWQEA7+RK8r3cbs8g jtqTlDMdRiku8fBY+ztaUKmS/DfOvg8= =+EEX -----END PGP SIGNATURE----- --xHavB6NUYjLSItap--