From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Marcelo Schmitt <marcelo.schmitt@analog.com>
Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
jic23@kernel.org, michael.hennerich@analog.com,
nuno.sa@analog.com, eblanc@baylibre.com, dlechner@baylibre.com,
andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, corbet@lwn.net, marcelo.schmitt1@gmail.com
Subject: Re: [PATCH v5 7/7] iio: adc: ad4030: Add support for ADAQ4216 and ADAQ4224
Date: Wed, 15 Oct 2025 16:56:26 +0300 [thread overview]
Message-ID: <aO-oCoCLNY7fPQEB@smile.fi.intel.com> (raw)
In-Reply-To: <95db7ffb928f4707c2e68a906a35b826c6a1d29b.1760479760.git.marcelo.schmitt@analog.com>
On Tue, Oct 14, 2025 at 07:22:51PM -0300, Marcelo Schmitt wrote:
> ADAQ4216 and ADAQ4224 are similar to AD4030, but feature a PGA circuitry
> that scales the analog input signal prior to it reaching the ADC. The PGA
> is controlled through a pair of pins (A0 and A1) whose state define the
> gain that is applied to the input signal.
>
> Add support for ADAQ4216 and ADAQ4224. Provide a list of PGA options
> through the IIO device channel scale available interface and enable control
> of the PGA through the channel scale interface.
...
> +/*
> + * Gains computed as fractions of 1000 so they can be expressed by integers.
> + */
> +static const int adaq4216_hw_gains_vpv[] = {
> + MILLI / 3, /* 333 */
> + (5 * MILLI / 9), /* 555 */
> + (20 * MILLI / 9), /* 2222 */
> + (20 * MILLI / 3), /* 6666 */
Redundant parentheses, or do you mean to make multiplication first?
E.g., (5 * MILL) / 9 ?
> +};
...
> +static void ad4030_fill_scale_avail(struct ad4030_state *st)
> +{
> + unsigned int mag_bits, int_part, fract_part, i;
> + u64 range;
> +
> + /*
> + * The maximum precision of differential channels is retrieved from the
> + * chip properties. The output code of differential channels is in two's
> + * complement format (i.e. signed), so the MSB is the sign bit and only
> + * (precision_bits - 1) bits express voltage magnitude.
> + */
> + mag_bits = st->chip->precision_bits - 1;
> +
> + for (i = 0; i < ARRAY_SIZE(adaq4216_hw_gains_frac); i++) {
> + range = mult_frac(st->vref_uv, adaq4216_hw_gains_frac[i][1],
> + adaq4216_hw_gains_frac[i][0]);
> + /*
> + * If range were in mV, we would multiply it by NANO below.
> + * Though, range is in µV so multiply it by MICRO only so the
> + * result after right shift and division scales output codes to
> + * millivolts.
> + */
> + int_part = div_u64_rem(((u64)range * MICRO) >> mag_bits, NANO, &fract_part);
The "range" is of type u64. Any specific reason why cast?
> + st->scale_avail[i][0] = int_part;
> + st->scale_avail[i][1] = fract_part;
> + }
> +}
...
> +static int ad4030_setup_pga(struct device *dev, struct iio_dev *indio_dev,
> + struct ad4030_state *st)
> +{
> + /* Setup GPIOs for PGA control */
> + st->pga_gpios = devm_gpiod_get_array(dev, "pga", GPIOD_OUT_LOW);
> + if (IS_ERR(st->pga_gpios))
> + return dev_err_probe(dev, PTR_ERR(st->pga_gpios),
> + "Failed to get PGA gpios.\n");
> +
> + if (st->pga_gpios->ndescs != ADAQ4616_PGA_PINS)
> + return dev_err_probe(dev, -EINVAL,
> + "Expected 2 GPIOs for PGA control.\n");
2 --> %d and constant or __stringify(MY_COOL_CONSTANT). However, I am not sure
if the latter is acceptable in IIO.
> +
> + st->scale_avail_size = ARRAY_SIZE(adaq4216_hw_gains_vpv);
> + st->pga_index = 0;
> +
> + return 0;
> +}
--
With Best Regards,
Andy Shevchenko
prev parent reply other threads:[~2025-10-18 17:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 22:20 [PATCH v5 0/7] Add SPI offload support to AD4030 Marcelo Schmitt
2025-10-14 22:21 ` [PATCH v5 1/7] dt-bindings: iio: adc: adi,ad4030: Reference spi-peripheral-props Marcelo Schmitt
2025-10-14 22:21 ` [PATCH v5 2/7] Docs: iio: ad4030: Add double PWM SPI offload doc Marcelo Schmitt
2025-10-14 22:21 ` [PATCH v5 3/7] dt-bindings: iio: adc: adi,ad4030: Add PWM Marcelo Schmitt
2025-10-14 22:21 ` [PATCH v5 4/7] iio: adc: ad4030: Use BIT macro to improve code readability Marcelo Schmitt
2025-10-15 13:46 ` Andy Shevchenko
2025-10-17 14:14 ` Nuno Sá
2025-10-14 22:22 ` [PATCH v5 5/7] iio: adc: ad4030: Add SPI offload support Marcelo Schmitt
2025-10-16 16:40 ` David Lechner
2025-10-17 11:35 ` Marcelo Schmitt
2025-10-17 15:03 ` Nuno Sá
2025-10-17 15:02 ` Nuno Sá
2025-10-17 19:54 ` Marcelo Schmitt
2025-10-18 14:16 ` Nuno Sá
2025-10-14 22:22 ` [PATCH v5 6/7] dt-bindings: iio: adc: adi,ad4030: Add ADAQ4216 and ADAQ4224 Marcelo Schmitt
2025-10-16 16:30 ` Conor Dooley
2025-10-14 22:22 ` [PATCH v5 7/7] iio: adc: ad4030: Add support for " Marcelo Schmitt
2025-10-15 13:56 ` Andy Shevchenko [this message]
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