Re: [PATCH v4 3/3] Documentation/driver-api/cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement

[Gregory Price <gourry@gourry.net>]

On Thu, Jan 22, 2026 at 06:24:29PM +0100, Robert Richter wrote:
> +
> +The following changes to the specification are needed:
> +
> +* Allow a CXL device to be in an HPA space other than the host's address space.
> +
> +* Allow the platform to use implementation-specific address translation when
> +  crossing memory domains on the CXL.mem path between the host and the device.
> +
> +* Recommend that the platform provide a method for the OS to convert device
> +  addresses to SPAs, such as a PRM handler or _DSM. Document _DSM as the
> +  preferred method.
> +
> +* Specify that the kernel (Operating System) determines Endpoint SPA ranges and
> +  interleaving configurations using platform-specific address translation
> +  methods.
> +

As-written for the state of things - this is fine. Just making a note given
feedback on the translation patch set here:
https://lore.kernel.org/linux-cxl/697186008aa26_1d6f10061@dwillia2-mobl4.notmuch/

If the spec is updated to include such translation tables as described
in the discussion above, then this should probably be updated to say:

---
     Platform shall provide the appropriate CEDT translation tables.

     If the translation mechanism can't be encoded into tables, then it's
     on the platform to justify this and provide PRM or _DSM (etc etc.).
---

~Gregory