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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?5b2iNDeyb2toejQQdvYanC5rfqvPbY7Uohj9VeY/t+1yEWhq9hPQfdf+9L/t?= =?us-ascii?Q?6wfL17ouSLdf6vOh/CC/5F8xblU9yHyytkGeVa/iW+Ir/q5WrdwjgsLnMTpO?= =?us-ascii?Q?QssF4IJwRqrtwyYx7pXWcK1hVVPjB4S5HUdAiMV3+QAuN4z0vuN8b7+SHMlE?= =?us-ascii?Q?1mdaavmjEvOgf3JkCIHrTYoPg8WQlnNPBtd0fSedW/YTN8QXUlCBeOi8UYqt?= =?us-ascii?Q?/vXm7Ikpagi45fhxXkmTsXU9oLu4snhqsVueBaTA0mPik8c/poxgGliMn3Ro?= =?us-ascii?Q?rrzWq0Gcpf2dZDnUf9dGYxC4u4O6pP2aSttTudvSeUH2Y6NFWblUmBB0kFcb?= =?us-ascii?Q?kobL6+gNEsAIeG5JishEmWxm2URAGonakX2Y+U0AoE7jWnx3Xv/k9Vxc3x3Z?= =?us-ascii?Q?TApApHlWGY/vGURdk6MwBPcQvfVOcwCnCC5dwb3tTz0TzsOre3ZKRRDJDOQc?= =?us-ascii?Q?E8nj6NSLpmgaNkg0eegncW2qZLdLG0cBpjj/MRXhJoLG+Ms3leA45+mirxCh?= =?us-ascii?Q?laXS8MbQON0AiHBugcgMW6NVaZLOmp+Zl8HyXWJTcBq1JHXf4rhV7ruRQysC?= =?us-ascii?Q?L/vmgnLTkIKY1r39iJ2/w/hE+0L4nVXaBvdH2EYTXOYUz7SCCmPzN/uCkdcA?= =?us-ascii?Q?uqp4gypys9krIRey/RPLooIIw3Osv1O0k6gr3yVKUAXHmqMAB/B6qzRdF45C?= =?us-ascii?Q?9oqb1uceUoh8JpM7gWPc1qWgGTo59EBztTtGXXf5FPFwHX6CHKzkZ5eKY1GL?= =?us-ascii?Q?OW1JofJvNh8gKsILf5OJa2kHbmGmwGGRRgfquFfAyqUqxycSOcRa1jGaKQJJ?= =?us-ascii?Q?jZadrr/CirjzJ8vNImzkz4iGAQYa2PIoHFTC9yAZrwSiBFEqtbKYVbW6thUV?= =?us-ascii?Q?IJgcTKVNZp4L+OCyldlMRjK2Z9IjvpReqdjbRQMPaygx9NRW7CuHH7HuLrq6?= =?us-ascii?Q?6K1Qv11D45Fcq2BqTOKHgnVN4AuS1U+huYT4p3LeXuO4stG/zVseUBPSeV94?= =?us-ascii?Q?r968wLDl7zntS1Rn2yB3LZ2oa1JywIICeYsbWpEGaqPIuqMVPIqkXrmHtTWA?= =?us-ascii?Q?hmttThl7M9+omGwxjUb7eOJ7igOTw9R8+/W+V7AvfYWiNpfTnrFrWTsi4PNQ?= =?us-ascii?Q?y0Hi33Enpd6XLQ2QlIHeHhwpGT2mNTNb+06Yq3qUuHaBPwlh4Fd72vrZ7FMx?= =?us-ascii?Q?TQjEv3H6RRCJ6mfbanTFprLGmhRH9YWxw4HZ5KSIGPPWAoCfPVvAZu3er2Re?= =?us-ascii?Q?C2peEYLfISoqwgqHyKyq+p60+z3Fc8BuFb1W8orrt3+Rtf7U4wzR53Gumfyv?= =?us-ascii?Q?X8ivaejtWXnMZoNZGsjm+sTEO27CaSWRD+38KhcGMyG4eyM3p2HHZ6Pfwh0k?= =?us-ascii?Q?VOEwji7hC6B76Irw08MKefQ2NMCy+I49JEOBic9V1Bz7l+xHAqqNm5077Mj3?= =?us-ascii?Q?NTqN//q2NLlyO2ZCqvw8MC50t678QYmLiOlaYkynYuGMFNmuc8JWMbIhLK+Q?= =?us-ascii?Q?yBAkbl8NCNrdSG+fVEj4wkcmJ3oStGb8gZbm6EFFFN8mtjq1sOJEW7QmcOtO?= =?us-ascii?Q?bWO0LXt+AERNqzGLRYkAxUxO/r3x02J23MkfcTMUlmgq/8Ks0egdtmHjOduH?= =?us-ascii?Q?bdD+WuKisjOmNNp28xhIbkm2ItbnwCWDHU3iP5kOhdaQU+pmGyUVrdUneXgo?= =?us-ascii?Q?s0TOepE6G3ywW/i6qxfnIIo7tHicE8+STI99aiDSEo4CtUjyT1dWQoJb7Zjk?= =?us-ascii?Q?z7liWQwdng=3D=3D?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: d505b2d2-be03-4a8b-fe62-08de5f201ddc X-MS-Exchange-CrossTenant-AuthSource: CYYPR12MB8750.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jan 2026 10:21:10.1333 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 3gN2JkO2IMAPO6E1XMXnsZvwVnF6vCqXwhhp8u7TKjgO/SVO6f16fa7bH/EulQ16Xm4d1fDvnF8IqZyleLQQuA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8106 On 28.01.26 11:23:34, dan.j.williams@intel.com wrote: > Robert Richter wrote: > [..] > > the Zen5 machines only use the PRM method as described. They have been > > out for more than a year now with stable firmware. Moving to _DSM > > would require a new firmware release and force all of them to run a > > firmware update. > > Ok, so then do not document _DSM as an option in the convention > document. Only document what has been shipped and require anything that > follows to not deviate from that de facto "standard". Ok, thanks, will update the documentation. > > I was confused by this convention document offering optionality (direct > PRM or _DSM) and then requiring that the kernel accommodate the less > preferred option (direct PRM). If there are no plans for the only > existing implementation in the ecosystem to support _DSM then simply > require direct PRM forevermore. Oh, I thought you were aware of the existing PRM implementation and then wanted me to specify _DSM in the spec, so I started with that. > > > > ...and for the implementation can you update it to only invoke a _DSM > > > and hide the fact that it might be implemented by PRM on the backend? > > > > Additionally, a kernel implementation change is needed including > > another test and review cycle. As you described, the implementation on > > the BIOS side would probably be a _DSM wrapper in AML added to the > > SSDT that calls the actual PRM handler. An alternative is an ACPI > > quirk injecting that as AML code, but that makes things worse. IMO, > > all this is not worth the effort just to define the interface as _DSM > > only, and then use a wrapper to call it. Plus, there will probably be > > no platforms that adopt this. > > > > I really would like to see PRM and _DSM coexist in the spec to avoid > > all that. We could restrict the PRM GUID to the one currently used to > > avoid other PRM handlers coming up (if platforms adopt this at all). > > Please consider that. > > No, please no coexistence of alternatives. Direct PRM is shipping, catch > Linux up with this singular reality, close the door on future changes in > this space. Understood. > > If there is ever a "next time" for a different platform concept, > strongly prefer a static table + native driver enabling approach. The translation algorithms are not trivial, see around AMD_ATL and in drivers/ras/amd/atl/. For CXL, PCIe comes into play in addition to handle that. Anyway, thanks for your quick response. Will send a v5. -Robert