From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3071243635C; Tue, 31 Mar 2026 17:31:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774978305; cv=none; b=sY1vweNPCLT15i8FzG/TNOazxAqoI+s3IODawlGqYcbjE9hPjK/z6eAyIoAh8FSayiZ+9cDTrKN90aKC06YG9wbn9unVwORbp/rfuNoMx3ymD7h39P9+cj93NOTqO8Eu98lzRGvkPcL1VmAo6FFudfzLStqq7Y+gjFq+ia7UBiw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774978305; c=relaxed/simple; bh=3i1Gq4JAIizBknxjSLlecxNj8YdouZQOldf/Gi8SPcc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=uI2WBVD1KNj/vbWPOt8JZdWy1rES0FBPi4tnEWCPjHrzq+upMhOBFbT8Hn5pL0uUW9iz98AFvjVbiqTVIPCTdyUQt3VLIVJZFvYpCk32uiZnjAywTHiQjzgStwt7DukC5Xk5ARGF/9TEUdbbGB9K8gwv23WpnwYMa/uA95+wD+8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=WDzivK/a; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="WDzivK/a" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C85B1D31; Tue, 31 Mar 2026 10:31:36 -0700 (PDT) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BDE373F915; Tue, 31 Mar 2026 10:31:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774978302; bh=3i1Gq4JAIizBknxjSLlecxNj8YdouZQOldf/Gi8SPcc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WDzivK/ay0BT4/Mfila47ssOCUKcoC8mcE1OJ3YzJDm9s79Zs686E4kzJf4HRuKB6 lpHJ/DyPCzQqdZR0SBq1PcmDDq9UF0avGeThJW47JsQ4fAL+D9oqkCMCvB+7zuGSCf u5jO9aDk1QLnYCQi+3kmjhvfmGJUmFBpQyUk3kzE= Date: Tue, 31 Mar 2026 18:31:33 +0100 From: Catalin Marinas To: Chengwen Feng Cc: Bjorn Helgaas , Will Deacon , "Rafael J . Wysocki" , Jonathan Corbet , Palmer Dabbelt , Borislav Petkov , "H . Peter Anvin" , Juergen Gross , Boris Ostrovsky , Len Brown , Sunil V L , Mark Rutland , Jonathan Cameron , Kees Cook , Yanteng Si , Sean Christopherson , Kai Huang , Tom Lendacky , Thomas Huth , Thorsten Blum , Kevin Loughlin , Zheyun Shen , Peter Zijlstra , Pawan Gupta , Xin Li , "Ahmed S . Darwish" , Sohil Mehta , Ilkka Koskinen , Robin Murphy , James Clark , Besar Wicaksono , Ma Ke , Wei Huang , Andy Gospodarek , Somnath Kotur , punit.agrawal@oss.qualcomm.com, guohanjun@huawei.com, suzuki.poulose@arm.com, ryan.roberts@arm.com, chenl311@chinatelecom.cn, masahiroy@kernel.org, wangyuquan1236@phytium.com.cn, anshuman.khandual@arm.com, heinrich.schuchardt@canonical.com, Eric.VanTassell@amd.com, wangzhou1@hisilicon.com, wanghuiqiang@huawei.com, liuyonglong@huawei.com, linux-pci@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, loongarch@lists.linux.dev, linux-riscv@lists.infradead.org, xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org, linux-perf-users@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v10 0/8] ACPI: Unify CPU UID interface and fix ARM64 TPH steer-tag issue Message-ID: References: <20260320031737.35048-1-fengchengwen@huawei.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260320031737.35048-1-fengchengwen@huawei.com> On Fri, Mar 20, 2026 at 11:17:29AM +0800, Chengwen Feng wrote: > This patchset unifies ACPI Processor UID retrieval across > arm64/loongarch/riscv/x86 via acpi_get_cpu_uid() (with input validation) > and fixes ARM64 CPU steer-tag retrieval failure in PCI/TPH: > > 1-4: Add acpi_get_cpu_uid() for arm64/loongarch/riscv/x86 (update > respective users) > 5: Centralize acpi_get_cpu_uid() declaration in include/linux/acpi.h > 6: Clean up perf/arm_cspmu > 7: Clean up ACPI/PPTT and remove unused get_acpi_id_for_cpu() > 8: Pass ACPI Processor UID to Cache Locality _DSM > > The interface refactor ensures consistent CPU UID retrieval across > architectures (no functional changes for valid inputs) and provides the > unified interface required for the ARM64 TPH fix. > > --- > Changes in v10: > - Refine commit header&log according to Punit's and Bjorn's review > - Split perf/arm_cspmu as a separate commit which address Punit's > review > > Changes in v9: > - Address Bjorn's review: split commits to each platform so that make > them easy to review > > Changes in v8: > - Moving arm64's get_cpu_for_acpi_id() to kernel/acpi.c which address > Jeremy's review > > Chengwen Feng (8): > arm64: acpi: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval > LoongArch: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval > RISC-V: ACPI: Add acpi_get_cpu_uid() for unified ACPI CPU UID > retrieval > x86/acpi: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval > ACPI: Centralize acpi_get_cpu_uid() declaration in > include/linux/acpi.h > perf: arm_cspmu: Switch to acpi_get_cpu_uid() from > get_acpi_id_for_cpu() > ACPI: PPTT: Use acpi_get_cpu_uid() and remove get_acpi_id_for_cpu() > PCI/TPH: Pass ACPI Processor UID to Cache Locality _DSM > > Documentation/PCI/tph.rst | 4 +-- > arch/arm64/include/asm/acpi.h | 17 +--------- > arch/arm64/kernel/acpi.c | 30 ++++++++++++++++++ For the arm64 bits: Acked-by: Catalin Marinas