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From: Sean Christopherson <seanjc@google.com>
To: David Woodhouse <dwmw2@infradead.org>
Cc: Luka Absandze <absandze@amazon.de>,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org,  Alexander Graf <graf@amazon.com>
Subject: Re: [RFC PATCH 0/2] KVM: x86/pmu: Let userspace disable SW accounting of emulated instructions
Date: Tue, 21 Jul 2026 10:05:16 -0700	[thread overview]
Message-ID: <al-mzECrdUsy0ThI@google.com> (raw)
In-Reply-To: <fab46e0b7217e9b712706074189f372f11c7ca19.camel@infradead.org>

On Tue, Jul 21, 2026, David Woodhouse wrote:
> On Tue, 2026-07-21 at 09:47 -0700, Sean Christopherson wrote:
> > On Tue, Jul 21, 2026, David Woodhouse wrote:
> > > On Mon, 2026-07-20 at 19:22 +0000, Luka Absandze wrote:
> > > > On hosts that run guests with an *emulated* vPMU -- guest PMU MSR
> > > > accesses trap into KVM and each guest counter is backed by a host
> > > > perf_event -- the per-emulated-instruction PMU accounting added by commit
> > > > 9cd803d496e7 ("KVM: x86: Update vPMCs when retiring instructions") is
> > > > pathologically expensive.
> > > 
> > > Given that the guest PMU MSR accesses are trapped... is there a reason
> > > we can't fold a *separate* count of emulated instructions into the
> > > value we return to the guest?
> > > 
> > > I guess the overflow would come late... but isn't that tolerable? 
> > 
> > Like ignoring emulated instructions entirely, it probably depends on the guest.
> > 
> > > And we could probably impose a limit on how large the addend could be — even
> > > if we only reprogram the PMU once every 100 times, that's still a win?
> > 
> > Hmm, yeah, that'd be better than ignoring emulated instruction entirely, and
> > would give userspace far better control over how shoddy KVM's emulation is.  Off
> > the cuff, the change would be fairly trivial too?  E.g.
> > 
> > diff --git arch/x86/kvm/pmu.c arch/x86/kvm/pmu.c
> > index 7f777049d328..c5f436c6f83f 100644
> > --- arch/x86/kvm/pmu.c
> > +++ arch/x86/kvm/pmu.c
> > @@ -1084,7 +1084,8 @@ static void kvm_pmu_incr_counter(struct kvm_pmc *pmc)
> >          */
> >         if (!kvm_vcpu_has_mediated_pmu(vcpu)) {
> >                 pmc->emulated_counter++;
> > -               kvm_pmu_request_counter_reprogram(pmc);
> > +               if (pmc->emulated_counter > pmu_something_something_tolerance)
> > +                       kvm_pmu_request_counter_reprogram(pmc);
> >                 return;
> >         }
> > 
> 
> We also want to add the same delta when the the guest reads the counter?

Isn't that already handled by pmc_read_counter()?  Or am I misunderstanding the
concern?

  static inline u64 pmc_read_counter(struct kvm_pmc *pmc)
  {
	u64 counter, enabled, running;

	if (kvm_vcpu_has_mediated_pmu(pmc->vcpu))
		return pmc->counter & pmc_bitmask(pmc);

	counter = pmc->counter + pmc->emulated_counter;  <===============

	if (pmc->perf_event && !pmc->is_paused)
		counter += perf_event_read_value(pmc->perf_event,
						 &enabled, &running);
	/* FIXME: Scaling needed? */
	return counter & pmc_bitmask(pmc);
  }

  reply	other threads:[~2026-07-21 17:05 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-20 19:22 [RFC PATCH 0/2] KVM: x86/pmu: Let userspace disable SW accounting of emulated instructions Luka Absandze
2026-07-20 19:22 ` [RFC PATCH 1/2] KVM: x86/pmu: Add CAP to " Luka Absandze
2026-07-20 22:27   ` Sean Christopherson
2026-07-21  7:33     ` David Woodhouse
2026-07-21 16:53       ` Sean Christopherson
2026-07-21 19:43         ` David Woodhouse
2026-07-20 19:22 ` [RFC PATCH 2/2] KVM: Documentation: Document KVM_CAP_X86_DISABLE_PMU_SW_ACCOUNTING Luka Absandze
2026-07-21  7:32 ` [RFC PATCH 0/2] KVM: x86/pmu: Let userspace disable SW accounting of emulated instructions David Woodhouse
2026-07-21 16:47   ` Sean Christopherson
2026-07-21 16:55     ` David Woodhouse
2026-07-21 17:05       ` Sean Christopherson [this message]
2026-07-21 17:32     ` Absandze, Luka
2026-07-21 17:49       ` Sean Christopherson

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