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[175.34.8.244]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b083690346sm126192525ad.70.2026.03.23.20.56.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Mar 2026 20:57:11 -0700 (PDT) Message-ID: Date: Tue, 24 Mar 2026 13:56:57 +1000 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 35/40] arm_mpam: Add quirk framework To: Ben Horgan Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev, zengheng4@huawei.com, linux-doc@vger.kernel.org, Shaopeng Tan References: <20260313144617.3420416-1-ben.horgan@arm.com> <20260313144617.3420416-36-ben.horgan@arm.com> Content-Language: en-US From: Gavin Shan In-Reply-To: <20260313144617.3420416-36-ben.horgan@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Ben, On 3/14/26 12:46 AM, Ben Horgan wrote: > From: Shanker Donthineni > > The MPAM specification includes the MPAMF_IIDR, which serves to uniquely > identify the MSC implementation through a combination of implementer > details, product ID, variant, and revision. Certain hardware issues/errata > can be resolved using software workarounds. > > Introduce a quirk framework to allow workarounds to be enabled based on the > MPAMF_IIDR value. > > Tested-by: Gavin Shan > Tested-by: Shaopeng Tan > Tested-by: Zeng Heng > Tested-by: Punit Agrawal > Reviewed-by: Zeng Heng > Reviewed-by: Shaopeng Tan > Reviewed-by: Jonathan Cameron > Signed-off-by: Shanker Donthineni > Co-developed-by: James Morse > Signed-off-by: James Morse > Signed-off-by: Ben Horgan > --- > Changes by James: > Stash the IIDR so this doesn't need an IPI, enable quirks only > once, move the description to the callback so it can be pr_once()d, add an > enum of workarounds for popular errata. Add macros for making lists of > product/revision/vendor half readable > > Changes since rfc: > remove trailing commas in last element of enums > Make mpam_enable_quirks() in charge of mpam_set_quirk() even if there > is an enable. > > Changes since v3: > Brackets in macro > --- > drivers/resctrl/mpam_devices.c | 32 ++++++++++++++++++++++++++++++++ > drivers/resctrl/mpam_internal.h | 25 +++++++++++++++++++++++++ > 2 files changed, 57 insertions(+) > With the following nitpicks addressed if another respin is needed. This looks good to me in either way. Reviewed-by: Gavin Shan > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index 37b31a1cf376..e66631f3f732 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -630,6 +630,30 @@ static struct mpam_msc_ris *mpam_get_or_create_ris(struct mpam_msc *msc, > return ERR_PTR(-ENOENT); > } > > +static const struct mpam_quirk mpam_quirks[] = { > + { NULL } /* Sentinel */ > +}; > + > +static void mpam_enable_quirks(struct mpam_msc *msc) > +{ > + const struct mpam_quirk *quirk; > + > + for (quirk = &mpam_quirks[0]; quirk->iidr_mask; quirk++) { > + int err = 0; The initialization on @err is unnecessary if it's checked only when it's updated (see below). The variable can be avoided. > + > + if (quirk->iidr != (msc->iidr & quirk->iidr_mask)) > + continue; > + > + if (quirk->init) > + err = quirk->init(msc, quirk); > + > + if (err) > + continue; Since @err is only updated by quirk->init(), the following check would be done only when it's updated. Something like below, @err isn't needed. if (quirk->init && quirk->init(msc, quirk) continue; > + > + mpam_set_quirk(quirk->workaround, msc); > + } > +} > + > /* > * IHI009A.a has this nugget: "If a monitor does not support automatic behaviour > * of NRDY, software can use this bit for any purpose" - so hardware might not > @@ -864,8 +888,11 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) > /* Grab an IDR value to find out how many RIS there are */ > mutex_lock(&msc->part_sel_lock); > idr = mpam_msc_read_idr(msc); > + msc->iidr = mpam_read_partsel_reg(msc, IIDR); > mutex_unlock(&msc->part_sel_lock); > > + mpam_enable_quirks(msc); > + > msc->ris_max = FIELD_GET(MPAMF_IDR_RIS_MAX, idr); > > /* Use these values so partid/pmg always starts with a valid value */ > @@ -1972,6 +1999,7 @@ static bool mpam_has_cmax_wd_feature(struct mpam_props *props) > * resulting safe value must be compatible with both. When merging values in > * the tree, all the aliasing resources must be handled first. > * On mismatch, parent is modified. > + * Quirks on an MSC will apply to all MSC in that class. > */ > static void __props_mismatch(struct mpam_props *parent, > struct mpam_props *child, bool alias) > @@ -2091,6 +2119,7 @@ static void __props_mismatch(struct mpam_props *parent, > * nobble the class feature, as we can't configure all the resources. > * e.g. The L3 cache is composed of two resources with 13 and 17 portion > * bitmaps respectively. > + * Quirks on an MSC will apply to all MSC in that class. > */ > static void > __class_props_mismatch(struct mpam_class *class, struct mpam_vmsc *vmsc) > @@ -2104,6 +2133,9 @@ __class_props_mismatch(struct mpam_class *class, struct mpam_vmsc *vmsc) > dev_dbg(dev, "Merging features for class:0x%lx &= vmsc:0x%lx\n", > (long)cprops->features, (long)vprops->features); > > + /* Merge quirks */ > + class->quirks |= vmsc->msc->quirks; > + > /* Take the safe value for any common features */ > __props_mismatch(cprops, vprops, false); > } > diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h > index ce9e0e0483fb..e28a168419d4 100644 > --- a/drivers/resctrl/mpam_internal.h > +++ b/drivers/resctrl/mpam_internal.h > @@ -85,6 +85,8 @@ struct mpam_msc { > u8 pmg_max; > unsigned long ris_idxs; > u32 ris_max; > + u32 iidr; > + u16 quirks; > It maybe reasonable to have 'u32 quirks' so that 32 instead of 16 quirks can be supported to the maximal degree. It's known 16 quirks are enough at the moment, but it's likely to be extended for more space. > /* > * error_irq_lock is taken when registering/unregistering the error > @@ -216,6 +218,28 @@ struct mpam_props { > #define mpam_set_feature(_feat, x) __set_bit(_feat, (x)->features) > #define mpam_clear_feature(_feat, x) __clear_bit(_feat, (x)->features) > > +/* Workaround bits for msc->quirks */ > +enum mpam_device_quirks { > + MPAM_QUIRK_LAST > +}; > + > +#define mpam_has_quirk(_quirk, x) ((1 << (_quirk) & (x)->quirks)) > +#define mpam_set_quirk(_quirk, x) ((x)->quirks |= (1 << (_quirk))) > + > +struct mpam_quirk { > + int (*init)(struct mpam_msc *msc, const struct mpam_quirk *quirk); > + > + u32 iidr; > + u32 iidr_mask; > + > + enum mpam_device_quirks workaround; > +}; > + > +#define MPAM_IIDR_MATCH_ONE (FIELD_PREP_CONST(MPAMF_IIDR_PRODUCTID, 0xfff) | \ > + FIELD_PREP_CONST(MPAMF_IIDR_VARIANT, 0xf) | \ > + FIELD_PREP_CONST(MPAMF_IIDR_REVISION, 0xf) | \ > + FIELD_PREP_CONST(MPAMF_IIDR_IMPLEMENTER, 0xfff)) > + > /* The values for MSMON_CFG_MBWU_FLT.RWBW */ > enum mon_filter_options { > COUNT_BOTH = 0, > @@ -259,6 +283,7 @@ struct mpam_class { > > struct mpam_props props; > u32 nrdy_usec; > + u16 quirks; As above, it would be "u32 quirks". > u8 level; > enum mpam_class_types type; > Thanks, Gavin