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X-CSE-ConnectionGUID: duR/k7nETI2gPN+rodamIw== X-CSE-MsgGUID: ji9WRJmkSXGEfW5NMdYf7g== X-IronPort-AV: E=McAfee;i="6800,10657,11469"; a="56544665" X-IronPort-AV: E=Sophos;i="6.16,252,1744095600"; d="scan'208";a="56544665" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2025 16:21:40 -0700 X-CSE-ConnectionGUID: pip1kbC4TUiyndcQpjT9wQ== X-CSE-MsgGUID: DMB8cg0yTYGqm6mjdDpcGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,252,1744095600"; d="scan'208";a="182068532" Received: from aschofie-mobl2.amr.corp.intel.com (HELO [10.125.108.136]) ([10.125.108.136]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2025 16:21:40 -0700 Message-ID: Date: Fri, 20 Jun 2025 16:21:38 -0700 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCHv6 07/16] x86/vsyscall: Reorganize the #PF emulation code To: Andrew Cooper Cc: acme@redhat.com, aik@amd.com, akpm@linux-foundation.org, alexander.shishkin@linux.intel.com, ardb@kernel.org, ast@kernel.org, bp@alien8.de, brijesh.singh@amd.com, changbin.du@huawei.com, christophe.leroy@csgroup.eu, corbet@lwn.net, daniel.sneddon@linux.intel.com, dave.hansen@linux.intel.com, ebiggers@google.com, geert+renesas@glider.be, houtao1@huawei.com, hpa@zytor.com, jgg@ziepe.ca, jgross@suse.com, jpoimboe@kernel.org, kai.huang@intel.com, kees@kernel.org, kirill.shutemov@linux.intel.com, leitao@debian.org, linux-doc@vger.kernel.org, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux@rasmusvillemoes.dk, luto@kernel.org, mcgrof@kernel.org, mhiramat@kernel.org, michael.roth@amd.com, mingo@kernel.org, mingo@redhat.com, namhyung@kernel.org, paulmck@kernel.org, pawan.kumar.gupta@linux.intel.com, peterz@infradead.org, rick.p.edgecombe@intel.com, rppt@kernel.org, sandipan.das@amd.com, shijie@os.amperecomputing.com, sohil.mehta@intel.com, tglx@linutronix.de, tj@kernel.org, tony.luck@intel.com, vegard.nossum@oracle.com, x86@kernel.org, xin3.li@intel.com, xiongwei.song@windriver.com, ytcoode@gmail.com References: <9d351d80-66fe-486f-bdb3-370859dc47cc@intel.com> <262c0fd2-ac66-4ce7-903f-4062f1fe1d6e@citrix.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/20/25 16:08, Andrew Cooper wrote: >> But, the resulting code is wonky. It needs to do something more like this: >> >> if ((error_code & (X86_PF_WRITE | X86_PF_USER)) != X86_PF_USER) >> return false; >> >> if (error_code & X86_PF_INSTR)) >> return __emulate_vsyscall(regs, address); > To do this, LASS needs a proper interlink against NX || SMEP. > > If neither NX nor SMEP are active, the CPU does not report X86_PF_INSTR, > meaning that fetches are reported as plain reads. Interesting point. I think the easiest way to do this is just make a cpuid_deps[] entry for LASS and NX. If there's a CPU where LASS is available but where NX isn't available, we have much bigger problems on our hands.