Re: [RESEND PATCH v4 03/15] x86/resctrl: Add data structures and definitions for PLZA configuration

[Babu Moger <babu.moger@amd.com>]

Hi Reinette,

On 8/10/26 21:58, Reinette Chatre wrote:
> Hi Babu,
> 
> On 7/7/26 2:50 PM, Babu Moger wrote:
>> Privilege Level Zero Association (PLZA) allows the kernel to use a
>> different CLOSID (and optionally RMID) than user mode on entry to kernel
>> mode. The CLOSID/RMID association is programmed per CPU via
> 
> CLOSID is also optional, no? I am not able to recall now why this is not made
> optional in this implementation though. Could you please remind me and add
> it to the changelog for next time?


Yes, CLOSID is optional as well. Since PLZA was primarily focused on 
allocation, I hadn't considered that use case initially. However, there 
may be scenarios where a user wants to monitor kernel activity without 
affecting or changing the existing allocation configuration. That would 
introduce an additional operating mode(See below).

INHERIT_CTRL_AND_MON:
Kernel work inherits the allocation and monitoring from the user space
task. On x86 this means that kernel work shares the same CLOSID and
RMID as the user space task. This matches today's resctrl behavior.

GLOBAL_ASSIGN_CTRL_INHERIT_MON_PER_CPU:
Kernel work uses a globally assigned allocation while monitoring is
inherited from the user space task. On x86 this means a CLOSID is
assigned for kernel work and the RMID is inherited from the user space
task. Default scope is all online CPUs; a subset may be selected via
the resctrl group interface. A CTRL_MON group is bound to this mode.

GLOBAL_ASSIGN_CTRL_ASSIGN_MON_PER_CPU:
Kernel work uses globally assigned allocation and monitoring. On x86
this means both CLOSID and RMID are assigned for kernel work. Default
scope is all online CPUs; a subset may be selected via the resctrl
group interface. A CTRL_MON or MON group is bound to this mode.

GLOBAL_INHERIT_CTRL_ASSIGN_MON_PER_CPU:   <--- New mode
Kernel work inherits the allocation from user task and monitoring is 
globally assigned for kernel work. On x86 this means that kernel work 
shares the same CLOSID as user task and kernel work user globally 
assigned RMID. A MON group is bound to this mode.

I will add these changes.

> 
>> MSR_IA32_PQR_PLZA_ASSOC (0xc00003fc), using RMID/CLOSID values and their
>> respective enable bits.
>>
>> Add the MSR definition and union msr_pqr_plza_assoc to represent the MSR
>> bitfield layout used by subsequent PLZA programming.
>>
>> Signed-off-by: Babu Moger <babu.moger@amd.com>
>> ---
>> v4: Re-wrote the changelog and code comment.
>>
>> v3: No code changes. Patch order changed. Improved changelog.
>>
>> v2: No changes. Just rebasing on top of the latest tip branch.
>> ---
>>   arch/x86/include/asm/msr-index.h       |  1 +
>>   arch/x86/kernel/cpu/resctrl/internal.h | 37 ++++++++++++++++++++++++++
>>   2 files changed, 38 insertions(+)
>>
>> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
>> index 18c4be75e927..2503451a95fe 100644
>> --- a/arch/x86/include/asm/msr-index.h
>> +++ b/arch/x86/include/asm/msr-index.h
>> @@ -1292,6 +1292,7 @@
>>   /* - AMD: */
>>   #define MSR_IA32_MBA_BW_BASE		0xc0000200
>>   #define MSR_IA32_SMBA_BW_BASE		0xc0000280
>> +#define MSR_IA32_PQR_PLZA_ASSOC		0xc00003fc
>>   #define MSR_IA32_L3_QOS_ABMC_CFG	0xc00003fd
>>   #define MSR_IA32_L3_QOS_EXT_CFG		0xc00003ff
>>   #define MSR_IA32_EVT_CFG_BASE		0xc0000400
>> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
>> index e3cfa0c10e92..020ebc2c8a1f 100644
>> --- a/arch/x86/kernel/cpu/resctrl/internal.h
>> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
>> @@ -222,6 +222,43 @@ union l3_qos_abmc_cfg {
>>   	unsigned long full;
>>   };
>>   
>> +/*
>> + * Privilege Level Zero Association (PLZA) is configured by writing to
>> + * MSR_IA32_PQR_PLZA_ASSOC. The MSR must be programmed on every CPU in
>> + * the QoS domain. Each domain supports only one PLZA CLOSID and/or RMID
>> + * association. All fields other than PLZA_EN must hold the same value
>> + * across the domain for consistent operation.
>> + *
>> + * When PLZA_EN is set, the CLOSID/RMID association used at CPL 0 is
>> + * taken from MSR_IA32_PQR_PLZA_ASSOC instead of MSR_IA32_PQR_ASSOC.
>> + *
>> + * @rmid		: RMID associated with PLZA.
>> + * @reserved1		: Reserved.
>> + * @rmid_en		: Enable RMID association for PLZA.
>> + * @closid		: CLOSID associated with PLZA.
>> + * @reserved2		: Reserved.
>> + * @closid_en		: Enable CLOSID association for PLZA.
>> + * @reserved3		: Reserved.
>> + * @plza_en		: Enable PLZA. When enabled, PLZA applies to the
>> + *			  given CPU. When PLZA is disabled for a CPU, the
>> + *			  CLOSID and RMID association defined in the
>> + *			  PQR_ASSOC MSR applies, regardless of the CPU's
> 
> To support grep: "the PQR_ASSOC MSR" -> "MSR_IA32_PQR_ASSOC"

Sure.

> 
>> + *			  privilege level.
> 
> Could this also please highlight the relationship between plza_en, rmid_en,
> and closid_en? For example, if I understand correctly, when "rmid_en" is 0
> then RMID is taken from MSR_IA32_PQR_ASSOC, similarly, when "closid_en" is 0
> then CLOSID is taken from MSR_IA32_PQR_ASSOC. Thus, plza_en could be 1, but
> if both "rmid_en" and "closid_en" are 0 then, the same behavior results as
> described for plza_en == 0: "CLOSID and RMID association defined
> in MSR_IA32_PQR_ASSOC applies, regardless of the CPU's privilege level".

Sure. Will add that note as well.

Thanks
Babu