[PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

[PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

[Gustavo Pimentel]

This patch series adds a new driver called xData-pcie for the Synopsys
DesignWare PCIe prototype.

The driver configures and enables the Synopsys DesignWare PCIe traffic
generator IP inside of prototype Endpoint which will generate upstream
and downstream PCIe traffic. This allows to quickly test the PCIe link
throughput speed and check is the prototype solution has some limitation
or not.

Cc: Derek Kiernan <derek.kiernan@xilinx.com>
Cc: Dragan Cvetic <dragan.cvetic@xilinx.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-pci@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Changes:
 V2: Rework driver according to Greg Kroah-Hartman feedback 

Gustavo Pimentel (5):
  misc: Add Synopsys DesignWare xData IP driver
  misc: Add Synopsys DesignWare xData IP driver to Makefile
  misc: Add Synopsys DesignWare xData IP driver to Kconfig
  Documentation: misc-devices: Add Documentation for dw-xdata-pcie
    driver
  MAINTAINERS: Add Synopsys xData IP driver maintainer

 Documentation/misc-devices/dw-xdata-pcie.rst |  40 +++
 MAINTAINERS                                  |   7 +
 drivers/misc/Kconfig                         |  11 +
 drivers/misc/Makefile                        |   1 +
 drivers/misc/dw-xdata-pcie.c                 | 390 +++++++++++++++++++++++++++
 5 files changed, 449 insertions(+)
 create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst
 create mode 100644 drivers/misc/dw-xdata-pcie.c

-- 
2.7.4

[PATCH v2 4/5] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver

[Gustavo Pimentel]

Add Documentation for dw-xdata-pcie driver.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
---
 Documentation/misc-devices/dw-xdata-pcie.rst | 40 ++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst

diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst
new file mode 100644
index 00000000..3af9fad
--- /dev/null
+++ b/Documentation/misc-devices/dw-xdata-pcie.rst
@@ -0,0 +1,40 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===========================================================================
+Driver for Synopsys DesignWare PCIe traffic generator (also known as xData)
+===========================================================================
+
+This driver should be used as a host-side (Root Complex) driver and Synopsys
+DesignWare prototype that includes this IP.
+
+The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic
+generator in either direction (mutual exclusion) besides allowing the
+PCIe link performance analysis.
+
+The interaction with this driver is done through the module parameter and
+can be changed in runtime. The driver outputs the requested command state
+information to /var/log/kern.log or dmesg.
+
+Request write TLPs traffic generation - Root Complex to Endpoint direction
+- Command:
+	echo 1 > /sys/kernel/dw-xdata-pcie/write
+
+Get write TLPs traffic link throughput
+- Command:
+        cat /sys/kernel/dw-xdata-pcie/write
+- Output example:
+	204 MB/s
+
+Request read TLPs traffic generation - Endpoint to Root Complex direction:
+- Command:
+	echo 1 > /sys/kernel/dw-xdata-pcie/read
+
+Get read TLPs traffic link throughput
+- Command:
+        cat /sys/kernel/dw-xdata-pcie/read
+- Output example:
+	199 MB/s
+
+Request to stop any current TLP transfer:
+- Command:
+	echo 1 > /sys/kernel/dw-xdata-pcie/stop
-- 
2.7.4

Re: [PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

[Arnd Bergmann]

On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel
<Gustavo.Pimentel@synopsys.com> wrote:
>
> This patch series adds a new driver called xData-pcie for the Synopsys
> DesignWare PCIe prototype.
>
> The driver configures and enables the Synopsys DesignWare PCIe traffic
> generator IP inside of prototype Endpoint which will generate upstream
> and downstream PCIe traffic. This allows to quickly test the PCIe link
> throughput speed and check is the prototype solution has some limitation
> or not.

I don't quite understand what this hardware is, based on your description.
Is this a specific piece of hardware that only serves as a traffic generator,
or a particular hardware feature of the DesignWare endpoint, or is it
software running on a SoC in endpoint mode while plugged into a Linux
system running this driver on the host?

Most importantly; Is there any relation between this driver and the driver
we have for the DesignWare PCIe endpoint itself?

My feeling is that this should be located more closely to drivers/pci/,
but that depends on what it actually does.

     Arnd

RE: [PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

[Gustavo Pimentel]

On Tue, Nov 17, 2020 at 14:4:49, Arnd Bergmann <arnd@kernel.org> wrote:

> On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel
> <Gustavo.Pimentel@synopsys.com> wrote:
> >
> > This patch series adds a new driver called xData-pcie for the Synopsys
> > DesignWare PCIe prototype.
> >
> > The driver configures and enables the Synopsys DesignWare PCIe traffic
> > generator IP inside of prototype Endpoint which will generate upstream
> > and downstream PCIe traffic. This allows to quickly test the PCIe link
> > throughput speed and check is the prototype solution has some limitation
> > or not.
> 
> I don't quite understand what this hardware is, based on your description.
> Is this a specific piece of hardware that only serves as a traffic generator,
> or a particular hardware feature of the DesignWare endpoint, or is it
> software running on a SoC in endpoint mode while plugged into a Linux
> system running this driver on the host?

Hi Arnd,

Firstly you have to have in mind that we are talking about an HW 
prototype based on FPGA. This PCIe Endpoint HW prototype from Synopsys 
might have multiple HW blocks inside (depends on the HW design), in this 
particular prototype case, it has an HW block is called xData (available 
internally to Synopsys only) which is a PCIe traffic generator, this 
block has no practical usage, unless for HW validation and testing new 
designs that push forward new PCIe speeds.

> 
> Most importantly; Is there any relation between this driver and the driver
> we have for the DesignWare PCIe endpoint itself?

The scopes are different. The DesignWare PCIe endpoint is a framework 
that allows to test some PCIe generic functionalities (not related to 
xData) using pcitest.

> 
> My feeling is that this should be located more closely to drivers/pci/,
> but that depends on what it actually does.

I thought to put on /misc because the purpose is very limited and doesn't 
fit in a normal case.

-Gustavo

> 
>      Arnd

Re: [PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

[Arnd Bergmann]

On Tue, Nov 17, 2020 at 3:53 PM Gustavo Pimentel
<Gustavo.Pimentel@synopsys.com> wrote:
> On Tue, Nov 17, 2020 at 14:4:49, Arnd Bergmann <arnd@kernel.org> wrote:
> > On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel <Gustavo.Pimentel@synopsys.com> wrote:
> > >
> > > This patch series adds a new driver called xData-pcie for the Synopsys
> > > DesignWare PCIe prototype.
> > >
> > > The driver configures and enables the Synopsys DesignWare PCIe traffic
> > > generator IP inside of prototype Endpoint which will generate upstream
> > > and downstream PCIe traffic. This allows to quickly test the PCIe link
> > > throughput speed and check is the prototype solution has some limitation
> > > or not.
> >
> > I don't quite understand what this hardware is, based on your description.
> > Is this a specific piece of hardware that only serves as a traffic generator,
> > or a particular hardware feature of the DesignWare endpoint, or is it
> > software running on a SoC in endpoint mode while plugged into a Linux
> > system running this driver on the host?
>
> Firstly you have to have in mind that we are talking about an HW
> prototype based on FPGA. This PCIe Endpoint HW prototype from Synopsys
> might have multiple HW blocks inside (depends on the HW design), in this
> particular prototype case, it has an HW block is called xData (available
> internally to Synopsys only) which is a PCIe traffic generator, this
> block has no practical usage, unless for HW validation and testing new
> designs that push forward new PCIe speeds.

Ok, got it. Thanks for the explanation.

> > My feeling is that this should be located more closely to drivers/pci/,
> > but that depends on what it actually does.
>
> I thought to put on /misc because the purpose is very limited and doesn't
> fit in a normal case.

Makes sense. I usually try to ensure we don't add anything to drivers/misc
that could reasonably be grouped with related code elsewhere, but
I agree there isn't much that fits into this category today, so let's leave
it there unless someone comes up with a better idea.

The only alternative I could see would be drivers/pci/testing/

      Arnd