* [PATCH v2 0/3] docs/zh_CN: add riscv vm-layout and peci translation
@ 2022-03-01 4:18 Yanteng Si
2022-03-01 4:18 ` [PATCH v2 1/3] docs/zh_CN: add riscv vm-layout translation Yanteng Si
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Yanteng Si @ 2022-03-01 4:18 UTC (permalink / raw)
To: corbet, alexs, seakeel
Cc: Yanteng Si, chenhuacai, jiaxun.yang, linux-doc, siyanteng01
v2:
* Pick Alexs's Reviewed-by tag. [PATCH 1/3 and 3/3 ]
v1:
* Translate .../riscv/vm-layout.rst into Chinese.
* Translate .../peci/* into Chinese.
Yanteng Si (3):
docs/zh_CN: add riscv vm-layout translation
docs/zh_CN: add peci index translation
docs/zh_CN: add peci subsystem translation
Documentation/translations/zh_CN/index.rst | 1 +
.../translations/zh_CN/peci/index.rst | 26 +++++++
.../translations/zh_CN/peci/peci.rst | 54 +++++++++++++++
.../translations/zh_CN/riscv/index.rst | 1 +
.../translations/zh_CN/riscv/vm-layout.rst | 67 +++++++++++++++++++
5 files changed, 149 insertions(+)
create mode 100644 Documentation/translations/zh_CN/peci/index.rst
create mode 100644 Documentation/translations/zh_CN/peci/peci.rst
create mode 100644 Documentation/translations/zh_CN/riscv/vm-layout.rst
--
2.27.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v2 1/3] docs/zh_CN: add riscv vm-layout translation
2022-03-01 4:18 [PATCH v2 0/3] docs/zh_CN: add riscv vm-layout and peci translation Yanteng Si
@ 2022-03-01 4:18 ` Yanteng Si
2022-03-01 4:18 ` [PATCH v2 2/3] docs/zh_CN: add peci index translation Yanteng Si
2022-03-01 4:18 ` [PATCH v2 3/3] docs/zh_CN: add peci subsystem translation Yanteng Si
2 siblings, 0 replies; 4+ messages in thread
From: Yanteng Si @ 2022-03-01 4:18 UTC (permalink / raw)
To: corbet, alexs, seakeel
Cc: Yanteng Si, chenhuacai, jiaxun.yang, linux-doc, Yanteng Si
From: Yanteng Si <siyanteng01@gmail.com>
Translate .../riscv/vm-layout.rst into Chinese.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Reviewed-by: Alex Shi <alexs@kernel.org>
---
.../translations/zh_CN/riscv/index.rst | 1 +
.../translations/zh_CN/riscv/vm-layout.rst | 67 +++++++++++++++++++
2 files changed, 68 insertions(+)
create mode 100644 Documentation/translations/zh_CN/riscv/vm-layout.rst
diff --git a/Documentation/translations/zh_CN/riscv/index.rst b/Documentation/translations/zh_CN/riscv/index.rst
index bbf5d7b3777a..614cde0c0997 100644
--- a/Documentation/translations/zh_CN/riscv/index.rst
+++ b/Documentation/translations/zh_CN/riscv/index.rst
@@ -18,6 +18,7 @@ RISC-V 体系结构
:maxdepth: 1
boot-image-header
+ vm-layout
pmu
patch-acceptance
diff --git a/Documentation/translations/zh_CN/riscv/vm-layout.rst b/Documentation/translations/zh_CN/riscv/vm-layout.rst
new file mode 100644
index 000000000000..585cb89317a3
--- /dev/null
+++ b/Documentation/translations/zh_CN/riscv/vm-layout.rst
@@ -0,0 +1,67 @@
+.. SPDX-License-Identifier: GPL-2.0
+.. include:: ../disclaimer-zh_CN.rst
+
+:Original: Documentation/riscv/vm-layout.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+============================
+RISC-V Linux上的虚拟内存布局
+============================
+
+:作者: Alexandre Ghiti <alex@ghiti.fr>
+:日期: 12 February 2021
+
+这份文件描述了RISC-V Linux内核使用的虚拟内存布局。
+
+32位 RISC-V Linux 内核
+======================
+
+RISC-V Linux Kernel SV32
+------------------------
+
+TODO
+
+64位 RISC-V Linux 内核
+======================
+
+RISC-V特权架构文档指出，64位地址 "必须使第63-48位值都等于第47位，否则将发生缺页异常。"：这将虚
+拟地址空间分成两半，中间有一个非常大的洞，下半部分是用户空间所在的地方，上半部分是RISC-V Linux
+内核所在的地方。
+
+RISC-V Linux Kernel SV39
+------------------------
+
+::
+
+ ========================================================================================================================
+ 开始地址 | 偏移 | 结束地址 | 大小 | 虚拟内存区域描述
+ ========================================================================================================================
+ | | | |
+ 0000000000000000 | 0 | 0000003fffffffff | 256 GB | 用户空间虚拟内存，每个内存管理器不同
+ __________________|____________|__________________|_________|___________________________________________________________
+ | | | |
+ 0000004000000000 | +256 GB | ffffffbfffffffff | ~16M TB | ... 巨大的、几乎64位宽的直到内核映射的-256GB地方
+ | | | | 开始偏移的非经典虚拟内存地址空洞。
+ | | | |
+ __________________|____________|__________________|_________|___________________________________________________________
+ |
+ | 内核空间的虚拟内存，在所有进程之间共享:
+ ____________________________________________________________|___________________________________________________________
+ | | | |
+ ffffffc6fee00000 | -228 GB | ffffffc6feffffff | 2 MB | fixmap
+ ffffffc6ff000000 | -228 GB | ffffffc6ffffffff | 16 MB | PCI io
+ ffffffc700000000 | -228 GB | ffffffc7ffffffff | 4 GB | vmemmap
+ ffffffc800000000 | -224 GB | ffffffd7ffffffff | 64 GB | vmalloc/ioremap space
+ ffffffd800000000 | -160 GB | fffffff6ffffffff | 124 GB | 直接映射所有物理内存
+ fffffff700000000 | -36 GB | fffffffeffffffff | 32 GB | kasan
+ __________________|____________|__________________|_________|____________________________________________________________
+ |
+ |
+ ____________________________________________________________|____________________________________________________________
+ | | | |
+ ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | modules, BPF
+ ffffffff80000000 | -2 GB | ffffffffffffffff | 2 GB | kernel
+ __________________|____________|__________________|_________|____________________________________________________________
--
2.27.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 2/3] docs/zh_CN: add peci index translation
2022-03-01 4:18 [PATCH v2 0/3] docs/zh_CN: add riscv vm-layout and peci translation Yanteng Si
2022-03-01 4:18 ` [PATCH v2 1/3] docs/zh_CN: add riscv vm-layout translation Yanteng Si
@ 2022-03-01 4:18 ` Yanteng Si
2022-03-01 4:18 ` [PATCH v2 3/3] docs/zh_CN: add peci subsystem translation Yanteng Si
2 siblings, 0 replies; 4+ messages in thread
From: Yanteng Si @ 2022-03-01 4:18 UTC (permalink / raw)
To: corbet, alexs, seakeel
Cc: Yanteng Si, chenhuacai, jiaxun.yang, linux-doc, Yanteng Si
From: Yanteng Si <siyanteng01@gmail.com>
Translate .../pici/index.rst into Chinese
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
---
Documentation/translations/zh_CN/index.rst | 1 +
.../translations/zh_CN/peci/index.rst | 26 +++++++++++++++++++
2 files changed, 27 insertions(+)
create mode 100644 Documentation/translations/zh_CN/peci/index.rst
diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst
index 23f8f4c68e83..4cab13c1f69e 100644
--- a/Documentation/translations/zh_CN/index.rst
+++ b/Documentation/translations/zh_CN/index.rst
@@ -114,6 +114,7 @@ TODOList:
filesystems/index
scheduler/index
vm/index
+ peci/index
TODOList:
diff --git a/Documentation/translations/zh_CN/peci/index.rst b/Documentation/translations/zh_CN/peci/index.rst
new file mode 100644
index 000000000000..c536dbe1e1a8
--- /dev/null
+++ b/Documentation/translations/zh_CN/peci/index.rst
@@ -0,0 +1,26 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+.. include:: ../disclaimer-zh_CN.rst
+
+:Original: Documentation/peci/index.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+:校译:
+
+=================
+Linux PECI 子系统
+=================
+
+.. toctree::
+
+TODOList
+* peci
+
+.. only:: subproject and html
+
+ Indices
+ =======
+
+ * :ref:`genindex`
--
2.27.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 3/3] docs/zh_CN: add peci subsystem translation
2022-03-01 4:18 [PATCH v2 0/3] docs/zh_CN: add riscv vm-layout and peci translation Yanteng Si
2022-03-01 4:18 ` [PATCH v2 1/3] docs/zh_CN: add riscv vm-layout translation Yanteng Si
2022-03-01 4:18 ` [PATCH v2 2/3] docs/zh_CN: add peci index translation Yanteng Si
@ 2022-03-01 4:18 ` Yanteng Si
2 siblings, 0 replies; 4+ messages in thread
From: Yanteng Si @ 2022-03-01 4:18 UTC (permalink / raw)
To: corbet, alexs, seakeel
Cc: Yanteng Si, chenhuacai, jiaxun.yang, linux-doc, Yanteng Si
From: Yanteng Si <siyanteng01@gmail.com>
Translate .../peci/peci.rst into Chinese.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Reviewed-by: Alex Shi <alexs@kernel.org>
---
.../translations/zh_CN/peci/index.rst | 4 +-
.../translations/zh_CN/peci/peci.rst | 54 +++++++++++++++++++
2 files changed, 56 insertions(+), 2 deletions(-)
create mode 100644 Documentation/translations/zh_CN/peci/peci.rst
diff --git a/Documentation/translations/zh_CN/peci/index.rst b/Documentation/translations/zh_CN/peci/index.rst
index c536dbe1e1a8..4f6694c828fa 100644
--- a/Documentation/translations/zh_CN/peci/index.rst
+++ b/Documentation/translations/zh_CN/peci/index.rst
@@ -15,8 +15,8 @@ Linux PECI 子系统
.. toctree::
-TODOList
-* peci
+
+ peci
.. only:: subproject and html
diff --git a/Documentation/translations/zh_CN/peci/peci.rst b/Documentation/translations/zh_CN/peci/peci.rst
new file mode 100644
index 000000000000..a3b4f99b994c
--- /dev/null
+++ b/Documentation/translations/zh_CN/peci/peci.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+.. include:: ../disclaimer-zh_CN.rst
+
+:Original: Documentation/peci/peci.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+:校译:
+
+====
+概述
+====
+
+平台环境控制接口（PECI）是英特尔处理器和管理控制器（如底板管理控制器，BMC）
+之间的一个通信接口。PECI提供的服务允许管理控制器通过访问各种寄存器来配置、监
+控和调试平台。它定义了一个专门的命令协议，管理控制器作为PECI的发起者，处理器
+作为PECI的响应者。PECI可以用于基于单处理器和多处理器的系统中。
+
+注意：英特尔PECI规范没有作为专门的文件发布，而是作为英特尔CPU的外部设计规范
+（EDS）的一部分。外部设计规范通常是不公开的。
+
+PECI 线
+---------
+
+PECI线接口使用单线进行自锁和数据传输。它不需要任何额外的控制线--物理层是一个
+自锁的单线总线信号，每一个比特都从接近零伏的空闲状态开始驱动、上升边缘。驱动高
+电平信号的持续时间可以确定位值是逻辑 “0” 还是逻辑 “1”。PECI线还包括与每个信
+息建立的可变数据速率。
+
+对于PECI线，每个处理器包将在一个定义的范围内利用唯一的、固定的地址，该地址应
+该与处理器插座ID有固定的关系--如果其中一个处理器被移除，它不会影响其余处理器
+的地址。
+
+PECI子系统代码内嵌文档
+------------------------
+
+该API在以下内核代码中:
+
+include/linux/peci.h
+
+drivers/peci/internal.h
+
+drivers/peci/core.c
+
+drivers/peci/request.c
+
+PECI CPU 驱动 API
+-------------------
+
+该API在以下内核代码中:
+
+drivers/peci/cpu.c
--
2.27.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
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