From: Conor Dooley <conor.dooley@microchip.com>
To: Evan Green <evan@rivosinc.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>, <slewis@rivosinc.com>,
<vineetg@rivosinc.com>, <heiko@sntech.de>,
Conor Dooley <conor@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Andrew Bresticker <abrestic@rivosinc.com>,
Andrew Jones <ajones@ventanamicro.com>,
Andrew Morton <akpm@linux-foundation.org>,
Anup Patel <apatel@ventanamicro.com>,
Arnd Bergmann <arnd@arndb.de>, Atish Patra <atishp@rivosinc.com>,
Bagas Sanjaya <bagasdotme@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Celeste Liu <coelacanthus@outlook.com>,
Dao Lu <daolu@rivosinc.com>, Guo Ren <guoren@kernel.org>,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
Jann Horn <jannh@google.com>, Jisheng Zhang <jszhang@kernel.org>,
Jonathan Corbet <corbet@lwn.net>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
Mark Brown <broonie@kernel.org>,
Mike Kravetz <mike.kravetz@oracle.com>,
Nathan Chancellor <nathan@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Peter Xu <peterx@redhat.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Randy Dunlap <rdunlap@infradead.org>,
Samuel Holland <samuel@sholland.org>,
Shuah Khan <shuah@kernel.org>,
Sunil V L <sunilvl@ventanamicro.com>,
Tobias Klauser <tklauser@distanz.ch>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-kselftest@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v5 0/6] RISC-V Hardware Probing User Interface
Date: Tue, 28 Mar 2023 07:45:28 +0100 [thread overview]
Message-ID: <d47020f9-e5a8-4ef3-94bc-6aa6f6b2465c@spud> (raw)
In-Reply-To: <20230327163203.2918455-1-evan@rivosinc.com>
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On Mon, Mar 27, 2023 at 09:31:57AM -0700, Evan Green wrote:
Hey Evan,
Patchwork has a rake of complaints about the series unfortunately:
https://patchwork.kernel.org/project/linux-riscv/list/?series=734234
Some of the checkpatch whinging may be spurious, but there's some
definitely valid stuff in there!
> Evan Green (6):
> RISC-V: Move struct riscv_cpuinfo to new header
> RISC-V: Add a syscall for HW probing
> RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA
> RISC-V: hwprobe: Support probing of misaligned access performance
> selftests: Test the new RISC-V hwprobe interface
> RISC-V: Add hwprobe vDSO function and data
And this one breaks the build for !MMU kernels unfortunately.
Thanks,
Conor.
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next prev parent reply other threads:[~2023-03-28 6:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 16:31 [PATCH v5 0/6] RISC-V Hardware Probing User Interface Evan Green
2023-03-27 16:31 ` [PATCH v5 2/6] RISC-V: Add a syscall for HW probing Evan Green
2023-04-05 13:57 ` Paul Walmsley
2023-04-07 23:13 ` Evan Green
2023-03-27 16:32 ` [PATCH v5 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA Evan Green
2023-03-27 16:32 ` [PATCH v5 4/6] RISC-V: hwprobe: Support probing of misaligned access performance Evan Green
2023-03-28 6:45 ` Conor Dooley [this message]
2023-03-28 22:54 ` [PATCH v5 0/6] RISC-V Hardware Probing User Interface Evan Green
2023-03-28 20:34 ` Heiko Stübner
2023-03-28 22:53 ` Evan Green
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