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Rozycki" Cc: "Thomas Bogendoerfer" , "Jonathan Corbet" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, "linux-mips@vger.kernel.org" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v3] MIPS: Implement ieee754 NAN2008 emulation mode Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=8812=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=888:22=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A > On Fri, 12 Jul 2024, Jiaxun Yang wrote: > >> >> > It would be good to check with hard-float QEMU configured for w= ritable=20 >> >> > FCSR.NAN2008 (which is one way original code was verified) that = things=20 >> >> > have not regressed. And also what happens if once our emulation= has=20 >> >> > triggered for the unsupported FCSR.NAN2008 mode, an attempt is m= ade to=20 >> >> > flip the mode bit via ptrace(2), e.g. under GDB, which I reckon = our=20 >> >> > emulation permits for non-legacy CPUs (and which I think should = not be=20 >> >> > allowed under the new setting). >> >>=20 >> >> PTrace is working as expected (reflects emulated value). >> > >> > Yes, sure for reads, but how about *writing* to the bit? >>=20 >> Tested flipping nan2008 bits with ieee754=3Demulated with ptrace, it = works on some extent. >> (flipping the bit to unsupported value immediately triggered emulatio= n). > > What about the other way round? It works on both side (NaN2008 binary with ptrace flipped back to legacy= and legacy flipped back to NaN2008). > > Anyway I think we need to prevent it from happening, matching runtime=20 > behaviour, i.e. if the program itself cannot flip FCSR.NAN2008 via CTC= 1,=20 > then ptrace(2) must not either. And the same for the emulator in the=20 > "ieee754=3Demulated" mode (but not for the emulator modes where the fl= ipping=20 > is currently permitted), as it would be a one-way switch. It is out of the scope of this patch I think. Maybe we need a prctl to s= et NaN2008 status. We are unable to prevent user applications write NAN2008 bits for the "s= witchable QEMU" as well. So I'd perfer leave it as is, and let this feature go int= o 6.11 so people can start to use it. This is actually a request from Debian MIPS team so they can get glibc t= ests run on mismatched NaN hardware. Thanks > > In other words we need to be consistent and the NaN mode of operation= has=20 > to be strapped in "ieee754=3Demulated" mode according to ELF file head= er's=20 > EF_MIPS_NAN2008 bit for the duration of execution of a given program. > > Likewise FCSR.ABS2008. > [...] --=20 - Jiaxun