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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Evan Green" <evan@rivosinc.com>, "Palmer Dabbelt" <palmer@rivosinc.com>
Cc: "Conor Dooley" <conor@kernel.org>,
	"Vineet Gupta" <vineetg@rivosinc.com>,
	"Heiko Stübner" <heiko@sntech.de>,
	slewis@rivosinc.com, "Albert Ou" <aou@eecs.berkeley.edu>,
	"Andrew Bresticker" <abrestic@rivosinc.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Atish Patra" <atishp@rivosinc.com>,
	"Bagas Sanjaya" <bagasdotme@gmail.com>,
	"Celeste Liu" <coelacanthus@outlook.com>,
	"Conor.Dooley" <conor.dooley@microchip.com>,
	"Dao Lu" <daolu@rivosinc.com>, guoren <guoren@kernel.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Randy Dunlap" <rdunlap@infradead.org>,
	"Ruizhe Pan" <c141028@gmail.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Tobias Klauser" <tklauser@distanz.ch>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 2/6] RISC-V: Add a syscall for HW probing
Date: Wed, 15 Feb 2023 10:56:51 +0100	[thread overview]
Message-ID: <ded4018d-c90f-41c7-9e54-da954bdef49e@app.fastmail.com> (raw)
In-Reply-To: <20230206201455.1790329-3-evan@rivosinc.com>

On Mon, Feb 6, 2023, at 21:14, Evan Green wrote:
> We don't have enough space for these all in ELF_HWCAP{,2} and there's no
> system call that quite does this, so let's just provide an arch-specific
> one to probe for hardware capabilities.  This currently just provides
> m{arch,imp,vendor}id, but with the key-value pairs we can pass more in
> the future.
>
> Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Evan Green <evan@rivosinc.com>

I'm not sure I understand the problem with
AT_HWCAP. While the bits in AT_HWCAP and AT_HWCAP2
are limited, I don't see us running out of new
AT_* words to use for additional bits. Presumably
the kernel would already have to know about the
name of each supported HW feature and could assign
a unique bit number to them.

      Arnd

  parent reply	other threads:[~2023-02-15  9:57 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-06 20:14 [PATCH v2 0/6] RISC-V Hardware Probing User Interface Evan Green
2023-02-06 20:14 ` [PATCH v2 2/6] RISC-V: Add a syscall for HW probing Evan Green
2023-02-07  6:13   ` Greg KH
2023-02-07  6:32     ` Conor Dooley
2023-02-09 17:09       ` Evan Green
2023-02-09 17:13         ` Greg KH
2023-02-09 17:22           ` Jessica Clarke
2023-02-10  6:48             ` Greg KH
2023-02-09 18:41           ` Evan Green
2023-02-10  6:50             ` Greg KH
2023-02-07 23:16   ` kernel test robot
2023-02-14 23:51   ` Conor Dooley
2023-02-15  8:04     ` Andrew Jones
2023-02-15 20:49     ` Evan Green
2023-02-15 21:10       ` Conor Dooley
2023-02-15  9:56   ` Arnd Bergmann [this message]
2023-02-15 21:14     ` Evan Green
2023-02-15 22:43       ` Jessica Clarke
2023-02-16 13:28         ` Arnd Bergmann
2023-02-16 23:18           ` Evan Green
2023-02-06 20:14 ` [PATCH v2 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA Evan Green
2023-02-15 21:25   ` Conor Dooley
2023-02-15 22:09   ` Conor Dooley
2023-02-06 20:14 ` [PATCH v2 5/6] RISC-V: hwprobe: Support probing of misaligned access performance Evan Green
2023-02-07  7:02   ` kernel test robot
2023-02-15 21:57   ` Conor Dooley
2023-02-18  0:15     ` Evan Green
2023-02-06 21:11 ` [PATCH v2 0/6] RISC-V Hardware Probing User Interface Jessica Clarke
2023-02-06 22:47   ` Heinrich Schuchardt
2023-02-09 16:56     ` Palmer Dabbelt
2023-02-06 22:32 ` Conor Dooley

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