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Date: Thu, 15 Oct 2026 17:32:18 +0100
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Subject: Re: [RFC PATCH v2 02/15] misc/arm-cla: Add launch operation helpers
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>, Catalin Marinas <catalin.marinas@arm.com>,
 Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
 Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
 Alex Williamson <alex@shazbot.org>, Jason Gunthorpe <jgg@nvidia.com>,
 Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
 Conor Dooley <conor+dt@kernel.org>, Jean-Philippe Brucker <jpb@kernel.org>,
 Oded Gabbay <ogabbay@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
 linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
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References: <20261015142552.4128028-1-ryan.roberts@arm.com>
 <20261015142552.4128028-3-ryan.roberts@arm.com>
 <2026101542-briskness-most-a8ca@gregkh>
From: Ryan Roberts <ryan.roberts@arm.com>
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On 15/10/2026 17:17, Greg Kroah-Hartman wrote:
> On Thu, Oct 15, 2026 at 03:25:36PM +0100, Ryan Roberts wrote:
>> From: Jean-Philippe Brucker <jpb@kernel.org>
>>
>> CLA commands are issued by writing optional payload registers,
>> programming the LAUNCH register and polling LRESP until the hardware
>> accepts or rejects the operation.
>>
>> Add a common launch helper that performs this sequence on the CLA's
>> local CPU, waits for LRESP completion and translates launch response
>> codes into Linux errors.
>>
>> Build accelerator reset and register read and write support on top of
>> it. The register read and write helpers split larger accesses into
>> multiple launch operations when an access crosses an eight-register
>> window.
>>
>> Signed-off-by: Jean-Philippe Brucker <jpb@kernel.org>
> 
> You forgot to sign off on patches from others :(

Ahh sh*t, sorry about that. Hopefully given this is "just" an RFC that's not a
big deal? Else, let me know and I'll resend.