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([2600:8803:e7e4:500:ea38:c35b:7ec6:8152]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-458c0df60fasm79258fac.13.2026.07.29.14.40.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Jul 2026 14:40:01 -0700 (PDT) Message-ID: Date: Wed, 29 Jul 2026 16:40:00 -0500 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/7] dt-bindings: iio: adc: microchip,mcp3564: Add spi-device-addr To: Conor Dooley , Jonathan Cameron Cc: Janani Sunil , Lars-Peter Clausen , Michael Hennerich , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jonathan Corbet , Shuah Khan , Mark Brown , Marius Cristea , Marcus Folkesson , Kent Gustavsson , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Janani Sunil , linux-spi@vger.kernel.org, Kent Gustavsson References: <20260722-ad5529r-driver-v7-0-7781cd74ad75@analog.com> <20260722-ad5529r-driver-v7-2-7781cd74ad75@analog.com> <20260725230739.63ff7000@jic23-huawei> <20260728-patronize-thwarting-56fab2e11077@spud> <20260728221719.7f668a73@jic23-huawei> <20260729-hundredth-suffice-f28afa67bc06@spud> Content-Language: en-US From: David Lechner In-Reply-To: <20260729-hundredth-suffice-f28afa67bc06@spud> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 7/29/26 3:47 PM, Conor Dooley wrote: ... > Only going to reply to this for now, I'll reply to the other thread of > this conversation later so as not to end up duplicating discussion, but > I am thinking of things like what if someone puts a mcp3654r and an > ad5529r on the same chip select? I think that's actually perfectly > functional on a hardware level, provided the fuses/pins are set up I'm not sure this works in general since SPI devices aren't going to have a standard way to specify the address. For example, ad5529r has the address at bits [14:12] in a 16-bit "instruction phase" while mcp3654r has the address at [7:6] in the "command byte". An ad5529r instruction could inadvertently be interpreted as a command by mcp3654r. So I don't think they could exist on the same CS. > correctly (and if it is not, mixing the microchip devices is possible > and probably mixing future ADI ones will be too). > Yes, I suppose this could be possible, but I don't think they would be considered a single logical device in that case. So would be covered by the device@cs,spi-addr binding that we already discussed. Example: adc@0,0 { compatible = "adi,adc1"; ... }; adc@0,1 { compatible = "adi,adc2"; ... };