From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from terminus.zytor.com (terminus.zytor.com [198.137.202.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 181DF148FF5; Thu, 6 Feb 2025 06:30:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.137.202.136 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738823428; cv=none; b=Cjwl/SdWcVFF1U4MS44BaqRWED+89EXF2WHpKPOyjcRzCaEOCmFc/1TinT0Kf3lTgpkc9KffNNIjdG4Y7SW6+5yp0hb9XZKytaR5/ViVxZ+asuwgiV6zoVQko7GQIJiRMfGWYT6APCB2fucfkZpulku32RLWgh23eHSO/BHJKO4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738823428; c=relaxed/simple; bh=9ZLbZg8+Xvk72GIODNaeA+Z7Vu5HANSYPNrUM+hLHiA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=pD3Bwt6WgwAv4exE6sUIPU6EhACUIgqQaZrbye5VHKbuUidj/c7DSUgOk94j+mKHI5D3sXmbg1zM83buBIbXQzmnFuL1OBjUhpcDI8eoQg6CTDQhvIYeIBgLtRlx9DPw2/fqJNCfAIf5+dSsGG2C9k/uG25yVHUewQr2IQRlX38= ARC-Authentication-Results:i=1; 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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=YkIS2IjTC22HK/o/H3otUopCforsKPkOOz1GuElfg0k/bHYcugHtrT1rtqffLJv/P hscDAs/MrX1+pcs+nwoifMdKe/QzvxfLMw8kuBqfjJ6Z0W0xgKa492RyABPIV3TSiP oZ0sZ427BGIgksgt35JmKB0l+apwZrZL2tqF2MakEaMpvaRyN2BkyvgSoiVWQyHhxV ADpsFiI79ehMO8afkpOp1bJyfsNrGA9/9TER7KgGu07iUzEiPpYt1llSya99r22wBR NfgAXx9E9XXhpagBc92cF30DB/mGh3voHf1IxI3dRbFvyteMzOzmOQPA66sYGZtiR0 gG1q5kssrPA0Q== Message-ID: Date: Wed, 5 Feb 2025 22:24:58 -0800 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 10/23] x86/resctrl: Remove MSR reading of event configuration value To: Babu Moger , corbet@lwn.net, reinette.chatre@intel.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, tony.luck@intel.com, peternewman@google.com Cc: fenghua.yu@intel.com, x86@kernel.org, hpa@zytor.com, paulmck@kernel.org, akpm@linux-foundation.org, thuth@redhat.com, rostedt@goodmis.org, xiongwei.song@windriver.com, pawan.kumar.gupta@linux.intel.com, daniel.sneddon@linux.intel.com, jpoimboe@kernel.org, perry.yuan@amd.com, sandipan.das@amd.com, kai.huang@intel.com, xiaoyao.li@intel.com, seanjc@google.com, xin3.li@intel.com, andrew.cooper3@citrix.com, ebiggers@google.com, mario.limonciello@amd.com, james.morse@arm.com, tan.shaopeng@fujitsu.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, maciej.wieczor-retman@intel.com, eranian@google.com References: Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/22/2025 12:20 PM, Babu Moger wrote: > diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c > index 8917c7261680..6fe9e610e9a0 100644 > --- a/arch/x86/kernel/cpu/resctrl/monitor.c > +++ b/arch/x86/kernel/cpu/resctrl/monitor.c > @@ -1324,3 +1324,49 @@ int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable) > > return 0; > } > + > +u32 resctrl_arch_mon_event_config_get(struct rdt_mon_domain *d, > + enum resctrl_event_id eventid) > +{ > + struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d); > + > + switch (eventid) { > + case QOS_L3_OCCUP_EVENT_ID: > + break; > + case QOS_L3_MBM_TOTAL_EVENT_ID: > + return hw_dom->mbm_total_cfg; > + case QOS_L3_MBM_LOCAL_EVENT_ID: > + return hw_dom->mbm_local_cfg; > + } > + > + /* Never expect to get here */ > + WARN_ON_ONCE(1); > + > + return INVALID_CONFIG_VALUE; > +} > + > +void resctrl_arch_mon_event_config_set(void *info) > +{ > + struct mon_config_info *mon_info = info; > + struct rdt_hw_mon_domain *hw_dom; > + unsigned int index; > + > + index = mon_event_config_index_get(mon_info->evtid); > + if (index == INVALID_CONFIG_INDEX) > + return; > + > + wrmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, 0); This is the existing code, however it would be better to use wrmsrl() when the higher 32-bit are all 0s: wrmsrl(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config); Thanks! Xin