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Rozycki" Cc: "Thomas Bogendoerfer" , "Jonathan Corbet" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, "linux-mips@vger.kernel.org" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v3] MIPS: Implement ieee754 NAN2008 emulation mode Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B46=E6=9C=8827=E6=97=A5=E5=85=AD=E6=9C=88 =E4=B8=8B=E5= =8D=888:54=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A > On Thu, 27 Jun 2024, Jiaxun Yang wrote: > >> >> @@ -318,6 +318,10 @@ void mips_set_personality_nan(struct arch_elf= _state *state) >> >> t->thread.fpu.fcr31 =3D c->fpu_csr31; >> >> switch (state->nan_2008) { >> >> case 0: >> >> + if (!(c->fpu_msk31 & FPU_CSR_NAN2008)) >> >> + t->thread.fpu.fcr31 &=3D ~FPU_CSR_NAN2008; >> >> + if (!(c->fpu_msk31 & FPU_CSR_ABS2008)) >> >> + t->thread.fpu.fcr31 &=3D ~FPU_CSR_ABS2008; >> > >> > why is this needed? >>=20 >> Because t->thread.fpu.fcr31 comes from c->fpu_csr31, in this case we = the default >> value of c->fpu_csr31 is read from hardware and we don't know what wo= uld that be. > > But it has always been like this. What has changed with your patch t= hat=20 > you need to mask the bit out now? After this patch kernel's copy of t->thread.fpu.fcr31 can disagree with = hardware. When disagree happens, we trigger emulation. Before that patch for nan legacy binary running on nan2008 CPU t->thread= .fpu.fcr31 will still be nan2008 (for ieee754=3Drelaxed) so that's not relevant. Thanks > > Maciej --=20 - Jiaxun