From: Colton Lewis <coltonlewis@google.com>
To: Ben Horgan <ben.horgan@arm.com>
Cc: kvm@vger.kernel.org, pbonzini@redhat.com, corbet@lwn.net,
linux@armlinux.org.uk, catalin.marinas@arm.com, will@kernel.org,
maz@kernel.org, oliver.upton@linux.dev, mizhang@google.com,
joey.gouly@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, mark.rutland@arm.com, shuah@kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-perf-users@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 02/22] arm64: Generate sign macro for sysreg Enums
Date: Fri, 27 Jun 2025 20:45:38 +0000 [thread overview]
Message-ID: <gsntecv49aml.fsf@coltonlewis-kvm.c.googlers.com> (raw)
In-Reply-To: <603eb4c7-5570-438c-b747-cdcc67b09ea6@arm.com> (message from Ben Horgan on Fri, 27 Jun 2025 10:04:21 +0100)
Hi Ben. Thanks for the review.
Ben Horgan <ben.horgan@arm.com> writes:
> Hi Colton,
> On 6/26/25 21:04, Colton Lewis wrote:
>> There's no reason Enums shouldn't be equivalent to UnsignedEnums and
>> explicitly specify they are unsigned. This will avoid the annoyance I
>> had with HPMN0.
> An Enum can be annotated with the field's sign by updating it to
> UnsignedEnum or SignedEnum. This is explained in [1].
> With this change ID_AA64PFR1_EL1.MTE_frac would be marked as unsigned
> when it should really be considered signed.
> Enum 43:40 MTE_frac
> 0b0000 ASYNC
> 0b1111 NI
> EndEnum
Thanks for the explanation. I made this a separate commit because I
considered people might object and HPMN0 is already an UnsignedEnum in
my previous commit.
Do you think it would be a good idea to make plain Enums signed by
default or should I just remove this commit from the series?
>> Signed-off-by: Colton Lewis <coltonlewis@google.com>
>> ---
>> arch/arm64/tools/gen-sysreg.awk | 1 +
>> 1 file changed, 1 insertion(+)
>> diff --git a/arch/arm64/tools/gen-sysreg.awk
>> b/arch/arm64/tools/gen-sysreg.awk
>> index f2a1732cb1f6..fa21a632d9b7 100755
>> --- a/arch/arm64/tools/gen-sysreg.awk
>> +++ b/arch/arm64/tools/gen-sysreg.awk
>> @@ -308,6 +308,7 @@ $1 == "Enum" && (block_current() == "Sysreg" ||
>> block_current() == "SysregFields
>> parse_bitdef(reg, field, $2)
>> define_field(reg, field, msb, lsb)
>> + define_field_sign(reg, field, "false")
>> next
>> }
> Thanks,
> Ben
> [1]
> https://lore.kernel.org/all/20221207-arm64-sysreg-helpers-v4-1-25b6b3fb9d18@kernel.org/
next prev parent reply other threads:[~2025-06-27 20:45 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 20:04 [PATCH v3 00/22] ARM64 PMU Partitioning Colton Lewis
2025-06-26 20:04 ` [PATCH v3 01/22] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2025-07-07 16:05 ` Mark Rutland
2025-07-08 22:34 ` Colton Lewis
2025-06-26 20:04 ` [PATCH v3 02/22] arm64: Generate sign macro for sysreg Enums Colton Lewis
2025-06-27 9:04 ` Ben Horgan
2025-06-27 20:45 ` Colton Lewis [this message]
2025-06-27 20:55 ` Oliver Upton
2025-06-30 17:42 ` Colton Lewis
2025-06-27 13:23 ` Marc Zyngier
2025-07-07 16:07 ` Mark Rutland
2025-06-26 20:04 ` [PATCH v3 03/22] KVM: arm64: Define PMI{CNTR,FILTR}_EL0 as undef_access Colton Lewis
2025-06-27 13:31 ` Marc Zyngier
2025-06-27 20:45 ` Colton Lewis
2025-06-26 20:04 ` [PATCH v3 04/22] KVM: arm64: Cleanup PMU includes Colton Lewis
2025-07-07 16:13 ` Mark Rutland
2025-07-08 22:37 ` Colton Lewis
2025-06-26 20:04 ` [PATCH v3 05/22] KVM: arm64: Reorganize PMU functions Colton Lewis
2025-06-26 20:04 ` [PATCH v3 06/22] perf: arm_pmuv3: Introduce method to partition the PMU Colton Lewis
2025-07-07 16:57 ` Mark Rutland
2025-07-07 19:07 ` Oliver Upton
2025-07-08 22:38 ` Colton Lewis
2025-07-08 22:41 ` Oliver Upton
2025-06-26 20:04 ` [PATCH v3 07/22] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-07-07 16:58 ` Mark Rutland
2025-07-08 22:38 ` Colton Lewis
2025-06-26 20:04 ` [PATCH v3 08/22] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-06-26 20:04 ` [PATCH v3 09/22] KVM: arm64: Correct kvm_arm_pmu_get_max_counters() Colton Lewis
2025-06-27 13:36 ` Marc Zyngier
2025-06-30 17:42 ` Colton Lewis
2025-06-26 20:04 ` [PATCH v3 10/22] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2025-06-27 15:01 ` Marc Zyngier
2025-06-27 20:45 ` Colton Lewis
2025-06-28 8:25 ` Marc Zyngier
2025-06-26 20:04 ` [PATCH v3 11/22] KVM: arm64: Writethrough trapped PMEVTYPER register Colton Lewis
2025-06-26 20:04 ` [PATCH v3 12/22] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned Colton Lewis
2025-06-26 20:04 ` [PATCH v3 13/22] KVM: arm64: Writethrough trapped PMOVS register Colton Lewis
2025-06-26 20:04 ` [PATCH v3 14/22] KVM: arm64: Write fast path PMU register handlers Colton Lewis
2025-06-26 20:04 ` [PATCH v3 15/22] KVM: arm64: Setup MDCR_EL2 to handle a partitioned PMU Colton Lewis
2025-06-26 20:04 ` [PATCH v3 16/22] KVM: arm64: Account for partitioning in PMCR_EL0 access Colton Lewis
2025-06-26 20:04 ` [PATCH v3 17/22] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2025-06-26 20:04 ` [PATCH v3 18/22] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2025-06-26 20:04 ` [PATCH v3 19/22] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2025-06-26 20:04 ` [PATCH v3 20/22] KVM: arm64: Inject recorded guest interrupts Colton Lewis
2025-06-26 20:04 ` [PATCH v3 21/22] KVM: arm64: Add ioctl to partition the PMU when supported Colton Lewis
2025-06-26 20:04 ` [PATCH v3 22/22] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis
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