* [PATCH 0/2] drm: Rename drm_atomic_state
From: Maxime Ripard @ 2026-03-26 10:09 UTC (permalink / raw)
To: David Airlie, Simona Vetter, Maarten Lankhorst, Thomas Zimmermann,
Jonathan Corbet
Cc: dri-devel, linux-doc, Maxime Ripard
We've been discussing for a long time about renaming drm_atomic_state
to a better suited name, since the current one is a source of confusion
and bugs.
To minimize the impact, this should probably go through drm-next
directly.
Let me know what you think,
Maxime
Signed-off-by: Maxime Ripard <mripard@kernel.org>
---
Maxime Ripard (2):
drm: Rename drm_atomic_state
Documentation: drm: Remove drm_atomic_state rename entry
Documentation/gpu/drm-kms.rst | 14 +-
Documentation/gpu/komeda-kms.rst | 8 +-
Documentation/gpu/todo.rst | 23 ---
drivers/gpu/drm/adp/adp_drv.c | 12 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 10 +-
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 62 ++++----
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 6 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 12 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 4 +-
.../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 22 +--
.../amd/display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 6 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h | 20 +--
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 8 +-
drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 10 +-
.../gpu/drm/arm/display/komeda/komeda_pipeline.h | 14 +-
.../drm/arm/display/komeda/komeda_pipeline_state.c | 28 ++--
drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 4 +-
drivers/gpu/drm/arm/hdlcd_crtc.c | 10 +-
drivers/gpu/drm/arm/malidp_crtc.c | 6 +-
drivers/gpu/drm/arm/malidp_drv.c | 4 +-
drivers/gpu/drm/arm/malidp_mw.c | 2 +-
drivers/gpu/drm/arm/malidp_mw.h | 2 +-
drivers/gpu/drm/arm/malidp_planes.c | 6 +-
drivers/gpu/drm/armada/armada_crtc.c | 10 +-
drivers/gpu/drm/armada/armada_overlay.c | 10 +-
drivers/gpu/drm/armada/armada_plane.c | 6 +-
drivers/gpu/drm/armada/armada_plane.h | 2 +-
drivers/gpu/drm/ast/ast_cursor.c | 6 +-
drivers/gpu/drm/ast/ast_dp.c | 4 +-
drivers/gpu/drm/ast/ast_dp501.c | 4 +-
drivers/gpu/drm/ast/ast_mode.c | 18 +--
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 10 +-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 2 +-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 +-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 6 +-
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 4 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 14 +-
drivers/gpu/drm/bridge/analogix/anx7625.c | 4 +-
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 4 +-
.../gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 +-
drivers/gpu/drm/bridge/chipone-icn6211.c | 6 +-
drivers/gpu/drm/bridge/fsl-ldb.c | 4 +-
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 4 +-
drivers/gpu/drm/bridge/imx/imx8qm-ldb.c | 4 +-
drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c | 6 +-
.../gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c | 2 +-
drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 4 +-
drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 2 +-
drivers/gpu/drm/bridge/inno-hdmi.c | 6 +-
drivers/gpu/drm/bridge/ite-it6263.c | 4 +-
drivers/gpu/drm/bridge/ite-it6505.c | 8 +-
drivers/gpu/drm/bridge/ite-it66121.c | 4 +-
drivers/gpu/drm/bridge/lontium-lt9211.c | 4 +-
drivers/gpu/drm/bridge/lontium-lt9611.c | 8 +-
drivers/gpu/drm/bridge/nwl-dsi.c | 4 +-
drivers/gpu/drm/bridge/panel.c | 8 +-
drivers/gpu/drm/bridge/parade-ps8640.c | 4 +-
drivers/gpu/drm/bridge/samsung-dsim.c | 8 +-
drivers/gpu/drm/bridge/sii902x.c | 4 +-
drivers/gpu/drm/bridge/ssd2825.c | 6 +-
drivers/gpu/drm/bridge/synopsys/dw-dp.c | 4 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 4 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 +-
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 6 +-
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c | 6 +-
drivers/gpu/drm/bridge/tc358762.c | 6 +-
drivers/gpu/drm/bridge/tc358767.c | 8 +-
drivers/gpu/drm/bridge/tc358768.c | 8 +-
drivers/gpu/drm/bridge/tc358775.c | 6 +-
drivers/gpu/drm/bridge/ti-dlpc3433.c | 6 +-
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 6 +-
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 22 +--
drivers/gpu/drm/bridge/ti-tdp158.c | 4 +-
drivers/gpu/drm/ci/xfails/vkms-none-skips.txt | 20 +--
drivers/gpu/drm/display/drm_bridge_connector.c | 2 +-
drivers/gpu/drm/display/drm_dp_mst_topology.c | 26 ++--
drivers/gpu/drm/display/drm_dp_tunnel.c | 14 +-
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 6 +-
drivers/gpu/drm/drm_atomic.c | 128 +++++++--------
drivers/gpu/drm/drm_atomic_helper.c | 172 ++++++++++-----------
drivers/gpu/drm/drm_atomic_state_helper.c | 2 +-
drivers/gpu/drm/drm_atomic_uapi.c | 28 ++--
drivers/gpu/drm/drm_blend.c | 8 +-
drivers/gpu/drm/drm_bridge.c | 14 +-
drivers/gpu/drm/drm_client_modeset.c | 8 +-
drivers/gpu/drm/drm_color_mgmt.c | 6 +-
drivers/gpu/drm/drm_crtc_helper.c | 2 +-
drivers/gpu/drm/drm_crtc_internal.h | 10 +-
drivers/gpu/drm/drm_damage_helper.c | 10 +-
drivers/gpu/drm/drm_fb_helper.c | 8 +-
drivers/gpu/drm/drm_framebuffer.c | 8 +-
drivers/gpu/drm/drm_mode_object.c | 8 +-
drivers/gpu/drm/drm_modeset_helper.c | 2 +-
drivers/gpu/drm/drm_self_refresh_helper.c | 12 +-
drivers/gpu/drm/drm_simple_kms_helper.c | 10 +-
drivers/gpu/drm/drm_vblank_helper.c | 6 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 10 +-
drivers/gpu/drm/exynos/exynos_drm_plane.c | 6 +-
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 6 +-
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 6 +-
drivers/gpu/drm/gud/gud_connector.c | 10 +-
drivers/gpu/drm/gud/gud_internal.h | 8 +-
drivers/gpu/drm/gud/gud_pipe.c | 8 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 12 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 4 +-
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 14 +-
drivers/gpu/drm/hyperv/hyperv_drm_modeset.c | 6 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
drivers/gpu/drm/i915/display/i9xx_wm.c | 10 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 16 +-
drivers/gpu/drm/i915/display/intel_atomic.h | 12 +-
drivers/gpu/drm/i915/display/intel_audio.c | 8 +-
drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 22 +--
drivers/gpu/drm/i915/display/intel_display.h | 6 +-
drivers/gpu/drm/i915/display/intel_display_core.h | 2 +-
.../gpu/drm/i915/display/intel_display_driver.c | 8 +-
.../gpu/drm/i915/display/intel_display_driver.h | 4 +-
drivers/gpu/drm/i915/display/intel_display_reset.c | 8 +-
drivers/gpu/drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_load_detect.c | 20 +--
drivers/gpu/drm/i915/display/intel_load_detect.h | 6 +-
drivers/gpu/drm/i915/display/intel_modeset_lock.c | 2 +-
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +-
drivers/gpu/drm/i915/display/intel_pipe_crc.c | 8 +-
drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 8 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite_uapi.c | 8 +-
drivers/gpu/drm/i915/display/intel_tc.c | 6 +-
drivers/gpu/drm/i915/display/intel_tv.c | 4 +-
drivers/gpu/drm/imx/dc/dc-crtc.c | 10 +-
drivers/gpu/drm/imx/dc/dc-plane.c | 6 +-
drivers/gpu/drm/imx/dcss/dcss-crtc.c | 8 +-
drivers/gpu/drm/imx/dcss/dcss-plane.c | 6 +-
drivers/gpu/drm/imx/ipuv3/imx-drm-core.c | 4 +-
drivers/gpu/drm/imx/ipuv3/imx-drm.h | 2 +-
drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c | 10 +-
drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c | 8 +-
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 24 +--
drivers/gpu/drm/ingenic/ingenic-ipu.c | 10 +-
drivers/gpu/drm/kmb/kmb_crtc.c | 10 +-
drivers/gpu/drm/kmb/kmb_drv.h | 2 +-
drivers/gpu/drm/kmb/kmb_dsi.c | 4 +-
drivers/gpu/drm/kmb/kmb_dsi.h | 2 +-
drivers/gpu/drm/kmb/kmb_plane.c | 6 +-
drivers/gpu/drm/logicvc/logicvc_crtc.c | 6 +-
drivers/gpu/drm/logicvc/logicvc_layer.c | 6 +-
drivers/gpu/drm/loongson/lsdc_crtc.c | 8 +-
drivers/gpu/drm/loongson/lsdc_output_7a1000.c | 2 +-
drivers/gpu/drm/loongson/lsdc_output_7a2000.c | 6 +-
drivers/gpu/drm/loongson/lsdc_plane.c | 22 +--
drivers/gpu/drm/mediatek/mtk_crtc.c | 12 +-
drivers/gpu/drm/mediatek/mtk_crtc.h | 2 +-
drivers/gpu/drm/mediatek/mtk_dp.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 +-
drivers/gpu/drm/mediatek/mtk_hdmi.c | 8 +-
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 8 +-
drivers/gpu/drm/mediatek/mtk_plane.c | 10 +-
drivers/gpu/drm/meson/meson_crtc.c | 12 +-
drivers/gpu/drm/meson/meson_encoder_cvbs.c | 4 +-
drivers/gpu/drm/meson/meson_encoder_dsi.c | 4 +-
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 4 +-
drivers/gpu/drm/meson/meson_overlay.c | 6 +-
drivers/gpu/drm/meson/meson_plane.c | 6 +-
drivers/gpu/drm/mgag200/mgag200_drv.h | 26 ++--
drivers/gpu/drm/mgag200/mgag200_g200.c | 4 +-
drivers/gpu/drm/mgag200/mgag200_g200eh.c | 4 +-
drivers/gpu/drm/mgag200/mgag200_g200eh3.c | 2 +-
drivers/gpu/drm/mgag200/mgag200_g200eh5.c | 2 +-
drivers/gpu/drm/mgag200/mgag200_g200er.c | 6 +-
drivers/gpu/drm/mgag200/mgag200_g200ev.c | 6 +-
drivers/gpu/drm/mgag200/mgag200_g200ew3.c | 2 +-
drivers/gpu/drm/mgag200/mgag200_g200se.c | 10 +-
drivers/gpu/drm/mgag200/mgag200_g200wb.c | 4 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 18 +--
drivers/gpu/drm/mgag200/mgag200_vga_bmc.c | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 8 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 2 +-
drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c | 10 +-
drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 10 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.h | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h | 4 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 8 +-
drivers/gpu/drm/msm/disp/msm_disp_snapshot.h | 2 +-
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c | 2 +-
drivers/gpu/drm/msm/dp/dp_display.c | 6 +-
drivers/gpu/drm/msm/dp/dp_drm.c | 6 +-
drivers/gpu/drm/msm/dp/dp_drm.h | 6 +-
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 4 +-
drivers/gpu/drm/msm/msm_atomic.c | 8 +-
drivers/gpu/drm/msm/msm_drv.h | 6 +-
drivers/gpu/drm/msm/msm_kms.h | 4 +-
drivers/gpu/drm/mxsfb/lcdif_kms.c | 12 +-
drivers/gpu/drm/mxsfb/mxsfb_kms.c | 16 +-
drivers/gpu/drm/nouveau/dispnv50/atom.h | 6 +-
drivers/gpu/drm/nouveau/dispnv50/crc.c | 16 +-
drivers/gpu/drm/nouveau/dispnv50/crc.h | 16 +-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 68 ++++----
drivers/gpu/drm/nouveau/dispnv50/head.c | 2 +-
drivers/gpu/drm/nouveau/dispnv50/wndw.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_connector.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_display.h | 2 +-
drivers/gpu/drm/nouveau/nouveau_encoder.h | 4 +-
drivers/gpu/drm/omapdrm/dss/hdmi4.c | 4 +-
drivers/gpu/drm/omapdrm/dss/hdmi5.c | 4 +-
drivers/gpu/drm/omapdrm/omap_crtc.c | 10 +-
drivers/gpu/drm/omapdrm/omap_drv.c | 14 +-
drivers/gpu/drm/omapdrm/omap_drv.h | 2 +-
drivers/gpu/drm/omapdrm/omap_overlay.c | 4 +-
drivers/gpu/drm/omapdrm/omap_overlay.h | 4 +-
drivers/gpu/drm/omapdrm/omap_plane.c | 6 +-
drivers/gpu/drm/qxl/qxl_display.c | 16 +-
drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c | 18 +--
drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c | 4 +-
drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c | 6 +-
drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h | 2 +-
drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c | 4 +-
drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c | 6 +-
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 6 +-
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.h | 6 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 6 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c | 4 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 8 +-
drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c | 6 +-
drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c | 6 +-
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 6 +-
drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +-
drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c | 2 +-
drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 2 +-
drivers/gpu/drm/rockchip/rk3066_hdmi.c | 6 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 22 +--
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 18 +--
drivers/gpu/drm/sitronix/st7571.c | 10 +-
drivers/gpu/drm/sitronix/st7920.c | 12 +-
drivers/gpu/drm/solomon/ssd130x.c | 32 ++--
drivers/gpu/drm/sprd/sprd_dpu.c | 12 +-
drivers/gpu/drm/sti/sti_crtc.c | 6 +-
drivers/gpu/drm/sti/sti_cursor.c | 6 +-
drivers/gpu/drm/sti/sti_gdp.c | 6 +-
drivers/gpu/drm/sti/sti_hqvdp.c | 6 +-
drivers/gpu/drm/stm/drv.c | 2 +-
drivers/gpu/drm/stm/ltdc.c | 12 +-
drivers/gpu/drm/stm/ltdc.h | 2 +-
drivers/gpu/drm/stm/lvds.c | 6 +-
drivers/gpu/drm/sun4i/sun4i_backend.c | 4 +-
drivers/gpu/drm/sun4i/sun4i_crtc.c | 10 +-
drivers/gpu/drm/sun4i/sun4i_framebuffer.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 4 +-
drivers/gpu/drm/sun4i/sun4i_layer.c | 4 +-
drivers/gpu/drm/sun4i/sun4i_tv.c | 4 +-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 4 +-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 4 +-
drivers/gpu/drm/sun4i/sunxi_engine.h | 4 +-
drivers/gpu/drm/sysfb/drm_sysfb_helper.h | 8 +-
drivers/gpu/drm/sysfb/drm_sysfb_modeset.c | 8 +-
drivers/gpu/drm/sysfb/ofdrm.c | 2 +-
drivers/gpu/drm/sysfb/vesadrm.c | 4 +-
drivers/gpu/drm/tegra/dc.c | 32 ++--
drivers/gpu/drm/tegra/dc.h | 2 +-
drivers/gpu/drm/tegra/drm.c | 6 +-
drivers/gpu/drm/tegra/hub.c | 12 +-
drivers/gpu/drm/tegra/hub.h | 4 +-
drivers/gpu/drm/tests/Makefile | 2 +-
...tomic_state_test.c => drm_atomic_update_test.c} | 12 +-
drivers/gpu/drm/tests/drm_bridge_test.c | 8 +-
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 88 +++++------
drivers/gpu/drm/tests/drm_kunit_helpers.c | 18 +--
drivers/gpu/drm/tidss/tidss_crtc.c | 10 +-
drivers/gpu/drm/tidss/tidss_kms.c | 4 +-
drivers/gpu/drm/tidss/tidss_oldi.c | 4 +-
drivers/gpu/drm/tidss/tidss_plane.c | 8 +-
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 8 +-
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 +-
drivers/gpu/drm/tilcdc/tilcdc_plane.c | 4 +-
drivers/gpu/drm/tiny/appletbdrm.c | 6 +-
drivers/gpu/drm/tiny/bochs.c | 10 +-
drivers/gpu/drm/tiny/cirrus-qemu.c | 8 +-
drivers/gpu/drm/tiny/pixpaper.c | 10 +-
drivers/gpu/drm/tiny/sharp-memory.c | 10 +-
drivers/gpu/drm/udl/udl_modeset.c | 8 +-
drivers/gpu/drm/vboxvideo/vbox_mode.c | 18 +--
drivers/gpu/drm/vc4/tests/vc4_mock.h | 4 +-
drivers/gpu/drm/vc4/tests/vc4_mock_output.c | 4 +-
drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c | 50 +++---
drivers/gpu/drm/vc4/vc4_crtc.c | 10 +-
drivers/gpu/drm/vc4/vc4_drv.h | 28 ++--
drivers/gpu/drm/vc4/vc4_dsi.c | 8 +-
drivers/gpu/drm/vc4/vc4_hdmi.c | 12 +-
drivers/gpu/drm/vc4/vc4_hvs.c | 10 +-
drivers/gpu/drm/vc4/vc4_kms.c | 30 ++--
drivers/gpu/drm/vc4/vc4_plane.c | 8 +-
drivers/gpu/drm/vc4/vc4_txp.c | 10 +-
drivers/gpu/drm/vc4/vc4_vec.c | 4 +-
drivers/gpu/drm/verisilicon/vs_bridge.c | 6 +-
drivers/gpu/drm/verisilicon/vs_crtc.c | 4 +-
drivers/gpu/drm/verisilicon/vs_primary_plane.c | 8 +-
drivers/gpu/drm/virtio/virtgpu_display.c | 8 +-
drivers/gpu/drm/virtio/virtgpu_plane.c | 6 +-
drivers/gpu/drm/vkms/vkms_crtc.c | 6 +-
drivers/gpu/drm/vkms/vkms_drv.c | 4 +-
drivers/gpu/drm/vkms/vkms_plane.c | 4 +-
drivers/gpu/drm/vkms/vkms_writeback.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 18 +--
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 6 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 8 +-
drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c | 8 +-
drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h | 10 +-
drivers/gpu/drm/xlnx/zynqmp_dp.c | 6 +-
drivers/gpu/drm/xlnx/zynqmp_kms.c | 16 +-
include/drm/display/drm_dp_mst_helper.h | 32 ++--
include/drm/display/drm_dp_tunnel.h | 24 +--
include/drm/display/drm_hdmi_state_helper.h | 6 +-
include/drm/drm_atomic.h | 158 +++++++++----------
include/drm/drm_atomic_helper.h | 78 +++++-----
include/drm/drm_atomic_state_helper.h | 4 +-
include/drm/drm_blend.h | 4 +-
include/drm/drm_bridge.h | 16 +-
include/drm/drm_colorop.h | 4 +-
include/drm/drm_connector.h | 6 +-
include/drm/drm_crtc.h | 10 +-
include/drm/drm_crtc_helper.h | 4 +-
include/drm/drm_damage_helper.h | 2 +-
include/drm/drm_kunit_helpers.h | 2 +-
include/drm/drm_mode_config.h | 38 ++---
include/drm/drm_modeset_helper_vtables.h | 44 +++---
include/drm/drm_plane.h | 6 +-
include/drm/drm_self_refresh_helper.h | 6 +-
include/drm/drm_vblank_helper.h | 8 +-
354 files changed, 1724 insertions(+), 1747 deletions(-)
---
base-commit: 66ba480978ce390e631e870b740a3406e3eb6b01
change-id: 20260326-drm-drm-atomic-update-2ef5e15eb6a8
Best regards,
--
Maxime Ripard <mripard@kernel.org>
^ permalink raw reply
* Re: [PATCH v8 02/10] x86/bhi: Make clear_bhb_loop() effective on newer CPUs
From: Borislav Petkov @ 2026-03-26 10:01 UTC (permalink / raw)
To: Pawan Gupta
Cc: x86, Jon Kohler, Nikolay Borisov, H. Peter Anvin, Josh Poimboeuf,
David Kaplan, Sean Christopherson, Dave Hansen, Peter Zijlstra,
Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko, KP Singh,
Jiri Olsa, David S. Miller, David Laight, Andy Lutomirski,
Thomas Gleixner, Ingo Molnar, David Ahern, Martin KaFai Lau,
Eduard Zingerman, Song Liu, Yonghong Song, John Fastabend,
Stanislav Fomichev, Hao Luo, Paolo Bonzini, Jonathan Corbet,
linux-kernel, kvm, Asit Mallick, Tao Zhang, bpf, netdev,
linux-doc
In-Reply-To: <20260326083934.fk4wyhe6rgiss34z@desk>
On Thu, Mar 26, 2026 at 01:39:34AM -0700, Pawan Gupta wrote:
> I believe the equivalent for cpu_feature_enabled() in asm is the
> ALTERNATIVE. Please let me know if I am missing something.
Yes, you are.
The point is that you don't want to stick those alternative calls inside some
magic bhb_loop function but hand them in from the outside, as function
arguments.
Basically what I did.
Then you were worried about this being C code and it had to be noinstr... So
that outer function can be rewritten in asm, I think, and still keep it well
separate.
I'll try to rewrite it once I get a free minute, and see how it looks.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply
* Re: [PATCH v3] docs: driver-api: fix 6 spelling typos in Documentation/driver-api
From: Krzysztof Kozlowski @ 2026-03-26 9:34 UTC (permalink / raw)
To: Josh Law, Jonathan Corbet, Tomás Pando
Cc: skhan, linux-doc, linux-kernel, Randy Dunlap
In-Reply-To: <A54D6856-52DB-4914-BE50-A86EA76733CD@objecting.org>
On 24/03/2026 18:19, Josh Law wrote:
>
>
> On 24 March 2026 17:10:05 GMT, Jonathan Corbet <corbet@lwn.net> wrote:
>> Josh Law <objecting@objecting.org> writes:
>>
>>> Acked-By: Josh Law <objecting@objecting.org>
>>>
>>> Patches like these are good clarification
>>>
>>> Keep it up!
>>
>> I'm all for encouraging contributors, but an Acked-by from a random
>> contributor to a typo-fix patch, without having even bothered to trim
>> 100 lines of stuff, is not particularly helpful for maintainers. What
>> is your purpose here?
>>
>> Thanks,
>>
>> jon
>>
>
>
>
> Apologies Jon, I just like patches that fix typos, because when maintainers (or others..) have to read the code in let's say, 10 years, they will be able to understand the code easier.
>
You have been asked like 10 or 20 times already to adjust to mailing
list style of replies. No improvements.
You did not get the point here about your Ack. You answered why the
patch is right, but that was not the question. Question was what is the
purpose of your Ack?
Best regards,
Krzysztof
^ permalink raw reply
* Re: Invalid link generation for equations
From: Akira Yokosawa @ 2026-03-26 9:30 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Jonathan Corbet
Cc: Shuah Khan, Kevin Brodsky, linux-doc, Konstantin Ryabitsev,
Mauro Carvalho Chehab
In-Reply-To: <20260325224015.1ba54eda@foz.lan>
Hi,
[...]
I think I found out what is happening.
Sphinx version at https://www.kernel.org/doc/html/latest/ is 5.3.0.
Sphinx version at https://www.kernel.org/doc/html/next/ is 7.4.7, where
math expressions are rendered as expected.
Sphinx 6.0.1, whose changelog at:
https://www.sphinx-doc.org/en/master/changes/6.0.html#release-6-0-1-released-jan-05-2023
says:
Bugs fixed
#10944: imgmath: Fix resolving image paths for files in nested
folders.
The bug was introduced in Sphinix 5.3.0.
This means Sphinx at https://www.kernel.org/doc/html/latest/ wants an
upgrade.
Thanks, Akira
^ permalink raw reply
* Re: [PATCH v8 02/10] x86/bhi: Make clear_bhb_loop() effective on newer CPUs
From: David Laight @ 2026-03-26 9:15 UTC (permalink / raw)
To: Pawan Gupta
Cc: Borislav Petkov, x86, Jon Kohler, Nikolay Borisov, H. Peter Anvin,
Josh Poimboeuf, David Kaplan, Sean Christopherson, Dave Hansen,
Peter Zijlstra, Alexei Starovoitov, Daniel Borkmann,
Andrii Nakryiko, KP Singh, Jiri Olsa, David S. Miller,
Andy Lutomirski, Thomas Gleixner, Ingo Molnar, David Ahern,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, Stanislav Fomichev, Hao Luo, Paolo Bonzini,
Jonathan Corbet, linux-kernel, kvm, Asit Mallick, Tao Zhang, bpf,
netdev, linux-doc
In-Reply-To: <20260326083934.fk4wyhe6rgiss34z@desk>
On Thu, 26 Mar 2026 01:39:34 -0700
Pawan Gupta <pawan.kumar.gupta@linux.intel.com> wrote:
> On Wed, Mar 25, 2026 at 09:37:59PM +0100, Borislav Petkov wrote:
> > On Tue, Mar 24, 2026 at 03:13:08PM -0700, Pawan Gupta wrote:
> > > This is cleaner. A few things to consider are, CLEAR_BRANCH_HISTORY that
> > > calls clear_bhb_loop() would be calling into C code very early during the
> > > kernel entry. The code generated here may vary based on the compiler. Any
> > > indirect branch here would be security risk. This needs to be noinstr so
> > > that it can't be hijacked by probes and ftraces.
> > >
> > > At kernel entry, calling into C before mitigations are applied is risky.
> >
> > You can write the above function in asm if you prefer - should still be
> > easier.
>
> I believe the equivalent for cpu_feature_enabled() in asm is the
> ALTERNATIVE. Please let me know if I am missing something.
>
> Regarding your intent to move the loop count selection out of the BHB
> sequence, below is what I could come up. It is not as pretty as the C
> version, but it is trying to achieve something similar:
I think that fails on being harder to read and longer.
So no real benefit.
I believe this code has to be asm because it is required to excute
specific instructions in a specific order - you can't trust the C
compiler to do that for you.
David
>
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index ecae3cef9d8c..54c65b0a3f65 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -1494,6 +1494,20 @@ SYM_CODE_START_NOALIGN(rewind_stack_and_make_dead)
> SYM_CODE_END(rewind_stack_and_make_dead)
> .popsection
>
> +/*
> + * Between the long and short version of BHB clear sequence, just the
> + * loop count differs based on BHI_CTRL, see Intel's BHI guidance.
> + */
> +#define BHB_SHORT_LOOP_OUTER 5
> +#define BHB_SHORT_LOOP_INNER 5
> +
> +#define BHB_LONG_LOOP_OUTER 12
> +#define BHB_LONG_LOOP_INNER 7
> +
> +#define BHB_MOVB(type, reg) \
> + ALTERNATIVE __stringify(movb $BHB_SHORT_LOOP_##type, reg), \
> + __stringify(movb $BHB_LONG_LOOP_##type, reg), X86_FEATURE_BHI_CTRL
> +
> /*
> * This sequence executes branches in order to remove user branch information
> * from the branch history tracker in the Branch Predictor, therefore removing
> @@ -1540,12 +1554,7 @@ SYM_FUNC_START(clear_bhb_loop_nofence)
> /* BPF caller may require all registers to be preserved */
> push %rax
>
> - /*
> - * Between the long and short version of BHB clear sequence, just the
> - * loop count differs based on BHI_CTRL, see Intel's BHI guidance.
> - */
> - ALTERNATIVE "movb $5, %al", \
> - "movb $12, %al", X86_FEATURE_BHI_CTRL
> + BHB_MOVB(OUTER, %al)
>
> ANNOTATE_INTRA_FUNCTION_CALL
> call 1f
> @@ -1567,8 +1576,7 @@ SYM_FUNC_START(clear_bhb_loop_nofence)
> * but some Clang versions (e.g. 18) don't like this.
> */
> .skip 32 - 14, 0xcc
> -2: ALTERNATIVE "movb $5, %ah", \
> - "movb $7, %ah", X86_FEATURE_BHI_CTRL
> +2: BHB_MOVB(INNER, %ah)
> 3: jmp 4f
> nop
> 4: sub $1, %ah
>
>
> Below is how the disassembly looks like:
>
> clear_bhb_loop_nofence:
> ...
> call 1f
> jmp 5f
> // BHB_MOVB(OUTER, %al)
> mov $0x5,%al
^ permalink raw reply
* Re: [PATCH v6 00/22] Runtime TDX module update support
From: Chao Gao @ 2026-03-26 8:52 UTC (permalink / raw)
To: kvm, linux-coco, linux-doc, linux-kernel, linux-rt-devel, x86
Cc: binbin.wu, dan.j.williams, dave.hansen, ira.weiny, kai.huang, kas,
nik.borisov, paulmck, pbonzini, reinette.chatre, rick.p.edgecombe,
sagis, seanjc, tony.lindgren, vannapurve, vishal.l.verma,
yilun.xu, xiaoyao.li, yan.y.zhao, Borislav Petkov, Clark Williams,
H. Peter Anvin, Ingo Molnar, Jonathan Corbet,
Sebastian Andrzej Siewior, Shuah Khan, Steven Rostedt,
Thomas Gleixner
In-Reply-To: <20260326084448.29947-1-chao.gao@intel.com>
On Thu, Mar 26, 2026 at 01:43:51AM -0700, Chao Gao wrote:
>Hi Reviewers,
>
>Please review patches 6 and 17; others already have 2+ RB tags.
>
>Patch 6 was reworked to use is_visible() for attribute visibility (which is
>the standard practice), so previous RB tags were dropped. Patch 17 has
>fewer reviews so far and needs another look.
>
>I believe this series is quite mature and also self-contained (no impact to
>the rest of kernel unless an update is triggered through the dedicated
>sysfs ABIs). I'm hoping it can be merged for 7.1.
>
>Changelog:
>v5->v6:
Below is the diff between v5 and v6:
diff --git a/Documentation/ABI/testing/sysfs-devices-faux-tdx-host b/Documentation/ABI/testing/sysfs-devices-faux-tdx-host
index 97840db794c0..e1a2f3b2ea65 100644
--- a/Documentation/ABI/testing/sysfs-devices-faux-tdx-host
+++ b/Documentation/ABI/testing/sysfs-devices-faux-tdx-host
@@ -24,9 +24,8 @@ Description: (RO) Report the number of remaining updates. TDX maintains a
number is always zero if the P-SEAMLDR doesn't support updates.
See Intel® Trust Domain Extensions - SEAM Loader (SEAMLDR)
- Interface Specification, Revision 343755-003, Chapter 3.3
- "SEAMLDR_INFO" and Chapter 4.2 "SEAMLDR.INSTALL" for more
- information.
+ Interface Specification, Chapter "SEAMLDR_INFO" and Chapter
+ "SEAMLDR.INSTALL" for more information.
What: /sys/devices/faux/tdx_host/firmware/tdx_module
Contact: linux-coco@lists.linux.dev
@@ -58,14 +57,15 @@ Description: (RO) See Documentation/ABI/testing/sysfs-class-firmware for
baseline expectations for this file. The <ERROR> part in the
<STATUS>:<ERROR> format can be:
- "device-busy": Compatibility checks failed.
+ "device-busy": Conflicting operations are in progress, e.g., TD
+ build or TD migration.
"read-write-error": Memory allocation failed.
- "hw-error": Cannot communicate with P-SEAMLDR or TDX module.
+ "hw-error": Communication with P-SEAMLDR or TDX module failed
+ or update limit exhausted.
"firmware-invalid": The provided TDX module update is invalid,
- or the number of updates reached the limit,
or other unexpected errors occurred.
"hw-error" or "firmware-invalid" may be fatal, causing all TDs
diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h
index 386097b2e01b..6351d2c21513 100644
--- a/arch/x86/include/asm/tdx.h
+++ b/arch/x86/include/asm/tdx.h
@@ -116,11 +116,6 @@ static inline bool tdx_supports_runtime_update(const struct tdx_sys_info *sysinf
return sysinfo->features.tdx_features0 & TDX_FEATURES0_TD_PRESERVING;
}
-static inline bool tdx_supports_update_compatibility(const struct tdx_sys_info *sysinfo)
-{
- return sysinfo->features.tdx_features0 & TDX_FEATURES0_UPDATE_COMPAT;
-}
-
int tdx_guest_keyid_alloc(void);
u32 tdx_get_nr_guest_keyids(void);
void tdx_guest_keyid_free(unsigned int keyid);
diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamldr.c
index 4e1ad06506cc..276330179783 100644
--- a/arch/x86/virt/vmx/tdx/seamldr.c
+++ b/arch/x86/virt/vmx/tdx/seamldr.c
@@ -51,7 +51,8 @@ static_assert(sizeof(struct seamldr_params) == 4096);
/*
* Serialize P-SEAMLDR calls since the hardware only allows a single CPU to
* interact with P-SEAMLDR simultaneously. Use raw version as the calls can
- * be made with interrupts disabled.
+ * be made with interrupts disabled, where plain spinlocks are prohibited in
+ * PREEMPT_RT kernels as they become sleeping locks.
*/
static DEFINE_RAW_SPINLOCK(seamldr_lock);
@@ -73,6 +74,13 @@ int seamldr_get_info(struct seamldr_info *seamldr_info)
}
EXPORT_SYMBOL_FOR_MODULES(seamldr_get_info, "tdx-host");
+static int seamldr_install(const struct seamldr_params *params)
+{
+ struct tdx_module_args args = { .rcx = __pa(params) };
+
+ return seamldr_call(P_SEAMLDR_INSTALL, &args);
+}
+
static void free_seamldr_params(struct seamldr_params *params)
{
free_page((unsigned long)params);
@@ -109,8 +117,9 @@ static struct seamldr_params *alloc_seamldr_params(const void *module, unsigned
ptr = sig;
for (i = 0; i < sig_size / SZ_4K; i++) {
/*
- * Don't assume @sig is page-aligned although it is 4KB-aligned.
- * Always add the in-page offset to get the physical address.
+ * @sig is 4KB-aligned, but that does not imply PAGE_SIZE
+ * alignment when PAGE_SIZE != SZ_4K. Always include the
+ * in-page offset.
*/
params->sigstruct_pa[i] = (vmalloc_to_pfn(ptr) << PAGE_SHIFT) +
((unsigned long)ptr & ~PAGE_MASK);
@@ -136,6 +145,10 @@ static struct seamldr_params *alloc_seamldr_params(const void *module, unsigned
* Note this structure differs from the reference above: the two variable-length
* fields "@sigstruct" and "@module" are represented as a single "@data" field
* here and split programmatically using the offset_of_module value.
+ *
+ * Note @offset_of_module is relative to the start of struct tdx_blob, not
+ * @data, and @length is the total length of the blob, not the length of
+ * @data.
*/
struct tdx_blob {
u16 version;
@@ -196,7 +209,7 @@ enum module_update_state {
static struct {
enum module_update_state state;
int thread_ack;
- int failed;
+ bool failed;
/*
* Protect update_data. Raw spinlock as it will be acquired from
* interrupt-disabled contexts.
@@ -234,7 +247,6 @@ static void print_update_failure_message(void)
static int do_seamldr_install_module(void *seamldr_params)
{
enum module_update_state newstate, curstate = MODULE_UPDATE_START;
- struct tdx_module_args args = {};
int cpu = smp_processor_id();
bool primary;
int ret = 0;
@@ -254,8 +266,7 @@ static int do_seamldr_install_module(void *seamldr_params)
ret = tdx_module_shutdown();
break;
case MODULE_UPDATE_CPU_INSTALL:
- args.rcx = __pa(seamldr_params);
- ret = seamldr_call(P_SEAMLDR_INSTALL, &args);
+ ret = seamldr_install(seamldr_params);
break;
case MODULE_UPDATE_CPU_INIT:
ret = tdx_cpu_enable();
@@ -269,8 +280,7 @@ static int do_seamldr_install_module(void *seamldr_params)
}
if (ret) {
- scoped_guard(raw_spinlock, &update_data.lock)
- update_data.failed++;
+ WRITE_ONCE(update_data.failed, true);
if (curstate > MODULE_UPDATE_SHUTDOWN)
print_update_failure_message();
} else {
@@ -314,7 +324,7 @@ int seamldr_install_module(const u8 *data, u32 size)
if (IS_ERR(params))
return PTR_ERR(params);
- update_data.failed = 0;
+ update_data.failed = false;
set_target_state(MODULE_UPDATE_START + 1);
ret = stop_machine(do_seamldr_install_module, params, cpu_online_mask);
if (ret)
diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c
index b76b8c393425..3f4221098b78 100644
--- a/arch/x86/virt/vmx/tdx/tdx.c
+++ b/arch/x86/virt/vmx/tdx/tdx.c
@@ -1194,7 +1194,7 @@ int tdx_module_shutdown(void)
*/
args.rcx = tdx_sysinfo.handoff.module_hv;
- if (tdx_supports_update_compatibility(&tdx_sysinfo))
+ if (tdx_sysinfo.features.tdx_features0 & TDX_FEATURES0_UPDATE_COMPAT)
args.rcx |= TDX_SYS_SHUTDOWN_AVOID_COMPAT_SENSITIVE;
ret = seamcall(TDH_SYS_SHUTDOWN, &args);
@@ -1214,11 +1214,12 @@ int tdx_module_shutdown(void)
sysinit_ret = 0;
/*
- * By reaching here CPUHP is disabled and all present CPUs
- * are online. It's safe to just loop all online CPUs and
- * reset the per-cpu flag.
+ * Since the TDX module is shut down and gone, mark all CPUs
+ * (including offlined ones) as uninitialied. This is called in
+ * stop_machine() (where CPU hotplug is disabled), preventing
+ * races with other tdx_lp_initialized accesses.
*/
- for_each_online_cpu(cpu)
+ for_each_possible_cpu(cpu)
per_cpu(tdx_lp_initialized, cpu) = false;
return 0;
}
diff --git a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c b/arch/x86/virt/vmx/tdx/tdx_global_metadata.c
index d6a4fa8deb5e..1b6f9b80b197 100644
--- a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c
+++ b/arch/x86/virt/vmx/tdx/tdx_global_metadata.c
@@ -102,13 +102,15 @@ static int get_tdx_sys_info_td_conf(struct tdx_sys_info_td_conf *sysinfo_td_conf
static int get_tdx_sys_info_handoff(struct tdx_sys_info_handoff *sysinfo_handoff)
{
- int ret = 0;
+ int ret;
u64 val;
- if (!ret && !(ret = read_sys_metadata_field(0x8900000100000000, &val)))
- sysinfo_handoff->module_hv = val;
+ ret = read_sys_metadata_field(0x8900000100000000, &val);
+ if (ret)
+ return ret;
- return ret;
+ sysinfo_handoff->module_hv = val;
+ return 0;
}
static int get_tdx_sys_info(struct tdx_sys_info *sysinfo)
diff --git a/drivers/virt/coco/tdx-host/tdx-host.c b/drivers/virt/coco/tdx-host/tdx-host.c
index 8cf3cc99024a..f236119c2748 100644
--- a/drivers/virt/coco/tdx-host/tdx-host.c
+++ b/drivers/virt/coco/tdx-host/tdx-host.c
@@ -21,6 +21,12 @@ static const struct x86_cpu_id tdx_host_ids[] = {
};
MODULE_DEVICE_TABLE(x86cpu, tdx_host_ids);
+/*
+ * TDX module and P-SEAMLDR version convention: "major.minor.update"
+ * (e.g., "1.5.08") with zero-padded two-digit update field.
+ */
+#define TDX_VERSION_FMT "%u.%u.%02u"
+
static ssize_t version_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
@@ -32,9 +38,9 @@ static ssize_t version_show(struct device *dev, struct device_attribute *attr,
ver = &tdx_sysinfo->version;
- return sysfs_emit(buf, "%u.%u.%02u\n", ver->major_version,
- ver->minor_version,
- ver->update_version);
+ return sysfs_emit(buf, TDX_VERSION_FMT"\n", ver->major_version,
+ ver->minor_version,
+ ver->update_version);
}
static DEVICE_ATTR_RO(version);
@@ -42,7 +48,10 @@ static struct attribute *tdx_host_attrs[] = {
&dev_attr_version.attr,
NULL,
};
-ATTRIBUTE_GROUPS(tdx_host);
+
+static const struct attribute_group tdx_host_group = {
+ .attrs = tdx_host_attrs,
+};
static ssize_t seamldr_version_show(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -54,9 +63,9 @@ static ssize_t seamldr_version_show(struct device *dev, struct device_attribute
if (ret)
return ret;
- return sysfs_emit(buf, "%u.%u.%02u\n", info.major_version,
- info.minor_version,
- info.update_version);
+ return sysfs_emit(buf, TDX_VERSION_FMT"\n", info.major_version,
+ info.minor_version,
+ info.update_version);
}
static ssize_t num_remaining_updates_show(struct device *dev,
@@ -90,9 +99,41 @@ static struct attribute *seamldr_attrs[] = {
NULL,
};
+static bool can_expose_seamldr(void)
+{
+ const struct tdx_sys_info *sysinfo = tdx_get_sysinfo();
+
+ if (!sysinfo)
+ return false;
+
+ /*
+ * Calling P-SEAMLDR on CPUs with the seamret_invd_vmcs bug clears
+ * the current VMCS, which breaks KVM. Verify the erratum is not
+ * present before exposing P-SEAMLDR features.
+ */
+ if (boot_cpu_has_bug(X86_BUG_SEAMRET_INVD_VMCS))
+ return false;
+
+ return tdx_supports_runtime_update(sysinfo);
+}
+
+static bool seamldr_group_visible(struct kobject *kobj)
+{
+ return can_expose_seamldr();
+}
+
+DEFINE_SIMPLE_SYSFS_GROUP_VISIBLE(seamldr);
+
static const struct attribute_group seamldr_group = {
.name = "seamldr",
.attrs = seamldr_attrs,
+ .is_visible = SYSFS_GROUP_VISIBLE(seamldr),
+};
+
+static const struct attribute_group *tdx_host_groups[] = {
+ &tdx_host_group,
+ &seamldr_group,
+ NULL,
};
static enum fw_upload_err tdx_fw_prepare(struct fw_upload *fwl,
@@ -122,8 +163,6 @@ static enum fw_upload_err tdx_fw_write(struct fw_upload *fwl, const u8 *data,
return FW_UPLOAD_ERR_BUSY;
case -EIO:
return FW_UPLOAD_ERR_HW_ERROR;
- case -ENOSPC:
- return FW_UPLOAD_ERR_WEAROUT;
case -ENOMEM:
return FW_UPLOAD_ERR_RW_ERROR;
default:
@@ -164,22 +203,9 @@ static void seamldr_deinit(void *tdx_fwl)
static int seamldr_init(struct device *dev)
{
- const struct tdx_sys_info *tdx_sysinfo = tdx_get_sysinfo();
struct fw_upload *tdx_fwl;
- int ret;
-
- if (WARN_ON_ONCE(!tdx_sysinfo))
- return -EIO;
- if (!tdx_supports_runtime_update(tdx_sysinfo))
- return 0;
-
- /*
- * Calling P-SEAMLDR on CPUs with the seamret_invd_vmcs bug clears
- * the current VMCS, which breaks KVM. Verify the erratum is not
- * present before exposing P-SEAMLDR features.
- */
- if (boot_cpu_has_bug(X86_BUG_SEAMRET_INVD_VMCS))
+ if (!can_expose_seamldr())
return 0;
tdx_fwl = firmware_upload_register(THIS_MODULE, dev, "tdx_module",
@@ -187,11 +213,7 @@ static int seamldr_init(struct device *dev)
if (IS_ERR(tdx_fwl))
return PTR_ERR(tdx_fwl);
- ret = devm_add_action_or_reset(dev, seamldr_deinit, tdx_fwl);
- if (ret)
- return ret;
-
- return devm_device_add_group(dev, &seamldr_group);
+ return devm_add_action_or_reset(dev, seamldr_deinit, tdx_fwl);
}
static int tdx_host_probe(struct faux_device *fdev)
^ permalink raw reply related
* Re: [PATCH] checkpatch: allow correctly handle full files on stdin
From: Joe Perches @ 2026-03-26 8:46 UTC (permalink / raw)
To: Dmitry Torokhov, Dwaipayan Ray, Lukas Bulwahn, Andy Whitcroft
Cc: Jonathan Corbet, Shuah Khan, workflows, linux-doc, linux-kernel
In-Reply-To: <acTPXMJfkHLeItrK@google.com>
On Wed, 2026-03-25 at 23:20 -0700, Dmitry Torokhov wrote:
> checkpatch does not handle full files well when they are passed on
> stdin, because it does not know how to treat the text, and whether it is
> a C file, or a DTS file, or something else, and so it assumes that when
> it works with stdin it should be a unified diff. For full files it
> expects to have a file name as an argument and read the contents from
> disk. Unfortunately this does not well when trying to use checkpatch as
> an online linter and feed it contents of an editor buffer that have not
> made it to the disk yet.
Why is this useful?
Why not save the buffer and then feed the file?
^ permalink raw reply
* [PATCH v6 21/22] x86/virt/tdx: Document TDX module update
From: Chao Gao @ 2026-03-26 8:44 UTC (permalink / raw)
To: linux-kernel, linux-doc, linux-coco, kvm
Cc: binbin.wu, dan.j.williams, dave.hansen, ira.weiny, kai.huang, kas,
nik.borisov, paulmck, pbonzini, reinette.chatre, rick.p.edgecombe,
sagis, seanjc, tony.lindgren, vannapurve, vishal.l.verma,
yilun.xu, xiaoyao.li, yan.y.zhao, Chao Gao, Thomas Gleixner,
Ingo Molnar, Borislav Petkov, x86, H. Peter Anvin,
Jonathan Corbet, Shuah Khan
In-Reply-To: <20260326084448.29947-1-chao.gao@intel.com>
Document TDX module update as a subsection of "TDX Host Kernel Support" to
provide background information and cover key points that developers and
users may need to know, for example:
- update is done in stop_machine() context
- update instructions and results
- update policy and tooling
Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Kai Huang <kai.huang@intel.com>
Reviewed-by: Kiryl Shutsemau (Meta) <kas@kernel.org>
---
v5:
- use "update" when refer to the update feature/concept [Kai]
---
Documentation/arch/x86/tdx.rst | 36 ++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/Documentation/arch/x86/tdx.rst b/Documentation/arch/x86/tdx.rst
index 61670e7df2f7..d4e257542d4c 100644
--- a/Documentation/arch/x86/tdx.rst
+++ b/Documentation/arch/x86/tdx.rst
@@ -99,6 +99,42 @@ initialize::
[..] virt/tdx: module initialization failed ...
+TDX module Runtime Update
+-------------------------
+
+The TDX architecture includes a persistent SEAM loader (P-SEAMLDR) that
+runs in SEAM mode separately from the TDX module. The kernel can
+communicate with P-SEAMLDR to perform runtime updates of the TDX module.
+
+During update, the TDX module becomes unresponsive to other TDX operations.
+To prevent components using TDX (such as KVM) from experiencing unexpected
+errors during updates, updates are performed in stop_machine() context.
+
+TDX module update has complex compatibility requirements; the new module
+must be compatible with the current CPU, P-SEAMLDR, and running TDX module.
+Rather than implementing complex module selection and policy enforcement
+logic in the kernel, userspace is responsible for auditing and selecting
+appropriate updates.
+
+Updates use the standard firmware upload interface. See
+Documentation/driver-api/firmware/fw_upload.rst for detailed instructions
+
+Successful updates are logged in dmesg:
+ [..] virt/tdx: version 1.5.20 -> 1.5.24
+
+If updates failed, running TDs may be killed and further TDX operations may
+be not possible until reboot. For detailed error information, see
+Documentation/ABI/testing/sysfs-devices-faux-tdx-host.
+
+Given the risk of losing existing TDs, userspace should verify that the
+update is compatible with the current system and properly validated before
+applying it.
+
+A reference userspace tool that implements necessary checks is available
+at:
+
+ https://github.com/intel/tdx-module-binaries
+
TDX Interaction to Other Kernel Components
------------------------------------------
--
2.47.3
^ permalink raw reply related
* [PATCH v6 00/22] Runtime TDX module update support
From: Chao Gao @ 2026-03-26 8:43 UTC (permalink / raw)
To: kvm, linux-coco, linux-doc, linux-kernel, linux-rt-devel, x86
Cc: binbin.wu, dan.j.williams, dave.hansen, ira.weiny, kai.huang, kas,
nik.borisov, paulmck, pbonzini, reinette.chatre, rick.p.edgecombe,
sagis, seanjc, tony.lindgren, vannapurve, vishal.l.verma,
yilun.xu, xiaoyao.li, yan.y.zhao, Chao Gao, Borislav Petkov,
Clark Williams, H. Peter Anvin, Ingo Molnar, Jonathan Corbet,
Sebastian Andrzej Siewior, Shuah Khan, Steven Rostedt,
Thomas Gleixner
Hi Reviewers,
Please review patches 6 and 17; others already have 2+ RB tags.
Patch 6 was reworked to use is_visible() for attribute visibility (which is
the standard practice), so previous RB tags were dropped. Patch 17 has
fewer reviews so far and needs another look.
I believe this series is quite mature and also self-contained (no impact to
the rest of kernel unless an update is triggered through the dedicated
sysfs ABIs). I'm hoping it can be merged for 7.1.
Changelog:
v5->v6:
- use TDX_VERSION_FMT macro [Dave/Kiryl]
- use is_visible() to control seamldr attribute visibility [Yilun]
- drop revision/chapter numbers when referring to a spec [Kiryl/Xiaoyao]
- change update failure indicator from int to boolean [Kiryl]
- reset tdx_lp_initialized for offlined CPUs [Kai]
- add a wrapper for seamldr_call(P_SEAMLDR_INSTALL..) [Kiryl]
- clarify the "do nothing" choice when collision detection isn't
supported [Kai/Kiryl]
- other minor code changes, changelog improvements and typo fixes [Kiryl/Kai/Xiaoyao]
- collect review tags from Kiryl/Kai
- v5: https://lore.kernel.org/kvm/20260315135920.354657-1-chao.gao@intel.com/
(For transparency, note that I used AI tools to help proofread this
cover-letter and commit messages)
This series adds support for runtime TDX module updates that preserve
running TDX guests. It is also available at:
https://github.com/gaochaointel/linux-dev/commits/tdx-module-updates-v6/
== Background ==
Intel TDX isolates Trusted Domains (TDs), or confidential guests, from the
host. A key component of Intel TDX is the TDX module, which enforces
security policies to protect the memory and CPU states of TDs from the
host. However, the TDX module is software that requires updates.
== Problems ==
Currently, the TDX module is loaded by the BIOS at boot time, and the only
way to update it is through a reboot, which results in significant system
downtime. Users expect the TDX module to be updatable at runtime without
disrupting TDX guests.
== Solution ==
On TDX platforms, P-SEAMLDR[1] is a component within the protected SEAM
range. It is loaded by the BIOS and provides the host with functions to
install a TDX module at runtime.
Implement a TDX module update facility via the fw_upload mechanism. Given
that there is variability in which module update to load based on features,
fix levels, and potentially reloading the same version for error recovery
scenarios, the explicit userspace chosen payload flexibility of fw_upload
is attractive.
This design allows the kernel to accept a bitstream instead of loading a
named file from the filesystem, as the module selection and policy
enforcement for TDX modules are quite complex (see patch "coco/tdx-host:
Implement firmware upload sysfs ABI for TDX module updates"). By doing
so, much of this complexity is shifted out of the kernel. The kernel
needs to expose information, such as the TDX module version, to
userspace. Userspace must understand the TDX module versioning scheme
and update policy to select the appropriate TDX module (see "TDX module
Versioning" below).
In the unlikely event the update fails, for example userspace picks an
incompatible update image, or the image is otherwise corrupted, all TDs
will experience SEAMCALL failures and be killed. The recovery of TD
operation from that event requires a reboot.
Given there is no mechanism to quiesce SEAMCALLs, the TDs themselves must
pause execution over an update. The most straightforward way to meet the
'pause TDs while update executes' constraint is to run the update in
stop_machine() context. All other evaluated solutions export more
complexity to KVM, or exports more fragility to userspace.
== How to test this series ==
First, load kvm-intel.ko and tdx-host.ko if they haven't been loaded:
# modprobe -r kvm_intel
# modprobe kvm_intel tdx=1
# modprobe tdx-host
Then, use the userspace tool below to select the appropriate TDX module and
install it via the interfaces exposed by this series:
# git clone https://github.com/intel/tdx-module-binaries
# cd tdx-module-binaries
# python version_select_and_load.py --update
this version changes the firmware directory name from seamldr_upload to
tdx_module, so, below change should be applied to version_select_and_load.py:
diff --git a/version_select_and_load.py b/version_select_and_load.py
index 2193bd8..6a3b604 100644
--- a/version_select_and_load.py
+++ b/version_select_and_load.py
@@ -38,7 +38,7 @@ except ImportError:
print("Error: cpuid module is not installed. Please install it using 'pip install cpuid'")
sys.exit(1)
-FIRMWARE_PATH = "/sys/class/firmware/seamldr_upload"
+FIRMWARE_PATH = "/sys/class/firmware/tdx_module"
MODULE_PATH = "/sys/devices/faux/tdx_host"
SEAMLDR_PATH = "/sys/devices/faux/tdx_host/seamldr"
allow_debug = False
== Other information relevant to Runtime TDX module updates ==
=== TDX module versioning ===
Each TDX module is assigned a version number x.y.z, where x represents the
"major" version, y the "minor" version, and z the "update" version.
Runtime TDX module updates are restricted to Z-stream releases.
Note that Z-stream releases do not necessarily guarantee compatibility. A
new release may not be compatible with all previous versions. To address this,
Intel provides a separate file containing compatibility information, which
specifies the minimum module version required for a particular update. This
information is referenced by the tool to determine if two modules are
compatible.
=== TCB Stability ===
Updates change the TCB as viewed by attestation reports. In TDX there is
a distinction between launch-time version and current version where
runtime TDX module updates cause that latter version number to change,
subject to Z-stream constraints.
The concern that a malicious host may attack confidential VMs by loading
insecure updates was addressed by Alex in [3]. Similarly, the scenario
where some "theoretical paranoid tenant" in the cloud wants to audit
updates and stop trusting the host after updates until audit completion
was also addressed in [4]. Users not in the cloud control the host machine
and can manage updates themselves, so they don't have these concerns.
See more about the implications of current TCB version changes in
attestation as summarized by Dave in [5].
=== TDX module Distribution Model ===
At a high level, Intel publishes all TDX modules on the github [2], along
with a mapping_file.json which documents the compatibility information
about each TDX module and a userspace tool to install the TDX module. OS
vendors can package these modules and distribute them. Administrators
install the package and use the tool to select the appropriate TDX module
and install it via the interfaces exposed by this series.
[1]: https://cdrdv2.intel.com/v1/dl/getContent/733584
[2]: https://github.com/intel/tdx-module-binaries
[3]: https://lore.kernel.org/all/665c5ae0-4b7c-4852-8995-255adf7b3a2f@amazon.com/
[4]: https://lore.kernel.org/all/5d1da767-491b-4077-b472-2cc3d73246d6@amazon.com/
[5]: https://lore.kernel.org/all/94d6047e-3b7c-4bc1-819c-85c16ff85abf@intel.com/
Chao Gao (21):
coco/tdx-host: Introduce a "tdx_host" device
coco/tdx-host: Expose TDX module version
x86/virt/seamldr: Introduce a wrapper for P-SEAMLDR SEAMCALLs
x86/virt/seamldr: Add a helper to retrieve P-SEAMLDR information
coco/tdx-host: Expose P-SEAMLDR information via sysfs
coco/tdx-host: Implement firmware upload sysfs ABI for TDX module
updates
x86/virt/seamldr: Allocate and populate a module update request
x86/virt/seamldr: Introduce skeleton for TDX module updates
x86/virt/seamldr: Abort updates if errors occurred midway
x86/virt/seamldr: Shut down the current TDX module
x86/virt/tdx: Reset software states during TDX module shutdown
x86/virt/seamldr: Install a new TDX module
x86/virt/seamldr: Do TDX per-CPU initialization after updates
x86/virt/tdx: Restore TDX module state
x86/virt/tdx: Update tdx_sysinfo and check features post-update
x86/virt/tdx: Avoid updates during update-sensitive operations
coco/tdx-host: Don't expose P-SEAMLDR features on CPUs with erratum
x86/virt/tdx: Enable TDX module runtime updates
coco/tdx-host: Document TDX module update compatibility criteria
x86/virt/tdx: Document TDX module update
x86/virt/seamldr: Log TDX module update failures
Kai Huang (1):
x86/virt/tdx: Move low level SEAMCALL helpers out of <asm/tdx.h>
.../ABI/testing/sysfs-devices-faux-tdx-host | 75 ++++
Documentation/arch/x86/tdx.rst | 36 ++
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/asm/seamldr.h | 37 ++
arch/x86/include/asm/tdx.h | 64 +---
arch/x86/include/asm/tdx_global_metadata.h | 5 +
arch/x86/include/asm/vmx.h | 1 +
arch/x86/kvm/vmx/tdx_errno.h | 2 -
arch/x86/virt/vmx/tdx/Makefile | 2 +-
arch/x86/virt/vmx/tdx/seamcall_internal.h | 109 ++++++
arch/x86/virt/vmx/tdx/seamldr.c | 335 ++++++++++++++++++
arch/x86/virt/vmx/tdx/tdx.c | 166 ++++++---
arch/x86/virt/vmx/tdx/tdx.h | 11 +-
arch/x86/virt/vmx/tdx/tdx_global_metadata.c | 20 ++
drivers/virt/coco/Kconfig | 2 +
drivers/virt/coco/Makefile | 1 +
drivers/virt/coco/tdx-host/Kconfig | 12 +
drivers/virt/coco/tdx-host/Makefile | 1 +
drivers/virt/coco/tdx-host/tdx-host.c | 250 +++++++++++++
19 files changed, 1027 insertions(+), 103 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-devices-faux-tdx-host
create mode 100644 arch/x86/include/asm/seamldr.h
create mode 100644 arch/x86/virt/vmx/tdx/seamcall_internal.h
create mode 100644 arch/x86/virt/vmx/tdx/seamldr.c
create mode 100644 drivers/virt/coco/tdx-host/Kconfig
create mode 100644 drivers/virt/coco/tdx-host/Makefile
create mode 100644 drivers/virt/coco/tdx-host/tdx-host.c
base-commit: 0f409eaea53e49932cf92a761de66345c9a4b4be
--
2.47.3
^ permalink raw reply related
* Re: [PATCH v8 02/10] x86/bhi: Make clear_bhb_loop() effective on newer CPUs
From: Pawan Gupta @ 2026-03-26 8:39 UTC (permalink / raw)
To: Borislav Petkov
Cc: x86, Jon Kohler, Nikolay Borisov, H. Peter Anvin, Josh Poimboeuf,
David Kaplan, Sean Christopherson, Dave Hansen, Peter Zijlstra,
Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko, KP Singh,
Jiri Olsa, David S. Miller, David Laight, Andy Lutomirski,
Thomas Gleixner, Ingo Molnar, David Ahern, Martin KaFai Lau,
Eduard Zingerman, Song Liu, Yonghong Song, John Fastabend,
Stanislav Fomichev, Hao Luo, Paolo Bonzini, Jonathan Corbet,
linux-kernel, kvm, Asit Mallick, Tao Zhang, bpf, netdev,
linux-doc
In-Reply-To: <20260325203759.GCacRHp2t8a7c4Bp6E@fat_crate.local>
On Wed, Mar 25, 2026 at 09:37:59PM +0100, Borislav Petkov wrote:
> On Tue, Mar 24, 2026 at 03:13:08PM -0700, Pawan Gupta wrote:
> > This is cleaner. A few things to consider are, CLEAR_BRANCH_HISTORY that
> > calls clear_bhb_loop() would be calling into C code very early during the
> > kernel entry. The code generated here may vary based on the compiler. Any
> > indirect branch here would be security risk. This needs to be noinstr so
> > that it can't be hijacked by probes and ftraces.
> >
> > At kernel entry, calling into C before mitigations are applied is risky.
>
> You can write the above function in asm if you prefer - should still be
> easier.
I believe the equivalent for cpu_feature_enabled() in asm is the
ALTERNATIVE. Please let me know if I am missing something.
Regarding your intent to move the loop count selection out of the BHB
sequence, below is what I could come up. It is not as pretty as the C
version, but it is trying to achieve something similar:
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index ecae3cef9d8c..54c65b0a3f65 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1494,6 +1494,20 @@ SYM_CODE_START_NOALIGN(rewind_stack_and_make_dead)
SYM_CODE_END(rewind_stack_and_make_dead)
.popsection
+/*
+ * Between the long and short version of BHB clear sequence, just the
+ * loop count differs based on BHI_CTRL, see Intel's BHI guidance.
+ */
+#define BHB_SHORT_LOOP_OUTER 5
+#define BHB_SHORT_LOOP_INNER 5
+
+#define BHB_LONG_LOOP_OUTER 12
+#define BHB_LONG_LOOP_INNER 7
+
+#define BHB_MOVB(type, reg) \
+ ALTERNATIVE __stringify(movb $BHB_SHORT_LOOP_##type, reg), \
+ __stringify(movb $BHB_LONG_LOOP_##type, reg), X86_FEATURE_BHI_CTRL
+
/*
* This sequence executes branches in order to remove user branch information
* from the branch history tracker in the Branch Predictor, therefore removing
@@ -1540,12 +1554,7 @@ SYM_FUNC_START(clear_bhb_loop_nofence)
/* BPF caller may require all registers to be preserved */
push %rax
- /*
- * Between the long and short version of BHB clear sequence, just the
- * loop count differs based on BHI_CTRL, see Intel's BHI guidance.
- */
- ALTERNATIVE "movb $5, %al", \
- "movb $12, %al", X86_FEATURE_BHI_CTRL
+ BHB_MOVB(OUTER, %al)
ANNOTATE_INTRA_FUNCTION_CALL
call 1f
@@ -1567,8 +1576,7 @@ SYM_FUNC_START(clear_bhb_loop_nofence)
* but some Clang versions (e.g. 18) don't like this.
*/
.skip 32 - 14, 0xcc
-2: ALTERNATIVE "movb $5, %ah", \
- "movb $7, %ah", X86_FEATURE_BHI_CTRL
+2: BHB_MOVB(INNER, %ah)
3: jmp 4f
nop
4: sub $1, %ah
Below is how the disassembly looks like:
clear_bhb_loop_nofence:
...
call 1f
jmp 5f
// BHB_MOVB(OUTER, %al)
mov $0x5,%al
^ permalink raw reply related
* [PATCH] docs: kernel-parameters: fix architecture alignment for pt, nopt, and nobypass
From: lirongqing @ 2026-03-26 7:46 UTC (permalink / raw)
To: Jonathan Corbet, Shuah Khan, Andrew Morton, Borislav Petkov,
Randy Dunlap, Peter Zijlstra, Feng Tang, Pawan Gupta, Dapeng Mi,
Kees Cook, Marco Elver, Li RongQing, Paul E . McKenney,
Askar Safin, Bjorn Helgaas, Sohil Mehta, linux-doc, linux-kernel
From: Li RongQing <lirongqing@baidu.com>
Commit ab0e7f20768a ("Documentation: Merge x86-specific boot options doc
into kernel-parameters.txt") introduced a formatting regression where
architecture tags were placed on separate lines with broken indentation.
This caused the 'nopt' [X86] parameter to appear as if it belonged to
the [PPC/POWERNV] section.
Fix the formatting by placing the architecture tags on the same line as
their respective parameters ('pt', 'nopt', and 'nobypass') and restoring
proper indentation.
Fixes: ab0e7f20768a ("Documentation: Merge x86-specific boot options doc into kernel-parameters.txt")
Signed-off-by: Li RongQing <lirongqing@baidu.com>
---
Documentation/admin-guide/kernel-parameters.txt | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 03a5506..dc1c5bd 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2615,12 +2615,9 @@ Kernel parameters
Intel machines). This can be used to prevent the usage
of an available hardware IOMMU.
- [X86]
- pt
- [X86]
- nopt
- [PPC/POWERNV]
- nobypass
+ pt [X86]
+ nopt [X86]
+ nobypass [PPC/POWERNV]
Disable IOMMU bypass, using IOMMU for PCI devices.
[X86]
--
2.9.4
^ permalink raw reply related
* RE: [PATCH v2 0/9] accel: New driver for NXP's Neutron NPU
From: Ioana Ciocoi Radulescu @ 2026-03-26 7:18 UTC (permalink / raw)
To: Tomeu Vizoso
Cc: Oded Gabbay, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Sumit Semwal, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Frank Li,
Christian König, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org,
linaro-mm-sig@lists.linaro.org, Jiwei Fu, Forrest Shi,
Alexandru Iulian Taran, Daniel Baluta
In-Reply-To: <CAPsqS2QXcgbi9_e4QmCn1Cgkr-bOVsY-E9qpZsFw3WYWWLugEw@mail.gmail.com>
On Tuesday, March 24, 2026 at 6:40 PM, Tomeu Vizoso wrote:
> > >
> > > Hi Ioana,
> > >
> > > Looks like the userspace portion of the driver is closed source
> > > (libNeutronDriver.so)?
> > >
> > > https://github.com/nxp-imx/tflite-neutron-delegate/blob/lf-6.12.49_2.2.0/CMakeLists.txt
> > Hi Tomeu,
> >
> > Yes, it's closed for now. We do plan to publish the source code
> > on github, but I believe that's still a few months away.
> I think you may want to sync with your userspace team sooner rather than
> later, so you can comply with this requirement:
>
> https://docs.kernel.org/gpu/drm-uapi.html#open-source-userspace-requirements
Thanks for bringing this up, it helps us raise internally the priority for
the userspace side. In the meantime, I still hope to gather additional
feedback on the kernel driver.
> It could be good to also share firmware code with other firmware-mediated
> NPU drivers if possible, or at least the part of the rpmsg protocol that
> makes sense to share.
>
> You can see my submission for the Thames driver for a link to the firmware
> code.
>
> I would be happy to help consolidate code between this category of drivers
> if you want.
Thanks for the offer. We are considering our options, I'll get back once we
reach an internal decision.
Regards,
Ioana
^ permalink raw reply
* Re: [PATCH v5 3/3] PCI: dw-rockchip: Add pcie_ltssm_state_transition trace support
From: Anand Moon @ 2026-03-26 7:13 UTC (permalink / raw)
To: Shawn Lin
Cc: Manivannan Sadhasivam, Bjorn Helgaas, linux-rockchip, linux-pci,
linux-trace-kernel, linux-doc, Steven Rostedt
In-Reply-To: <1774403912-210670-4-git-send-email-shawn.lin@rock-chips.com>
Hi Shawn,
On Wed, 25 Mar 2026 at 07:29, Shawn Lin <shawn.lin@rock-chips.com> wrote:
>
> Rockchip platforms provide a 64x4 bytes debug FIFO to trace the
> LTSSM history. Any LTSSM change will be recorded. It's useful
> for debug purpose, for example link failure, etc.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
Tested-by: Anand Moon <linux.amoon@gmail.com>
Thanks
-Anand
^ permalink raw reply
* Re: [PATCH v5 1/3] PCI: trace: Add PCI controller LTSSM transition tracepoint
From: Anand Moon @ 2026-03-26 7:13 UTC (permalink / raw)
To: Shawn Lin
Cc: Manivannan Sadhasivam, Bjorn Helgaas, linux-rockchip, linux-pci,
linux-trace-kernel, linux-doc, Steven Rostedt
In-Reply-To: <1774403912-210670-2-git-send-email-shawn.lin@rock-chips.com>
Hi Shawn,
On Wed, 25 Mar 2026 at 07:28, Shawn Lin <shawn.lin@rock-chips.com> wrote:
>
> Some platforms may provide LTSSM trace functionality, recording historical
> LTSSM state transition information. This is very useful for debugging, such
> as when certain devices cannot be recognized or link broken during test.
> Implement the pci controller tracepoint for recording LTSSM and rate.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
Tested-by: Anand Moon <linux.amoon@gmail.com>
Thanks
-Anand
^ permalink raw reply
* [PATCH net-next V9 14/14] net/mlx5: Document devlink rates
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
It seems rates were not documented in the mlx5-specific file, so add
examples on how to limit VFs and groups and also provide an example of
the intended way to achieve cross-esw scheduling.
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
Documentation/networking/devlink/mlx5.rst | 33 +++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst
index 4bba4d780a4a..62c4d7bf0877 100644
--- a/Documentation/networking/devlink/mlx5.rst
+++ b/Documentation/networking/devlink/mlx5.rst
@@ -419,3 +419,36 @@ User commands examples:
.. note::
This command can run over all interfaces such as PF/VF and representor ports.
+
+Rates
+=====
+
+mlx5 devices can limit transmission of individual VFs or a group of them via
+the devlink-rate API in switchdev mode.
+
+User commands examples:
+
+- Print the existing rates::
+
+ $ devlink port function rate show
+
+- Set a max tx limit on traffic from VF0::
+
+ $ devlink port function rate set pci/0000:82:00.0/1 tx_max 10Gbit
+
+- Create a rate group with a max tx limit and adding two VFs to it::
+
+ $ devlink port function rate add pci/0000:82:00.0/group1 tx_max 10Gbit
+ $ devlink port function rate set pci/0000:82:00.0/1 parent group1
+ $ devlink port function rate set pci/0000:82:00.0/2 parent group1
+
+- Same scenario, with a min guarantee of 20% of the bandwidth for the first VFs::
+
+ $ devlink port function rate add pci/0000:82:00.0/group1 tx_max 10Gbit
+ $ devlink port function rate set pci/0000:82:00.0/1 parent group1 tx_share 2Gbit
+ $ devlink port function rate set pci/0000:82:00.0/2 parent group1
+
+- Cross-device scheduling::
+
+ $ devlink port function rate add pci/0000:82:00.0/group1 tx_max 10Gbit
+ $ devlink port function rate set pci/0000:82:00.1/32769 parent pci/0000:82:00.0/group1
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 13/14] selftests: drv-net: Add test for cross-esw rate scheduling
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Adds a Python selftest using the YNL devlink API to verify the devlink
rate ops. The test requires a bond device given in the config as NETIF
containing two PFs. Test setup will then create 1 VF on each PF and
verify the various rate commands.
./devlink_rate_cross_esw.py
TAP version 13
1..3
ok 1 devlink_rate_cross_esw.test_same_esw_parent
ok 2 devlink_rate_cross_esw.test_cross_esw_parent
ok 3 devlink_rate_cross_esw.test_tx_rates_on_cross_esw
Tests will be skipped when the preconditions aren't met, when the
devlink API is too old or when the devices don't appear to support
cross-esw scheduling (detected via EOPNOTSUPP).
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../testing/selftests/drivers/net/hw/Makefile | 1 +
.../drivers/net/hw/devlink_rate_cross_esw.py | 300 ++++++++++++++++++
2 files changed, 301 insertions(+)
create mode 100755 tools/testing/selftests/drivers/net/hw/devlink_rate_cross_esw.py
diff --git a/tools/testing/selftests/drivers/net/hw/Makefile b/tools/testing/selftests/drivers/net/hw/Makefile
index 3c97dac9baaa..361fbb9fd44b 100644
--- a/tools/testing/selftests/drivers/net/hw/Makefile
+++ b/tools/testing/selftests/drivers/net/hw/Makefile
@@ -20,6 +20,7 @@ TEST_GEN_FILES := \
TEST_PROGS = \
csum.py \
devlink_port_split.py \
+ devlink_rate_cross_esw.py \
devlink_rate_tc_bw.py \
devmem.py \
ethtool.sh \
diff --git a/tools/testing/selftests/drivers/net/hw/devlink_rate_cross_esw.py b/tools/testing/selftests/drivers/net/hw/devlink_rate_cross_esw.py
new file mode 100755
index 000000000000..0f3b4516c3b7
--- /dev/null
+++ b/tools/testing/selftests/drivers/net/hw/devlink_rate_cross_esw.py
@@ -0,0 +1,300 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-2.0
+
+"""
+Devlink Rate Cross-eswitch Scheduling Test Suite
+==================================================
+
+Control-plane tests for cross-eswitch TX scheduling via devlink-rate.
+Validates that VFs from different PFs on the same chip can share
+rate groups using the cross-device parent-dev attribute.
+
+Preconditions:
+- NETIF points to a bond device with exactly two interfaces.
+- the interfaces must be two PFs from different devices sharing the same chip.
+- (for mlx5): the two interfaces are in switchdev mode and configured in a LAG:
+ - devlink dev eswitch set $DEV1 mode switchdev
+ - devlink dev eswitch set $DEV2 mode switchdev
+ - devlink dev param set $DEV1 name esw_multiport value 1 cmode runtime
+ - devlink dev param set $DEV2 name esw_multiport value 1 cmode runtime
+- test cases will be skipped if:
+ - the number of interfaces in the bond device is != 2.
+ - the kernel doesn't support devlink rates.
+ - the devlink API doesn't support cross-device parents (ENODEV).
+ - cross-esw rate scheduling returns EOPNOTSUPP.
+"""
+
+import errno
+import glob
+import os
+import time
+
+from lib.py import ksft_pr, ksft_eq, ksft_run, ksft_exit
+from lib.py import KsftSkipEx, KsftFailEx
+from lib.py import NetDrvEnv, DevlinkFamily
+from lib.py import NlError
+from lib.py import cmd, defer, ip, tool
+
+
+# --- Discovery and setup ---
+
+
+def get_bond_slaves(bond_ifname):
+ """Returns sorted list of slave netdev names for a bond."""
+ pattern = f"/sys/class/net/{bond_ifname}/lower_*"
+ lowers = glob.glob(pattern)
+ if not lowers:
+ raise KsftSkipEx(f"No bond slaves for {bond_ifname}")
+ slaves = []
+ for path in sorted(lowers):
+ name = os.path.basename(path)
+ if name.startswith("lower_"):
+ name = name[len("lower_"):]
+ slaves.append(name)
+ return slaves
+
+
+def discover_pfs(cfg):
+ """Discovers both PFs from bond slaves."""
+ slaves = get_bond_slaves(cfg.ifname)
+ if len(slaves) != 2:
+ raise KsftSkipEx(f"Need 2 bond slaves, found {len(slaves)}")
+
+ pf0, pf1 = slaves[0], slaves[1]
+ ksft_pr(f"PF0: {pf0} PF1: {pf1}")
+ return pf0, pf1
+
+
+def get_pci_addr(ifname):
+ """Resolves PCI address for a network interface."""
+ return os.path.basename(os.path.realpath(f"/sys/class/net/{ifname}/device"))
+
+
+def get_vf_port_index(pf_pci):
+ """Finds devlink port-index for vf0 under pf_pci."""
+ ports = tool("devlink", "port show", json=True)["port"]
+ for port_name, props in ports.items():
+ if port_name.startswith(f"pci/{pf_pci}/") and props.get("vfnum") == 0:
+ return int(port_name.split("/")[-1])
+ raise KsftSkipEx(f"VF port not found for {pf_pci}")
+
+
+def cleanup_esw(pf):
+ """Removes VFs if created by tests."""
+ cmd(f"echo 0 > /sys/class/net/{pf}/device/sriov_numvfs", shell=True, fail=False)
+
+
+def setup_esw(pf):
+ """Creates 1 VF on 'pf'."""
+ path = f"/sys/class/net/{pf}/device/sriov_numvfs"
+ cmd(f"echo 0 > {path}", shell=True)
+ cmd(f"echo 1 > {path}", shell=True)
+ time.sleep(2)
+
+ vf_dir = f"/sys/class/net/{pf}/device/virtfn0/net"
+ entries = os.listdir(vf_dir) if os.path.isdir(vf_dir) else []
+ if not entries:
+ raise KsftSkipEx(f"VF not found for {pf}")
+ ip(f"link set dev {entries[0]} up")
+
+ pf_pci = get_pci_addr(pf)
+ vf_idx = get_vf_port_index(pf_pci)
+ ksft_pr(f"Created VF {vf_idx} on PF {pf} ({pf_pci})")
+ return pf_pci, vf_idx
+
+
+# --- Rate operation helpers ---
+
+
+def rate_new(devnl, dev_pci, node_name, **kwargs):
+ """Creates rate node."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "rate-node-name": node_name,
+ }
+ params.update(kwargs)
+ try:
+ devnl.rate_new(params)
+ except NlError as e:
+ if e.error == errno.EOPNOTSUPP:
+ raise KsftSkipEx("rate_new not supported") from e
+ raise KsftFailEx("rate_new failed") from e
+
+
+def rate_get(devnl, dev_pci, node_name):
+ """Gets rate node."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "rate-node-name": node_name,
+ }
+ return devnl.rate_get(params)
+
+
+def rate_get_leaf(devnl, dev_pci, port_index):
+ """Gets rate leaf (VF)."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "port-index": port_index,
+ }
+ return devnl.rate_get(params)
+
+
+def rate_del(devnl, dev_pci, node_name):
+ """Deletes rate node."""
+ devnl.rate_del({
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "rate-node-name": node_name,
+ })
+
+
+def rate_set_leaf(devnl, dev_pci, port_index, **kwargs):
+ """Sets rate attributes on a leaf (VF)."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "port-index": port_index,
+ }
+ params.update(kwargs)
+ try:
+ devnl.rate_set(params)
+ except NlError as e:
+ if e.error == errno.EOPNOTSUPP:
+ raise KsftSkipEx("rate_set not supported") from e
+ raise KsftFailEx("rate_set failed") from e
+
+
+def rate_set_leaf_parent(devnl, dev_pci, port_index,
+ parent_name, parent_dev_pci=None):
+ """Sets a leaf's parent, optionally cross-esw."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "port-index": port_index,
+ "rate-parent-node-name": parent_name,
+ }
+ if parent_dev_pci:
+ params["parent-dev"] = {
+ "bus-name": "pci",
+ "dev-name": parent_dev_pci,
+ }
+ try:
+ devnl.rate_set(params)
+ except NlError as e:
+ if e.error == errno.EOPNOTSUPP:
+ raise KsftSkipEx("rate_set not supported") from e
+ if parent_dev_pci and e.error == errno.ENODEV:
+ raise KsftSkipEx("Cross-esw scheduling not supported") from e
+ raise KsftFailEx("rate_set failed") from e
+
+
+def rate_clear_leaf_parent(devnl, dev_pci, port_index):
+ """Clears a leaf's parent."""
+ rate_set_leaf_parent(devnl, dev_pci, port_index, "")
+
+
+def rate_set_node(devnl, dev_pci, node_name, **kwargs):
+ """Sets rate attributes on a node."""
+ params = {
+ "bus-name": "pci",
+ "dev-name": dev_pci,
+ "rate-node-name": node_name,
+ }
+ params.update(kwargs)
+ devnl.rate_set(params)
+
+
+# --- Test cases ---
+
+
+def test_same_esw_parent(cfg):
+ """Assigns PF0's VF to PF0's group (same esw baseline)."""
+ pf0, _ = discover_pfs(cfg)
+ pf0_pci, vf0_idx = setup_esw(pf0)
+ defer(cleanup_esw, pf0)
+
+ rate_new(cfg.devnl, pf0_pci, "group0")
+ defer(rate_del, cfg.devnl, pf0_pci, "group0")
+ ksft_pr("rate-new succeeded")
+
+ rate_set_leaf_parent(cfg.devnl, pf0_pci, vf0_idx, "group0")
+ defer(rate_clear_leaf_parent, cfg.devnl, pf0_pci, vf0_idx)
+
+ ksft_pr("Same-esw parent assignment succeeded")
+
+
+def test_cross_esw_parent(cfg):
+ """Sets cross-esw parent, then clear it."""
+ pf0, pf1 = discover_pfs(cfg)
+ pf0_pci, _ = setup_esw(pf0)
+ defer(cleanup_esw, pf0)
+ pf1_pci, vf1_idx = setup_esw(pf1)
+ defer(cleanup_esw, pf1)
+
+ rate_new(cfg.devnl, pf0_pci, "group1")
+ defer(rate_del, cfg.devnl, pf0_pci, "group1")
+ ksft_pr("rate-new succeeded")
+
+ rate_set_leaf_parent(cfg.devnl, pf1_pci, vf1_idx,
+ "group1", parent_dev_pci=pf0_pci)
+ defer(rate_clear_leaf_parent, cfg.devnl, pf1_pci, vf1_idx)
+
+ ksft_pr("Cross-esw parent set and clear succeeded")
+
+
+def test_tx_rates_on_cross_esw(cfg):
+ """Sets tx_max on group and tx_share on leaves in a cross-esw setup."""
+ pf0, pf1 = discover_pfs(cfg)
+ pf0_pci, vf0_idx = setup_esw(pf0)
+ defer(cleanup_esw, pf0)
+ pf1_pci, vf1_idx = setup_esw(pf1)
+ defer(cleanup_esw, pf1)
+
+ rate_new(cfg.devnl, pf0_pci, "group2", **{"rate-tx-max": 10000000})
+ defer(rate_del, cfg.devnl, pf0_pci, "group2")
+ ksft_pr("rate-new succeeded")
+
+ rate_set_leaf_parent(cfg.devnl, pf1_pci, vf1_idx,
+ "group2", parent_dev_pci=pf0_pci)
+ defer(rate_clear_leaf_parent, cfg.devnl, pf1_pci, vf1_idx)
+ ksft_pr("set parent cross-esw succeeded")
+
+ rate_set_leaf_parent(cfg.devnl, pf0_pci, vf0_idx, "group2")
+ defer(rate_clear_leaf_parent, cfg.devnl, pf0_pci, vf0_idx)
+ ksft_pr("set parent same esw succeeded")
+
+ rate_set_leaf(cfg.devnl, pf0_pci, vf0_idx, **{"rate-tx-share": 1000000})
+ rate = rate_get_leaf(cfg.devnl, pf0_pci, vf0_idx)
+ ksft_eq(rate["rate-tx-share"], 1000000)
+ rate_set_leaf(cfg.devnl, pf1_pci, vf1_idx, **{"rate-tx-share": 2000000})
+ rate = rate_get_leaf(cfg.devnl, pf1_pci, vf1_idx)
+ ksft_eq(rate["rate-tx-share"], 2000000)
+ rate_set_node(cfg.devnl, pf0_pci, "group2", **{"rate-tx-max": 250000000})
+ rate = rate_get(cfg.devnl, pf0_pci, "group2")
+ ksft_eq(rate["rate-tx-max"], 250000000)
+
+ ksft_pr("tx_max and tx_share set on cross-esw group")
+
+
+def main() -> None:
+ """Main function."""
+
+ with NetDrvEnv(__file__, nsim_test=False) as cfg:
+ cfg.devnl = DevlinkFamily()
+
+ ksft_run(
+ cases=[
+ test_same_esw_parent,
+ test_cross_esw_parent,
+ test_tx_rates_on_cross_esw,
+ ],
+ args=(cfg,),
+ )
+ ksft_exit()
+
+
+if __name__ == "__main__":
+ main()
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 12/14] net/mlx5: qos: Support cross-device tx scheduling
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Up to now, rate groups could only contain vports from the same E-Switch.
This patch relaxes that restriction if the device supports it
(HCA_CAP.esw_cross_esw_sched == true) and the right conditions are met:
- Link Aggregation (LAG) is enabled.
- The E-Switches are from the same shared devlink device.
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../net/ethernet/mellanox/mlx5/core/esw/qos.c | 117 +++++++++++++-----
1 file changed, 83 insertions(+), 34 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index f67f99428959..a3d511367297 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -50,7 +50,9 @@ struct mlx5_esw_sched_node {
enum sched_node_type type;
/* The eswitch this node belongs to. */
struct mlx5_eswitch *esw;
- /* The children nodes of this node, empty list for leaf nodes. */
+ /* The children nodes of this node, empty list for leaf nodes.
+ * Can be from multiple E-Switches.
+ */
struct list_head children;
/* Valid only if this node is associated with a vport. */
struct mlx5_vport *vport;
@@ -393,6 +395,7 @@ esw_qos_vport_create_sched_element(struct mlx5_esw_sched_node *vport_node,
struct mlx5_esw_sched_node *parent = vport_node->parent;
u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};
struct mlx5_core_dev *dev = vport_node->esw->dev;
+ struct mlx5_vport *vport = vport_node->vport;
void *attr;
if (!mlx5_qos_element_type_supported(
@@ -404,10 +407,17 @@ esw_qos_vport_create_sched_element(struct mlx5_esw_sched_node *vport_node,
MLX5_SET(scheduling_context, sched_ctx, element_type,
SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
attr = MLX5_ADDR_OF(scheduling_context, sched_ctx, element_attributes);
- MLX5_SET(vport_element, attr, vport_number, vport_node->vport->vport);
+ MLX5_SET(vport_element, attr, vport_number, vport->vport);
MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent->ix);
MLX5_SET(scheduling_context, sched_ctx, max_average_bw,
vport_node->max_rate);
+ if (vport->dev != dev) {
+ /* The port is assigned to a node on another eswitch. */
+ MLX5_SET(vport_element, attr, eswitch_owner_vhca_id_valid,
+ true);
+ MLX5_SET(vport_element, attr, eswitch_owner_vhca_id,
+ MLX5_CAP_GEN(vport->dev, vhca_id));
+ }
return esw_qos_node_create_sched_element(vport_node, sched_ctx, extack);
}
@@ -419,6 +429,7 @@ esw_qos_vport_tc_create_sched_element(struct mlx5_esw_sched_node *vport_tc_node,
{
u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};
struct mlx5_core_dev *dev = vport_tc_node->esw->dev;
+ struct mlx5_vport *vport = vport_tc_node->vport;
void *attr;
if (!mlx5_qos_element_type_supported(
@@ -430,8 +441,7 @@ esw_qos_vport_tc_create_sched_element(struct mlx5_esw_sched_node *vport_tc_node,
MLX5_SET(scheduling_context, sched_ctx, element_type,
SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC);
attr = MLX5_ADDR_OF(scheduling_context, sched_ctx, element_attributes);
- MLX5_SET(vport_tc_element, attr, vport_number,
- vport_tc_node->vport->vport);
+ MLX5_SET(vport_tc_element, attr, vport_number, vport->vport);
MLX5_SET(vport_tc_element, attr, traffic_class, vport_tc_node->tc);
MLX5_SET(scheduling_context, sched_ctx, max_bw_obj_id,
rate_limit_elem_ix);
@@ -439,6 +449,13 @@ esw_qos_vport_tc_create_sched_element(struct mlx5_esw_sched_node *vport_tc_node,
vport_tc_node->parent->ix);
MLX5_SET(scheduling_context, sched_ctx, bw_share,
vport_tc_node->bw_share);
+ if (vport->dev != dev) {
+ /* The port is assigned to a node on another eswitch. */
+ MLX5_SET(vport_tc_element, attr, eswitch_owner_vhca_id_valid,
+ true);
+ MLX5_SET(vport_tc_element, attr, eswitch_owner_vhca_id,
+ MLX5_CAP_GEN(vport->dev, vhca_id));
+ }
return esw_qos_node_create_sched_element(vport_tc_node, sched_ctx,
extack);
@@ -1160,6 +1177,29 @@ static int esw_qos_vport_tc_check_type(enum sched_node_type curr_type,
return 0;
}
+static bool esw_qos_validate_unsupported_tc_bw(struct mlx5_eswitch *esw,
+ u32 *tc_bw)
+{
+ int i, num_tcs = esw_qos_num_tcs(esw->dev);
+
+ for (i = num_tcs; i < DEVLINK_RATE_TCS_MAX; i++)
+ if (tc_bw[i])
+ return false;
+
+ return true;
+}
+
+static bool esw_qos_vport_validate_unsupported_tc_bw(struct mlx5_vport *vport,
+ u32 *tc_bw)
+{
+ struct mlx5_esw_sched_node *node = vport->qos.sched_node;
+ struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
+
+ esw = (node && node->parent) ? node->parent->esw : esw;
+
+ return esw_qos_validate_unsupported_tc_bw(esw, tc_bw);
+}
+
static int esw_qos_vport_update(struct mlx5_vport *vport,
enum sched_node_type type,
struct mlx5_esw_sched_node *parent,
@@ -1179,8 +1219,15 @@ static int esw_qos_vport_update(struct mlx5_vport *vport,
if (err)
return err;
- if (curr_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR && curr_type == type)
+ if (curr_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR && curr_type == type) {
esw_qos_tc_arbiter_get_bw_shares(vport_node, curr_tc_bw);
+ if (!esw_qos_validate_unsupported_tc_bw(parent->esw,
+ curr_tc_bw)) {
+ NL_SET_ERR_MSG_MOD(extack,
+ "Unsupported traffic classes on the new device");
+ return -EOPNOTSUPP;
+ }
+ }
esw_qos_vport_disable(vport, extack);
@@ -1510,30 +1557,6 @@ static int esw_qos_devlink_rate_to_mbps(struct mlx5_core_dev *mdev, const char *
return 0;
}
-static bool esw_qos_validate_unsupported_tc_bw(struct mlx5_eswitch *esw,
- u32 *tc_bw)
-{
- int i, num_tcs = esw_qos_num_tcs(esw->dev);
-
- for (i = num_tcs; i < DEVLINK_RATE_TCS_MAX; i++) {
- if (tc_bw[i])
- return false;
- }
-
- return true;
-}
-
-static bool esw_qos_vport_validate_unsupported_tc_bw(struct mlx5_vport *vport,
- u32 *tc_bw)
-{
- struct mlx5_esw_sched_node *node = vport->qos.sched_node;
- struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
-
- esw = (node && node->parent) ? node->parent->esw : esw;
-
- return esw_qos_validate_unsupported_tc_bw(esw, tc_bw);
-}
-
static bool esw_qos_tc_bw_disabled(u32 *tc_bw)
{
int i;
@@ -1738,18 +1761,44 @@ int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,
return 0;
}
+static int
+mlx5_esw_validate_cross_esw_scheduling(struct mlx5_eswitch *esw,
+ struct mlx5_esw_sched_node *parent,
+ struct netlink_ext_ack *extack)
+{
+ if (!parent || esw == parent->esw)
+ return 0;
+
+ if (!MLX5_CAP_QOS(esw->dev, esw_cross_esw_sched)) {
+ NL_SET_ERR_MSG_MOD(extack,
+ "Cross E-Switch scheduling is not supported");
+ return -EOPNOTSUPP;
+ }
+ if (esw->dev->shd != parent->esw->dev->shd) {
+ NL_SET_ERR_MSG_MOD(extack,
+ "Cannot add vport to a parent belonging to a different device");
+ return -EOPNOTSUPP;
+ }
+ if (!mlx5_lag_is_active(esw->dev)) {
+ NL_SET_ERR_MSG_MOD(extack,
+ "Cross E-Switch scheduling requires LAG to be activated");
+ return -EOPNOTSUPP;
+ }
+
+ return 0;
+}
+
static int
mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport,
struct mlx5_esw_sched_node *parent,
struct netlink_ext_ack *extack)
{
struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
- int err = 0;
+ int err;
- if (parent && parent->esw != esw) {
- NL_SET_ERR_MSG_MOD(extack, "Cross E-Switch scheduling is not supported");
- return -EOPNOTSUPP;
- }
+ err = mlx5_esw_validate_cross_esw_scheduling(esw, parent, extack);
+ if (err)
+ return err;
if (!vport->qos.sched_node && parent) {
enum sched_node_type type;
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 11/14] net/mlx5: qos: Remove qos domains and use shd lock
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
E-Switch QoS domains were added with the intention of eventually
implementing shared qos domains to support cross-esw scheduling in the
previous approach ([1]), but they are no longer necessary in the new
approach.
Remove QoS domains and switch to using the shd lock for protecting
against concurrent QoS modifications.
Enable the supported_cross_device_rate_nodes devink ops attribute so
that all calls originating from devlink rate acquire the shd lock. Only
the additional entry points into QoS need to acquire the shd lock.
Enabling supported_cross_device_rate_nodes now is safe, because
mlx5_esw_qos_vport_update_parent rejects cross-esw parent updates.
This will change in the next patch.
[1] https://lore.kernel.org/netdev/20250213180134.323929-1-tariqt@nvidia.com/
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../net/ethernet/mellanox/mlx5/core/devlink.c | 1 +
.../net/ethernet/mellanox/mlx5/core/esw/qos.c | 186 ++++--------------
.../net/ethernet/mellanox/mlx5/core/esw/qos.h | 3 -
.../net/ethernet/mellanox/mlx5/core/eswitch.c | 8 -
.../net/ethernet/mellanox/mlx5/core/eswitch.h | 9 +-
5 files changed, 45 insertions(+), 162 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
index 6698ac55a4bf..c051605fecd2 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c
@@ -385,6 +385,7 @@ static const struct devlink_ops mlx5_devlink_ops = {
.rate_node_del = mlx5_esw_devlink_rate_node_del,
.rate_leaf_parent_set = mlx5_esw_devlink_rate_leaf_parent_set,
.rate_node_parent_set = mlx5_esw_devlink_rate_node_parent_set,
+ .supported_cross_device_rate_nodes = true,
#endif
#ifdef CONFIG_MLX5_SF_MANAGER
.port_new = mlx5_devlink_sf_port_new,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index 0be516003bcd..f67f99428959 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -11,51 +11,9 @@
/* Minimum supported BW share value by the HW is 1 Mbit/sec */
#define MLX5_MIN_BW_SHARE 1
-/* Holds rate nodes associated with an E-Switch. */
-struct mlx5_qos_domain {
- /* Serializes access to all qos changes in the qos domain. */
- struct mutex lock;
-};
-
-static void esw_qos_lock(struct mlx5_eswitch *esw)
-{
- mutex_lock(&esw->qos.domain->lock);
-}
-
-static void esw_qos_unlock(struct mlx5_eswitch *esw)
-{
- mutex_unlock(&esw->qos.domain->lock);
-}
-
static void esw_assert_qos_lock_held(struct mlx5_eswitch *esw)
{
- lockdep_assert_held(&esw->qos.domain->lock);
-}
-
-static struct mlx5_qos_domain *esw_qos_domain_alloc(void)
-{
- struct mlx5_qos_domain *qos_domain;
-
- qos_domain = kzalloc_obj(*qos_domain);
- if (!qos_domain)
- return NULL;
-
- mutex_init(&qos_domain->lock);
-
- return qos_domain;
-}
-
-static int esw_qos_domain_init(struct mlx5_eswitch *esw)
-{
- esw->qos.domain = esw_qos_domain_alloc();
-
- return esw->qos.domain ? 0 : -ENOMEM;
-}
-
-static void esw_qos_domain_release(struct mlx5_eswitch *esw)
-{
- kfree(esw->qos.domain);
- esw->qos.domain = NULL;
+ devl_assert_locked(esw->dev->shd);
}
enum sched_node_type {
@@ -1110,7 +1068,7 @@ void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport)
struct mlx5_esw_sched_node *parent;
lockdep_assert_held(&esw->state_lock);
- esw_qos_lock(esw);
+ devl_lock(esw->dev->shd);
if (!vport->qos.sched_node)
goto unlock;
@@ -1120,7 +1078,7 @@ void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport)
mlx5_esw_qos_vport_disable_locked(vport);
unlock:
- esw_qos_unlock(esw);
+ devl_unlock(esw->dev->shd);
}
static int mlx5_esw_qos_set_vport_max_rate(struct mlx5_vport *vport, u32 max_rate,
@@ -1159,26 +1117,25 @@ int mlx5_esw_qos_set_vport_rate(struct mlx5_vport *vport, u32 max_rate, u32 min_
struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
int err;
- esw_qos_lock(esw);
+ devl_lock(esw->dev->shd);
err = mlx5_esw_qos_set_vport_min_rate(vport, min_rate, NULL);
if (!err)
err = mlx5_esw_qos_set_vport_max_rate(vport, max_rate, NULL);
- esw_qos_unlock(esw);
+ devl_unlock(esw->dev->shd);
return err;
}
bool mlx5_esw_qos_get_vport_rate(struct mlx5_vport *vport, u32 *max_rate, u32 *min_rate)
{
- struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
bool enabled;
- esw_qos_lock(esw);
+ devl_lock(vport->dev->shd);
enabled = !!vport->qos.sched_node;
if (enabled) {
*max_rate = vport->qos.sched_node->max_rate;
*min_rate = vport->qos.sched_node->min_rate;
}
- esw_qos_unlock(esw);
+ devl_unlock(vport->dev->shd);
return enabled;
}
@@ -1513,9 +1470,9 @@ int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32
return err;
}
- esw_qos_lock(esw);
+ devl_lock(esw->dev->shd);
err = mlx5_esw_qos_set_vport_max_rate(vport, rate_mbps, NULL);
- esw_qos_unlock(esw);
+ devl_unlock(esw->dev->shd);
return err;
}
@@ -1604,44 +1561,24 @@ static void esw_vport_qos_prune_empty(struct mlx5_vport *vport)
mlx5_esw_qos_vport_disable_locked(vport);
}
-int mlx5_esw_qos_init(struct mlx5_eswitch *esw)
-{
- if (esw->qos.domain)
- return 0; /* Nothing to change. */
-
- return esw_qos_domain_init(esw);
-}
-
-void mlx5_esw_qos_cleanup(struct mlx5_eswitch *esw)
-{
- if (esw->qos.domain)
- esw_qos_domain_release(esw);
-}
-
/* Eswitch devlink rate API */
int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void *priv,
u64 tx_share, struct netlink_ext_ack *extack)
{
struct mlx5_vport *vport = priv;
- struct mlx5_eswitch *esw;
int err;
- esw = vport->dev->priv.eswitch;
- if (!mlx5_esw_allowed(esw))
+ if (!mlx5_esw_allowed(vport->dev->priv.eswitch))
return -EPERM;
err = esw_qos_devlink_rate_to_mbps(vport->dev, "tx_share", &tx_share, extack);
if (err)
return err;
- esw_qos_lock(esw);
err = mlx5_esw_qos_set_vport_min_rate(vport, tx_share, extack);
- if (err)
- goto out;
- esw_vport_qos_prune_empty(vport);
-out:
- esw_qos_unlock(esw);
+ if (!err)
+ esw_vport_qos_prune_empty(vport);
return err;
}
@@ -1649,24 +1586,18 @@ int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void *
u64 tx_max, struct netlink_ext_ack *extack)
{
struct mlx5_vport *vport = priv;
- struct mlx5_eswitch *esw;
int err;
- esw = vport->dev->priv.eswitch;
- if (!mlx5_esw_allowed(esw))
+ if (!mlx5_esw_allowed(vport->dev->priv.eswitch))
return -EPERM;
err = esw_qos_devlink_rate_to_mbps(vport->dev, "tx_max", &tx_max, extack);
if (err)
return err;
- esw_qos_lock(esw);
err = mlx5_esw_qos_set_vport_max_rate(vport, tx_max, extack);
- if (err)
- goto out;
- esw_vport_qos_prune_empty(vport);
-out:
- esw_qos_unlock(esw);
+ if (!err)
+ esw_vport_qos_prune_empty(vport);
return err;
}
@@ -1677,34 +1608,30 @@ int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_leaf,
{
struct mlx5_esw_sched_node *vport_node;
struct mlx5_vport *vport = priv;
- struct mlx5_eswitch *esw;
bool disable;
int err = 0;
- esw = vport->dev->priv.eswitch;
- if (!mlx5_esw_allowed(esw))
+ if (!mlx5_esw_allowed(vport->dev->priv.eswitch))
return -EPERM;
disable = esw_qos_tc_bw_disabled(tc_bw);
- esw_qos_lock(esw);
if (!esw_qos_vport_validate_unsupported_tc_bw(vport, tc_bw)) {
NL_SET_ERR_MSG_MOD(extack,
"E-Switch traffic classes number is not supported");
- err = -EOPNOTSUPP;
- goto unlock;
+ return -EOPNOTSUPP;
}
vport_node = vport->qos.sched_node;
if (disable && !vport_node)
- goto unlock;
+ return 0;
if (disable) {
if (vport_node->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)
err = esw_qos_vport_update(vport, SCHED_NODE_TYPE_VPORT,
vport_node->parent, extack);
esw_vport_qos_prune_empty(vport);
- goto unlock;
+ return err;
}
if (!vport_node) {
@@ -1719,8 +1646,6 @@ int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_leaf,
}
if (!err)
esw_qos_set_tc_arbiter_bw_shares(vport_node, tc_bw, extack);
-unlock:
- esw_qos_unlock(esw);
return err;
}
@@ -1730,28 +1655,22 @@ int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node,
struct netlink_ext_ack *extack)
{
struct mlx5_esw_sched_node *node = priv;
- struct mlx5_eswitch *esw = node->esw;
bool disable;
int err;
- if (!esw_qos_validate_unsupported_tc_bw(esw, tc_bw)) {
+ if (!esw_qos_validate_unsupported_tc_bw(node->esw, tc_bw)) {
NL_SET_ERR_MSG_MOD(extack,
"E-Switch traffic classes number is not supported");
return -EOPNOTSUPP;
}
disable = esw_qos_tc_bw_disabled(tc_bw);
- esw_qos_lock(esw);
- if (disable) {
- err = esw_qos_node_disable_tc_arbitration(node, extack);
- goto unlock;
- }
+ if (disable)
+ return esw_qos_node_disable_tc_arbitration(node, extack);
err = esw_qos_node_enable_tc_arbitration(node, extack);
if (!err)
esw_qos_set_tc_arbiter_bw_shares(node, tc_bw, extack);
-unlock:
- esw_qos_unlock(esw);
return err;
}
@@ -1759,17 +1678,14 @@ int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void
u64 tx_share, struct netlink_ext_ack *extack)
{
struct mlx5_esw_sched_node *node = priv;
- struct mlx5_eswitch *esw = node->esw;
int err;
- err = esw_qos_devlink_rate_to_mbps(esw->dev, "tx_share", &tx_share, extack);
+ err = esw_qos_devlink_rate_to_mbps(node->esw->dev, "tx_share",
+ &tx_share, extack);
if (err)
return err;
- esw_qos_lock(esw);
- err = esw_qos_set_node_min_rate(node, tx_share, extack);
- esw_qos_unlock(esw);
- return err;
+ return esw_qos_set_node_min_rate(node, tx_share, extack);
}
int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *priv,
@@ -1783,10 +1699,7 @@ int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *
if (err)
return err;
- esw_qos_lock(esw);
- err = esw_qos_sched_elem_config(node, tx_max, node->bw_share, extack);
- esw_qos_unlock(esw);
- return err;
+ return esw_qos_sched_elem_config(node, tx_max, node->bw_share, extack);
}
int mlx5_esw_devlink_rate_node_new(struct devlink_rate *rate_node, void **priv,
@@ -1794,30 +1707,23 @@ int mlx5_esw_devlink_rate_node_new(struct devlink_rate *rate_node, void **priv,
{
struct mlx5_esw_sched_node *node;
struct mlx5_eswitch *esw;
- int err = 0;
esw = mlx5_devlink_eswitch_get(rate_node->devlink);
if (IS_ERR(esw))
return PTR_ERR(esw);
- esw_qos_lock(esw);
if (esw->mode != MLX5_ESWITCH_OFFLOADS) {
NL_SET_ERR_MSG_MOD(extack,
"Rate node creation supported only in switchdev mode");
- err = -EOPNOTSUPP;
- goto unlock;
+ return -EOPNOTSUPP;
}
node = esw_qos_create_vports_sched_node(esw, extack);
- if (IS_ERR(node)) {
- err = PTR_ERR(node);
- goto unlock;
- }
+ if (IS_ERR(node))
+ return PTR_ERR(node);
*priv = node;
-unlock:
- esw_qos_unlock(esw);
- return err;
+ return 0;
}
int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,
@@ -1826,10 +1732,9 @@ int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,
struct mlx5_esw_sched_node *node = priv;
struct mlx5_eswitch *esw = node->esw;
- esw_qos_lock(esw);
__esw_qos_destroy_node(node, extack);
esw_qos_put(esw);
- esw_qos_unlock(esw);
+
return 0;
}
@@ -1846,7 +1751,6 @@ mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport,
return -EOPNOTSUPP;
}
- esw_qos_lock(esw);
if (!vport->qos.sched_node && parent) {
enum sched_node_type type;
@@ -1859,13 +1763,15 @@ mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport,
parent ? : esw->qos.root,
extack);
}
- esw_qos_unlock(esw);
+
return err;
}
void mlx5_esw_qos_vport_clear_parent(struct mlx5_vport *vport)
{
+ devl_lock(vport->dev->shd);
mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);
+ devl_unlock(vport->dev->shd);
}
int mlx5_esw_devlink_rate_leaf_parent_set(struct devlink_rate *devlink_rate,
@@ -1878,13 +1784,8 @@ int mlx5_esw_devlink_rate_leaf_parent_set(struct devlink_rate *devlink_rate,
int err;
err = mlx5_esw_qos_vport_update_parent(vport, node, extack);
- if (!err) {
- struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
-
- esw_qos_lock(esw);
+ if (!err)
esw_vport_qos_prune_empty(vport);
- esw_qos_unlock(esw);
- }
return err;
}
@@ -2007,18 +1908,15 @@ static int mlx5_esw_qos_node_update_parent(struct mlx5_esw_sched_node *node,
struct mlx5_esw_sched_node *parent,
struct netlink_ext_ack *extack)
{
- struct mlx5_esw_sched_node *curr_parent;
- struct mlx5_eswitch *esw = node->esw;
+ struct mlx5_esw_sched_node *curr_parent = node->parent;
int err;
- esw_qos_lock(esw);
- curr_parent = node->parent;
if (!parent)
- parent = esw->qos.root;
+ parent = node->esw->qos.root;
err = mlx5_esw_qos_node_validate_set_parent(node, parent, extack);
if (err)
- goto out;
+ return err;
if (node->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {
err = esw_qos_tc_arbiter_node_update_parent(node, parent,
@@ -2028,15 +1926,11 @@ static int mlx5_esw_qos_node_update_parent(struct mlx5_esw_sched_node *node,
}
if (err)
- goto out;
+ return err;
esw_qos_normalize_min_rate(curr_parent, extack);
esw_qos_normalize_min_rate(parent, extack);
-
-out:
- esw_qos_unlock(esw);
-
- return err;
+ return 0;
}
int mlx5_esw_devlink_rate_node_parent_set(struct devlink_rate *devlink_rate,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h
index 0a50982b0e27..f275e850d2c9 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h
@@ -6,9 +6,6 @@
#ifdef CONFIG_MLX5_ESWITCH
-int mlx5_esw_qos_init(struct mlx5_eswitch *esw);
-void mlx5_esw_qos_cleanup(struct mlx5_eswitch *esw);
-
int mlx5_esw_qos_set_vport_rate(struct mlx5_vport *evport, u32 max_rate, u32 min_rate);
bool mlx5_esw_qos_get_vport_rate(struct mlx5_vport *vport, u32 *max_rate, u32 *min_rate);
void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index 123c96716a54..f6bbc92d2817 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -1647,10 +1647,6 @@ int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs)
MLX5_NB_INIT(&esw->nb, eswitch_vport_event, NIC_VPORT_CHANGE);
mlx5_eq_notifier_register(esw->dev, &esw->nb);
- err = mlx5_esw_qos_init(esw);
- if (err)
- goto err_esw_init;
-
if (esw->mode == MLX5_ESWITCH_LEGACY) {
err = esw_legacy_enable(esw);
} else {
@@ -2057,9 +2053,6 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
goto reps_err;
esw->mode = MLX5_ESWITCH_LEGACY;
- err = mlx5_esw_qos_init(esw);
- if (err)
- goto reps_err;
mutex_init(&esw->offloads.encap_tbl_lock);
hash_init(esw->offloads.encap_tbl);
@@ -2109,7 +2102,6 @@ void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
esw_info(esw->dev, "cleanup\n");
- mlx5_esw_qos_cleanup(esw);
destroy_workqueue(esw->work_queue);
WARN_ON(refcount_read(&esw->qos.refcnt));
mutex_destroy(&esw->state_lock);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index 9b3949a64784..c8865ea3858d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -224,8 +224,9 @@ struct mlx5_vport {
struct mlx5_vport_info info;
- /* Protected with the E-Switch qos domain lock. The Vport QoS can
- * either be disabled (sched_node is NULL) or in one of three states:
+ /* Protected by mlx5_shd_lock().
+ * The Vport QoS can either be disabled (sched_node is NULL) or in one
+ * of three states:
* 1. Regular QoS (sched_node is a vport node).
* 2. TC QoS enabled on the vport (sched_node is a TC arbiter).
* 3. TC QoS enabled on the vport's parent node
@@ -359,7 +360,6 @@ enum {
};
struct dentry;
-struct mlx5_qos_domain;
struct mlx5_eswitch {
struct mlx5_core_dev *dev;
@@ -386,11 +386,10 @@ struct mlx5_eswitch {
struct rw_semaphore mode_lock;
atomic64_t user_count;
- /* Protected with the E-Switch qos domain lock. */
+ /* QoS changes are serialized with mlx5_shd_lock(). */
struct {
/* Initially 0, meaning no QoS users and QoS is disabled. */
refcount_t refcnt;
- struct mlx5_qos_domain *domain;
/* The root node of the hierarchy. */
struct mlx5_esw_sched_node *root;
} qos;
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 10/14] net/mlx5: qos: Model the root node in the scheduling hierarchy
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
In commit [1] the concept of the root node in the qos hierarchy was
removed due to a bug with how tx_share worked. The side effect is that
in many places, there are now corner cases related to parent handling.
However, since that change, support for tc_bw was added and now, with
upcoming cross-esw support, the code is about to become even more
complicated, increasing the number of such corner cases.
Bring back the concept of the root node, to which all esw vports and
nodes are connected to. This benefits multiple operations which can
assume there's always a valid parent and don't have to do ternary
gymnastics to determine the correct esw to talk to.
As side effect, there's no longer a need to store the groups in the
qos domain, since normalization can simply iterate over all children of
the root node. Normalization gets simplified as a result.
There should be no functionality changes as a result of this change.
[1] commit 330f0f6713a3 ("net/mlx5: Remove default QoS group and attach
vports directly to root TSAR")
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../net/ethernet/mellanox/mlx5/core/esw/qos.c | 194 ++++++++----------
.../net/ethernet/mellanox/mlx5/core/eswitch.h | 3 +-
2 files changed, 84 insertions(+), 113 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index 4781a1a42f1a..0be516003bcd 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -15,8 +15,6 @@
struct mlx5_qos_domain {
/* Serializes access to all qos changes in the qos domain. */
struct mutex lock;
- /* List of all mlx5_esw_sched_nodes. */
- struct list_head nodes;
};
static void esw_qos_lock(struct mlx5_eswitch *esw)
@@ -43,7 +41,6 @@ static struct mlx5_qos_domain *esw_qos_domain_alloc(void)
return NULL;
mutex_init(&qos_domain->lock);
- INIT_LIST_HEAD(&qos_domain->nodes);
return qos_domain;
}
@@ -62,6 +59,7 @@ static void esw_qos_domain_release(struct mlx5_eswitch *esw)
}
enum sched_node_type {
+ SCHED_NODE_TYPE_ROOT,
SCHED_NODE_TYPE_VPORTS_TSAR,
SCHED_NODE_TYPE_VPORT,
SCHED_NODE_TYPE_TC_ARBITER_TSAR,
@@ -106,18 +104,6 @@ struct mlx5_esw_sched_node {
u32 tc_bw[DEVLINK_RATE_TCS_MAX];
};
-static void esw_qos_node_attach_to_parent(struct mlx5_esw_sched_node *node)
-{
- if (!node->parent) {
- /* Root children are assigned a depth level of 2. */
- node->level = 2;
- list_add_tail(&node->entry, &node->esw->qos.domain->nodes);
- } else {
- node->level = node->parent->level + 1;
- list_add_tail(&node->entry, &node->parent->children);
- }
-}
-
static int esw_qos_num_tcs(struct mlx5_core_dev *dev)
{
int num_tcs = mlx5_max_tc(dev) + 1;
@@ -125,14 +111,14 @@ static int esw_qos_num_tcs(struct mlx5_core_dev *dev)
return num_tcs < DEVLINK_RATE_TCS_MAX ? num_tcs : DEVLINK_RATE_TCS_MAX;
}
-static void
-esw_qos_node_set_parent(struct mlx5_esw_sched_node *node, struct mlx5_esw_sched_node *parent)
+static void esw_qos_node_set_parent(struct mlx5_esw_sched_node *node,
+ struct mlx5_esw_sched_node *parent)
{
- list_del_init(&node->entry);
node->parent = parent;
- if (parent)
- node->esw = parent->esw;
- esw_qos_node_attach_to_parent(node);
+ node->esw = parent->esw;
+ node->level = parent->level + 1;
+ list_del(&node->entry);
+ list_add_tail(&node->entry, &parent->children);
}
static void esw_qos_nodes_set_parent(struct list_head *nodes,
@@ -321,22 +307,19 @@ static int esw_qos_create_rate_limit_element(struct mlx5_esw_sched_node *node,
return esw_qos_node_create_sched_element(node, sched_ctx, extack);
}
-static u32 esw_qos_calculate_min_rate_divider(struct mlx5_eswitch *esw,
- struct mlx5_esw_sched_node *parent)
+static u32
+esw_qos_calculate_min_rate_divider(struct mlx5_esw_sched_node *parent)
{
- struct list_head *nodes = parent ? &parent->children : &esw->qos.domain->nodes;
- u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
+ u32 fw_max_bw_share = MLX5_CAP_QOS(parent->esw->dev, max_tsar_bw_share);
struct mlx5_esw_sched_node *node;
u32 max_guarantee = 0;
/* Find max min_rate across all nodes.
* This will correspond to fw_max_bw_share in the final bw_share calculation.
*/
- list_for_each_entry(node, nodes, entry) {
- if (node->esw == esw && node->ix != esw->qos.root_tsar_ix &&
- node->min_rate > max_guarantee)
+ list_for_each_entry(node, &parent->children, entry)
+ if (node->min_rate > max_guarantee)
max_guarantee = node->min_rate;
- }
if (max_guarantee)
return max_t(u32, max_guarantee / fw_max_bw_share, 1);
@@ -368,18 +351,13 @@ static void esw_qos_update_sched_node_bw_share(struct mlx5_esw_sched_node *node,
esw_qos_sched_elem_config(node, node->max_rate, bw_share, extack);
}
-static void esw_qos_normalize_min_rate(struct mlx5_eswitch *esw,
- struct mlx5_esw_sched_node *parent,
+static void esw_qos_normalize_min_rate(struct mlx5_esw_sched_node *parent,
struct netlink_ext_ack *extack)
{
- struct list_head *nodes = parent ? &parent->children : &esw->qos.domain->nodes;
- u32 divider = esw_qos_calculate_min_rate_divider(esw, parent);
+ u32 divider = esw_qos_calculate_min_rate_divider(parent);
struct mlx5_esw_sched_node *node;
- list_for_each_entry(node, nodes, entry) {
- if (node->esw != esw || node->ix == esw->qos.root_tsar_ix)
- continue;
-
+ list_for_each_entry(node, &parent->children, entry) {
/* Vports TC TSARs don't have a minimum rate configured,
* so there's no need to update the bw_share on them.
*/
@@ -391,7 +369,7 @@ static void esw_qos_normalize_min_rate(struct mlx5_eswitch *esw,
if (list_empty(&node->children))
continue;
- esw_qos_normalize_min_rate(node->esw, node, extack);
+ esw_qos_normalize_min_rate(node, extack);
}
}
@@ -412,14 +390,11 @@ static u32 esw_qos_calculate_tc_bw_divider(u32 *tc_bw)
static int esw_qos_set_node_min_rate(struct mlx5_esw_sched_node *node,
u32 min_rate, struct netlink_ext_ack *extack)
{
- struct mlx5_eswitch *esw = node->esw;
-
if (min_rate == node->min_rate)
return 0;
node->min_rate = min_rate;
- esw_qos_normalize_min_rate(esw, node->parent, extack);
-
+ esw_qos_normalize_min_rate(node->parent, extack);
return 0;
}
@@ -472,8 +447,7 @@ esw_qos_vport_create_sched_element(struct mlx5_esw_sched_node *vport_node,
SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
attr = MLX5_ADDR_OF(scheduling_context, sched_ctx, element_attributes);
MLX5_SET(vport_element, attr, vport_number, vport_node->vport->vport);
- MLX5_SET(scheduling_context, sched_ctx, parent_element_id,
- parent ? parent->ix : vport_node->esw->qos.root_tsar_ix);
+ MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent->ix);
MLX5_SET(scheduling_context, sched_ctx, max_average_bw,
vport_node->max_rate);
@@ -513,7 +487,7 @@ esw_qos_vport_tc_create_sched_element(struct mlx5_esw_sched_node *vport_tc_node,
}
static struct mlx5_esw_sched_node *
-__esw_qos_alloc_node(struct mlx5_eswitch *esw, u32 tsar_ix, enum sched_node_type type,
+__esw_qos_alloc_node(u32 tsar_ix, enum sched_node_type type,
struct mlx5_esw_sched_node *parent)
{
struct mlx5_esw_sched_node *node;
@@ -522,20 +496,12 @@ __esw_qos_alloc_node(struct mlx5_eswitch *esw, u32 tsar_ix, enum sched_node_type
if (!node)
return NULL;
- node->esw = esw;
node->ix = tsar_ix;
node->type = type;
- node->parent = parent;
INIT_LIST_HEAD(&node->children);
- esw_qos_node_attach_to_parent(node);
- if (!parent) {
- /* The caller is responsible for inserting the node into the
- * parent list if necessary. This function can also be used with
- * a NULL parent, which doesn't necessarily indicate that it
- * refers to the root scheduling element.
- */
- list_del_init(&node->entry);
- }
+ INIT_LIST_HEAD(&node->entry);
+ if (parent)
+ esw_qos_node_set_parent(node, parent);
return node;
}
@@ -570,7 +536,7 @@ static int esw_qos_create_vports_tc_node(struct mlx5_esw_sched_node *parent,
SCHEDULING_HIERARCHY_E_SWITCH))
return -EOPNOTSUPP;
- vports_tc_node = __esw_qos_alloc_node(parent->esw, 0,
+ vports_tc_node = __esw_qos_alloc_node(0,
SCHED_NODE_TYPE_VPORTS_TC_TSAR,
parent);
if (!vports_tc_node) {
@@ -665,7 +631,6 @@ static int esw_qos_create_tc_arbiter_sched_elem(
struct netlink_ext_ack *extack)
{
u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};
- u32 tsar_parent_ix;
void *attr;
if (!mlx5_qos_tsar_type_supported(tc_arbiter_node->esw->dev,
@@ -678,10 +643,8 @@ static int esw_qos_create_tc_arbiter_sched_elem(
attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes);
MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_TC_ARB);
- tsar_parent_ix = tc_arbiter_node->parent ? tc_arbiter_node->parent->ix :
- tc_arbiter_node->esw->qos.root_tsar_ix;
MLX5_SET(scheduling_context, tsar_ctx, parent_element_id,
- tsar_parent_ix);
+ tc_arbiter_node->parent->ix);
MLX5_SET(scheduling_context, tsar_ctx, element_type,
SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR);
MLX5_SET(scheduling_context, tsar_ctx, max_average_bw,
@@ -694,37 +657,36 @@ static int esw_qos_create_tc_arbiter_sched_elem(
}
static struct mlx5_esw_sched_node *
-__esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct mlx5_esw_sched_node *parent,
+__esw_qos_create_vports_sched_node(struct mlx5_esw_sched_node *parent,
struct netlink_ext_ack *extack)
{
struct mlx5_esw_sched_node *node;
- u32 tsar_ix;
int err;
+ u32 ix;
- err = esw_qos_create_node_sched_elem(esw->dev, esw->qos.root_tsar_ix, 0,
- 0, &tsar_ix);
+ err = esw_qos_create_node_sched_elem(parent->esw->dev, parent->ix, 0, 0,
+ &ix);
if (err) {
NL_SET_ERR_MSG_MOD(extack, "E-Switch create TSAR for node failed");
return ERR_PTR(err);
}
- node = __esw_qos_alloc_node(esw, tsar_ix, SCHED_NODE_TYPE_VPORTS_TSAR, parent);
+ node = __esw_qos_alloc_node(ix, SCHED_NODE_TYPE_VPORTS_TSAR, parent);
if (!node) {
NL_SET_ERR_MSG_MOD(extack, "E-Switch alloc node failed");
err = -ENOMEM;
goto err_alloc_node;
}
- list_add_tail(&node->entry, &esw->qos.domain->nodes);
- esw_qos_normalize_min_rate(esw, NULL, extack);
- trace_mlx5_esw_node_qos_create(esw->dev, node, node->ix);
+ esw_qos_normalize_min_rate(parent, extack);
+ trace_mlx5_esw_node_qos_create(parent->esw->dev, node, node->ix);
return node;
err_alloc_node:
- if (mlx5_destroy_scheduling_element_cmd(esw->dev,
+ if (mlx5_destroy_scheduling_element_cmd(parent->esw->dev,
SCHEDULING_HIERARCHY_E_SWITCH,
- tsar_ix))
+ ix))
NL_SET_ERR_MSG_MOD(extack, "E-Switch destroy TSAR for node failed");
return ERR_PTR(err);
}
@@ -746,7 +708,7 @@ esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct netlink_ext_ac
if (err)
return ERR_PTR(err);
- node = __esw_qos_create_vports_sched_node(esw, NULL, extack);
+ node = __esw_qos_create_vports_sched_node(esw->qos.root, extack);
if (IS_ERR(node))
esw_qos_put(esw);
@@ -762,38 +724,47 @@ static void __esw_qos_destroy_node(struct mlx5_esw_sched_node *node, struct netl
trace_mlx5_esw_node_qos_destroy(esw->dev, node, node->ix);
esw_qos_destroy_node(node, extack);
- esw_qos_normalize_min_rate(esw, NULL, extack);
+ esw_qos_normalize_min_rate(esw->qos.root, extack);
}
static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack)
{
struct mlx5_core_dev *dev = esw->dev;
+ struct mlx5_esw_sched_node *root;
+ u32 root_ix;
int err;
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
return -EOPNOTSUPP;
- err = esw_qos_create_node_sched_elem(esw->dev, 0, 0, 0,
- &esw->qos.root_tsar_ix);
+ err = esw_qos_create_node_sched_elem(esw->dev, 0, 0, 0, &root_ix);
if (err) {
esw_warn(dev, "E-Switch create root TSAR failed (%d)\n", err);
return err;
}
+ root = __esw_qos_alloc_node(root_ix, SCHED_NODE_TYPE_ROOT, NULL);
+ if (!root) {
+ esw_warn(dev, "E-Switch create root node failed\n");
+ err = -ENOMEM;
+ goto out_err;
+ }
+ root->esw = esw;
+ root->level = 1;
+ esw->qos.root = root;
refcount_set(&esw->qos.refcnt, 1);
return 0;
+out_err:
+ mlx5_destroy_scheduling_element_cmd(dev, SCHEDULING_HIERARCHY_E_SWITCH,
+ root_ix);
+ return err;
}
static void esw_qos_destroy(struct mlx5_eswitch *esw)
{
- int err;
-
- err = mlx5_destroy_scheduling_element_cmd(esw->dev,
- SCHEDULING_HIERARCHY_E_SWITCH,
- esw->qos.root_tsar_ix);
- if (err)
- esw_warn(esw->dev, "E-Switch destroy root TSAR failed (%d)\n", err);
+ esw_qos_destroy_node(esw->qos.root, NULL);
+ esw->qos.root = NULL;
}
static int esw_qos_get(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack)
@@ -866,8 +837,7 @@ esw_qos_create_vport_tc_sched_node(struct mlx5_vport *vport,
u8 tc = vports_tc_node->tc;
int err;
- vport_tc_node = __esw_qos_alloc_node(vport_node->esw, 0,
- SCHED_NODE_TYPE_VPORT_TC,
+ vport_tc_node = __esw_qos_alloc_node(0, SCHED_NODE_TYPE_VPORT_TC,
vports_tc_node);
if (!vport_tc_node)
return -ENOMEM;
@@ -959,7 +929,7 @@ esw_qos_vport_tc_enable(struct mlx5_vport *vport, enum sched_node_type type,
/* Increase the parent's level by 2 to account for both the
* TC arbiter and the vports TC scheduling element.
*/
- new_level = (parent ? parent->level : 2) + 2;
+ new_level = parent->level + 2;
max_level = 1 << MLX5_CAP_QOS(vport_node->esw->dev,
log_esw_max_sched_depth);
if (new_level > max_level) {
@@ -997,7 +967,7 @@ esw_qos_vport_tc_enable(struct mlx5_vport *vport, enum sched_node_type type,
err_sched_nodes:
if (type == SCHED_NODE_TYPE_RATE_LIMITER) {
esw_qos_node_destroy_sched_element(vport_node, NULL);
- esw_qos_node_attach_to_parent(vport_node);
+ esw_qos_node_set_parent(vport_node, vport_node->parent);
} else {
esw_qos_tc_arbiter_scheduling_teardown(vport_node, NULL);
}
@@ -1055,7 +1025,7 @@ static void esw_qos_vport_disable(struct mlx5_vport *vport, struct netlink_ext_a
vport_node->bw_share = 0;
memset(vport_node->tc_bw, 0, sizeof(vport_node->tc_bw));
list_del_init(&vport_node->entry);
- esw_qos_normalize_min_rate(vport_node->esw, vport_node->parent, extack);
+ esw_qos_normalize_min_rate(vport_node->parent, extack);
trace_mlx5_esw_vport_qos_destroy(vport_node->esw->dev, vport);
}
@@ -1068,7 +1038,7 @@ static int esw_qos_vport_enable(struct mlx5_vport *vport,
struct mlx5_esw_sched_node *vport_node = vport->qos.sched_node;
int err;
- esw_assert_qos_lock_held(vport->dev->priv.eswitch);
+ esw_assert_qos_lock_held(vport_node->esw);
esw_qos_node_set_parent(vport_node, parent);
if (type == SCHED_NODE_TYPE_VPORT)
@@ -1079,7 +1049,7 @@ static int esw_qos_vport_enable(struct mlx5_vport *vport,
return err;
vport_node->type = type;
- esw_qos_normalize_min_rate(vport_node->esw, parent, extack);
+ esw_qos_normalize_min_rate(parent, extack);
trace_mlx5_esw_vport_qos_create(vport->dev, vport, vport_node->max_rate,
vport_node->bw_share);
@@ -1092,7 +1062,6 @@ static int mlx5_esw_qos_vport_enable(struct mlx5_vport *vport, enum sched_node_t
{
struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
struct mlx5_esw_sched_node *sched_node;
- struct mlx5_eswitch *parent_esw;
int err;
esw_assert_qos_lock_held(esw);
@@ -1100,14 +1069,13 @@ static int mlx5_esw_qos_vport_enable(struct mlx5_vport *vport, enum sched_node_t
if (err)
return err;
- parent_esw = parent ? parent->esw : esw;
- sched_node = __esw_qos_alloc_node(parent_esw, 0, type, parent);
+ if (!parent)
+ parent = esw->qos.root;
+ sched_node = __esw_qos_alloc_node(0, type, parent);
if (!sched_node) {
esw_qos_put(esw);
return -ENOMEM;
}
- if (!parent)
- list_add_tail(&sched_node->entry, &esw->qos.domain->nodes);
sched_node->max_rate = max_rate;
sched_node->min_rate = min_rate;
@@ -1147,7 +1115,8 @@ void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport)
goto unlock;
parent = vport->qos.sched_node->parent;
- WARN(parent, "Disabling QoS on port before detaching it from node");
+ WARN(parent != esw->qos.root,
+ "Disabling QoS on port before detaching it from node");
mlx5_esw_qos_vport_disable_locked(vport);
unlock:
@@ -1319,11 +1288,9 @@ static int esw_qos_switch_tc_arbiter_node_to_vports(
struct mlx5_esw_sched_node *node,
struct netlink_ext_ack *extack)
{
- u32 parent_tsar_ix = node->parent ?
- node->parent->ix : node->esw->qos.root_tsar_ix;
int err;
- err = esw_qos_create_node_sched_elem(node->esw->dev, parent_tsar_ix,
+ err = esw_qos_create_node_sched_elem(node->esw->dev, node->parent->ix,
node->max_rate, node->bw_share,
&node->ix);
if (err) {
@@ -1378,8 +1345,8 @@ esw_qos_move_node(struct mlx5_esw_sched_node *curr_node)
{
struct mlx5_esw_sched_node *new_node;
- new_node = __esw_qos_alloc_node(curr_node->esw, curr_node->ix,
- curr_node->type, NULL);
+ new_node = __esw_qos_alloc_node(curr_node->ix, curr_node->type,
+ curr_node->parent);
if (!new_node)
return ERR_PTR(-ENOMEM);
@@ -1888,7 +1855,9 @@ mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport,
err = mlx5_esw_qos_vport_enable(vport, type, parent, 0, 0,
extack);
} else if (vport->qos.sched_node) {
- err = esw_qos_vport_update_parent(vport, parent, extack);
+ err = esw_qos_vport_update_parent(vport,
+ parent ? : esw->qos.root,
+ extack);
}
esw_qos_unlock(esw);
return err;
@@ -1941,7 +1910,7 @@ mlx5_esw_qos_node_validate_set_parent(struct mlx5_esw_sched_node *node,
{
u8 new_level, max_level;
- if (parent && parent->esw != node->esw) {
+ if (parent->esw != node->esw) {
NL_SET_ERR_MSG_MOD(extack,
"Cannot assign node to another E-Switch");
return -EOPNOTSUPP;
@@ -1953,13 +1922,13 @@ mlx5_esw_qos_node_validate_set_parent(struct mlx5_esw_sched_node *node,
return -EOPNOTSUPP;
}
- if (parent && parent->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {
+ if (parent->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {
NL_SET_ERR_MSG_MOD(extack,
"Cannot attach a node to a parent with TC bandwidth configured");
return -EOPNOTSUPP;
}
- new_level = parent ? parent->level + 1 : 2;
+ new_level = parent->level + 1;
if (node->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {
/* Increase by one to account for the vports TC scheduling
* element.
@@ -2010,14 +1979,12 @@ static int esw_qos_vports_node_update_parent(struct mlx5_esw_sched_node *node,
{
struct mlx5_esw_sched_node *curr_parent = node->parent;
struct mlx5_eswitch *esw = node->esw;
- u32 parent_ix;
int err;
- parent_ix = parent ? parent->ix : node->esw->qos.root_tsar_ix;
mlx5_destroy_scheduling_element_cmd(esw->dev,
SCHEDULING_HIERARCHY_E_SWITCH,
node->ix);
- err = esw_qos_create_node_sched_elem(esw->dev, parent_ix,
+ err = esw_qos_create_node_sched_elem(esw->dev, parent->ix,
node->max_rate, 0, &node->ix);
if (err) {
NL_SET_ERR_MSG_MOD(extack,
@@ -2044,12 +2011,15 @@ static int mlx5_esw_qos_node_update_parent(struct mlx5_esw_sched_node *node,
struct mlx5_eswitch *esw = node->esw;
int err;
+ esw_qos_lock(esw);
+ curr_parent = node->parent;
+ if (!parent)
+ parent = esw->qos.root;
+
err = mlx5_esw_qos_node_validate_set_parent(node, parent, extack);
if (err)
- return err;
+ goto out;
- esw_qos_lock(esw);
- curr_parent = node->parent;
if (node->type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {
err = esw_qos_tc_arbiter_node_update_parent(node, parent,
extack);
@@ -2060,8 +2030,8 @@ static int mlx5_esw_qos_node_update_parent(struct mlx5_esw_sched_node *node,
if (err)
goto out;
- esw_qos_normalize_min_rate(esw, curr_parent, extack);
- esw_qos_normalize_min_rate(esw, parent, extack);
+ esw_qos_normalize_min_rate(curr_parent, extack);
+ esw_qos_normalize_min_rate(parent, extack);
out:
esw_qos_unlock(esw);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index a5a02b26b80b..9b3949a64784 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -390,8 +390,9 @@ struct mlx5_eswitch {
struct {
/* Initially 0, meaning no QoS users and QoS is disabled. */
refcount_t refcnt;
- u32 root_tsar_ix;
struct mlx5_qos_domain *domain;
+ /* The root node of the hierarchy. */
+ struct mlx5_esw_sched_node *root;
} qos;
struct mlx5_esw_bridge_offloads *br_offloads;
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 09/14] net/mlx5: qos: Expose a function to clear a vport's parent
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Currently, clearing a vport's parent happens with a call that looks like
this:
mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);
Change that to something nicer that looks like this:
mlx5_esw_qos_vport_clear_parent(vport);
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../ethernet/mellanox/mlx5/core/esw/devlink_port.c | 2 +-
drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c | 11 +++++++++--
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | 3 +--
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
index 8bffba85f21f..6f884c4189a0 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
@@ -204,7 +204,7 @@ void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_vport *vport)
return;
dl_port = vport->dl_port;
- mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);
+ mlx5_esw_qos_vport_clear_parent(vport);
devl_rate_leaf_destroy(&dl_port->dl_port);
devl_port_unregister(&dl_port->dl_port);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index d04fda4b3778..4781a1a42f1a 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -1866,8 +1866,10 @@ int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,
return 0;
}
-int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *parent,
- struct netlink_ext_ack *extack)
+static int
+mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport,
+ struct mlx5_esw_sched_node *parent,
+ struct netlink_ext_ack *extack)
{
struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
int err = 0;
@@ -1892,6 +1894,11 @@ int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_s
return err;
}
+void mlx5_esw_qos_vport_clear_parent(struct mlx5_vport *vport)
+{
+ mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);
+}
+
int mlx5_esw_devlink_rate_leaf_parent_set(struct devlink_rate *devlink_rate,
struct devlink_rate *parent,
void *priv, void *parent_priv,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index 5128f5020dae..a5a02b26b80b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -455,8 +455,7 @@ int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
u16 vport_num, bool setting);
int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
u32 max_rate, u32 min_rate);
-int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *node,
- struct netlink_ext_ack *extack);
+void mlx5_esw_qos_vport_clear_parent(struct mlx5_vport *vport);
int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 08/14] net/mlx5: qos: Use mlx5_lag_query_bond_speed to query LAG speed
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Previously, the master device of the uplink netdev was queried for its
maximum link speed from the QoS layer, requiring the uplink_netdev mutex
and possibly the RTNL (if the call originated from the TC matchall
layer).
Acquiring these locks here is risky, as lock cycles could form. The
locking for the QoS layer is about to change, so to avoid issues,
replace the code querying the LAG's max link speed with the existing
infrastructure added in commit [1].
This simplifies this part and avoids potential lock cycles.
One caveat is that there's a new edge case, when the bond device is not
fully formed to represent the LAG device, the speed isn't calculated and
is left at 0. This now handled explicitly.
[1] commit f0b2fde98065 ("net/mlx5: Add support for querying bond
speed")
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../net/ethernet/mellanox/mlx5/core/esw/qos.c | 36 ++++---------------
1 file changed, 6 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index faccc60fc93a..d04fda4b3778 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -1489,41 +1489,16 @@ static int esw_qos_node_enable_tc_arbitration(struct mlx5_esw_sched_node *node,
return err;
}
-static u32 mlx5_esw_qos_lag_link_speed_get(struct mlx5_core_dev *mdev,
- bool take_rtnl)
-{
- struct ethtool_link_ksettings lksettings;
- struct net_device *slave, *master;
- u32 speed = SPEED_UNKNOWN;
-
- slave = mlx5_uplink_netdev_get(mdev);
- if (!slave)
- goto out;
-
- if (take_rtnl)
- rtnl_lock();
- master = netdev_master_upper_dev_get(slave);
- if (master && !__ethtool_get_link_ksettings(master, &lksettings))
- speed = lksettings.base.speed;
- if (take_rtnl)
- rtnl_unlock();
-
-out:
- mlx5_uplink_netdev_put(mdev, slave);
- return speed;
-}
-
static int mlx5_esw_qos_max_link_speed_get(struct mlx5_core_dev *mdev, u32 *link_speed_max,
- bool take_rtnl,
struct netlink_ext_ack *extack)
{
int err;
- if (!mlx5_lag_is_active(mdev))
+ if (!mlx5_lag_is_active(mdev) ||
+ mlx5_lag_query_bond_speed(mdev, link_speed_max) < 0 ||
+ *link_speed_max == 0)
goto skip_lag;
- *link_speed_max = mlx5_esw_qos_lag_link_speed_get(mdev, take_rtnl);
-
if (*link_speed_max != (u32)SPEED_UNKNOWN)
return 0;
@@ -1560,7 +1535,8 @@ int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32
return PTR_ERR(vport);
if (rate_mbps) {
- err = mlx5_esw_qos_max_link_speed_get(esw->dev, &link_speed_max, false, NULL);
+ err = mlx5_esw_qos_max_link_speed_get(esw->dev, &link_speed_max,
+ NULL);
if (err)
return err;
@@ -1598,7 +1574,7 @@ static int esw_qos_devlink_rate_to_mbps(struct mlx5_core_dev *mdev, const char *
return -EINVAL;
}
- err = mlx5_esw_qos_max_link_speed_get(mdev, &link_speed_max, true, extack);
+ err = mlx5_esw_qos_max_link_speed_get(mdev, &link_speed_max, extack);
if (err)
return err;
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 07/14] devlink: Allow rate node parents from other devlinks
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
This commit makes use of the building blocks previously added to
implement cross-device rate nodes.
A new 'supported_cross_device_rate_nodes' bool is added to devlink_ops
which lets drivers advertise support for cross-device rate objects.
If enabled and if there is a common shared devlink instance, then:
- all rate objects will be stored in the top-most common nested instance
and
- rate objects can have parents from other devices sharing the same
common instance.
The parent devlink from info->ctx is not locked, so none of its mutable
fields can be used. But parent setting only requires comparing devlink
pointer comparisons. Additionally, since the shared devlink is locked,
other rate operations cannot concurrently happen.
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../networking/devlink/devlink-port.rst | 2 +
include/net/devlink.h | 5 +
net/devlink/rate.c | 92 +++++++++++++++++--
3 files changed, 90 insertions(+), 9 deletions(-)
diff --git a/Documentation/networking/devlink/devlink-port.rst b/Documentation/networking/devlink/devlink-port.rst
index 5e397798a402..976bc5ca0962 100644
--- a/Documentation/networking/devlink/devlink-port.rst
+++ b/Documentation/networking/devlink/devlink-port.rst
@@ -417,6 +417,8 @@ API allows to configure following rate object's parameters:
Parent node name. Parent node rate limits are considered as additional limits
to all node children limits. ``tx_max`` is an upper limit for children.
``tx_share`` is a total bandwidth distributed among children.
+ If the device supports cross-function scheduling, the parent can be from a
+ different function of the same underlying device.
``tc_bw``
Allow users to set the bandwidth allocation per traffic class on rate
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 3038af6ec017..8d5ad5d4f1d0 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -1585,6 +1585,11 @@ struct devlink_ops {
struct devlink_rate *parent,
void *priv_child, void *priv_parent,
struct netlink_ext_ack *extack);
+ /* Indicates if cross-device rate nodes are supported.
+ * This also requires a shared common ancestor object all devices that
+ * could share rate nodes are nested in.
+ */
+ bool supported_cross_device_rate_nodes;
/**
* selftests_check() - queries if selftest is supported
* @devlink: devlink instance
diff --git a/net/devlink/rate.c b/net/devlink/rate.c
index 1949746fab29..f243cccc95be 100644
--- a/net/devlink/rate.c
+++ b/net/devlink/rate.c
@@ -30,19 +30,53 @@ devlink_rate_leaf_get_from_info(struct devlink *devlink, struct genl_info *info)
return devlink_rate ?: ERR_PTR(-ENODEV);
}
+/* Repeatedly locks the nested-in devlink instances while cross device rate
+ * nodes are supported. Returns the devlink instance where rates should be
+ * stored.
+ */
static struct devlink *devl_rate_lock(struct devlink *devlink)
{
- return devlink;
+ struct devlink *rate_devlink = devlink;
+
+ while (rate_devlink->ops &&
+ rate_devlink->ops->supported_cross_device_rate_nodes) {
+ devlink = devlink_nested_in_get_lock(rate_devlink->rel);
+ if (!devlink)
+ break;
+ rate_devlink = devlink;
+ }
+ return rate_devlink;
}
+/* Variant of the above for when the nested-in devlink instances are already
+ * locked.
+ */
static struct devlink *
devl_get_rate_node_instance_locked(struct devlink *devlink)
{
- return devlink;
+ struct devlink *rate_devlink = devlink;
+
+ while (rate_devlink->ops &&
+ rate_devlink->ops->supported_cross_device_rate_nodes) {
+ devlink = devlink_nested_in_get_locked(rate_devlink->rel);
+ if (!devlink)
+ break;
+ rate_devlink = devlink;
+ }
+ return rate_devlink;
}
+/* Repeatedly unlocks the nested-in devlink instances of 'devlink' while cross
+ * device nodes are supported.
+ */
static void devl_rate_unlock(struct devlink *devlink)
{
+ if (!devlink || !devlink->ops ||
+ !devlink->ops->supported_cross_device_rate_nodes)
+ return;
+
+ devl_rate_unlock(devlink_nested_in_get_locked(devlink->rel));
+ devlink_nested_in_put_unlock(devlink->rel);
}
static struct devlink_rate *
@@ -120,6 +154,24 @@ static int devlink_rate_put_tc_bws(struct sk_buff *msg, u32 *tc_bw)
return -EMSGSIZE;
}
+static int devlink_nl_rate_parent_fill(struct sk_buff *msg,
+ struct devlink_rate *devlink_rate)
+{
+ struct devlink_rate *parent = devlink_rate->parent;
+ struct devlink *devlink = parent->devlink;
+
+ if (nla_put_string(msg, DEVLINK_ATTR_RATE_PARENT_NODE_NAME,
+ parent->name))
+ return -EMSGSIZE;
+
+ if (devlink != devlink_rate->devlink &&
+ devlink_nl_put_nested_handle(msg, devlink_net(devlink), devlink,
+ DEVLINK_ATTR_PARENT_DEV))
+ return -EMSGSIZE;
+
+ return 0;
+}
+
static int devlink_nl_rate_fill(struct sk_buff *msg,
struct devlink_rate *devlink_rate,
enum devlink_command cmd, u32 portid, u32 seq,
@@ -164,10 +216,9 @@ static int devlink_nl_rate_fill(struct sk_buff *msg,
devlink_rate->tx_weight))
goto nla_put_failure;
- if (devlink_rate->parent)
- if (nla_put_string(msg, DEVLINK_ATTR_RATE_PARENT_NODE_NAME,
- devlink_rate->parent->name))
- goto nla_put_failure;
+ if (devlink_rate->parent &&
+ devlink_nl_rate_parent_fill(msg, devlink_rate))
+ goto nla_put_failure;
if (devlink_rate_put_tc_bws(msg, devlink_rate->tc_bw))
goto nla_put_failure;
@@ -320,13 +371,14 @@ devlink_nl_rate_parent_node_set(struct devlink_rate *devlink_rate,
struct genl_info *info,
struct nlattr *nla_parent)
{
- struct devlink *devlink = devlink_rate->devlink;
+ struct devlink *devlink = devlink_rate->devlink, *parent_devlink;
const char *parent_name = nla_data(nla_parent);
const struct devlink_ops *ops = devlink->ops;
size_t len = strlen(parent_name);
struct devlink_rate *parent;
int err = -EOPNOTSUPP;
+ parent_devlink = devlink_nl_ctx(info)->parent_devlink ? : devlink;
parent = devlink_rate->parent;
if (parent && !len) {
@@ -344,7 +396,13 @@ devlink_nl_rate_parent_node_set(struct devlink_rate *devlink_rate,
refcount_dec(&parent->refcnt);
devlink_rate->parent = NULL;
} else if (len) {
- parent = devlink_rate_node_get_by_name(devlink, parent_name);
+ /* parent_devlink (when different than devlink) isn't locked,
+ * but the rate node devlink instance is, so nobody from the
+ * same group of devices sharing rates could change the used
+ * fields or unregister the parent.
+ */
+ parent = devlink_rate_node_get_by_name(parent_devlink,
+ parent_name);
if (IS_ERR(parent))
return -ENODEV;
@@ -625,7 +683,8 @@ static bool devlink_rate_set_ops_supported(const struct devlink_ops *ops,
int devlink_nl_rate_set_doit(struct sk_buff *skb, struct genl_info *info)
{
- struct devlink *devlink = devlink_nl_ctx(info)->devlink;
+ struct devlink_nl_ctx *ctx = devlink_nl_ctx(info);
+ struct devlink *devlink = ctx->devlink;
struct devlink_rate *devlink_rate;
const struct devlink_ops *ops;
int err;
@@ -644,6 +703,14 @@ int devlink_nl_rate_set_doit(struct sk_buff *skb, struct genl_info *info)
goto unlock;
}
+ if (ctx->parent_devlink && ctx->parent_devlink != devlink &&
+ !ops->supported_cross_device_rate_nodes) {
+ NL_SET_ERR_MSG(info->extack,
+ "Cross-device rate parents aren't supported");
+ err = -EOPNOTSUPP;
+ goto unlock;
+ }
+
err = devlink_nl_rate_set(devlink_rate, ops, info);
if (!err)
@@ -671,6 +738,13 @@ int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
if (!devlink_rate_set_ops_supported(ops, info, DEVLINK_RATE_TYPE_NODE))
return -EOPNOTSUPP;
+ if (ctx->parent_devlink && ctx->parent_devlink != devlink &&
+ !ops->supported_cross_device_rate_nodes) {
+ NL_SET_ERR_MSG(info->extack,
+ "Cross-device rate parents aren't supported");
+ return -EOPNOTSUPP;
+ }
+
rate_devlink = devl_rate_lock(devlink);
rate_node = devlink_rate_node_get_from_attrs(devlink, info->attrs);
if (!IS_ERR(rate_node)) {
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 06/14] devlink: Allow parent dev for rate-set and rate-new
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Currently, a devlink rate's parent device is assumed to be the same as
the one where the devlink rate is created.
This patch changes that to allow rate commands to accept an additional
argument that specifies the parent dev. This will allow devlink rate
groups with leafs from other devices.
Example of the new usage with ynl:
Creating a group on pci/0000:08:00.1 with a parent to an already
existing pci/0000:08:00.1/group1:
./tools/net/ynl/pyynl/cli.py --spec \
Documentation/netlink/specs/devlink.yaml --do rate-new --json '{
"bus-name": "pci",
"dev-name": "0000:08:00.1",
"rate-node-name": "group2",
"rate-parent-node-name": "group1",
"parent-dev": {
"bus-name": "pci",
"dev-name": "0000:08:00.1"
}
}'
Setting the parent of leaf node pci/0000:08:00.1/65537 to
pci/0000:08:00.0/group1:
./tools/net/ynl/pyynl/cli.py --spec \
Documentation/netlink/specs/devlink.yaml --do rate-set --json '{
"bus-name": "pci",
"dev-name": "0000:08:00.1",
"port-index": 65537,
"parent-dev": {
"bus-name": "pci",
"dev-name": "0000:08:00.0"
},
"rate-parent-node-name": "group1"
}'
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
Documentation/netlink/specs/devlink.yaml | 10 +++---
net/devlink/netlink.c | 40 +++++++++++++++++++++++-
net/devlink/netlink_gen.c | 24 +++++++++-----
net/devlink/netlink_gen.h | 8 +++++
net/devlink/rate.c | 4 ++-
5 files changed, 72 insertions(+), 14 deletions(-)
diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml
index 43cc0abf7235..7bf5116fad49 100644
--- a/Documentation/netlink/specs/devlink.yaml
+++ b/Documentation/netlink/specs/devlink.yaml
@@ -2271,8 +2271,8 @@ operations:
dont-validate: [strict]
flags: [admin-perm]
do:
- pre: devlink-nl-pre-doit
- post: devlink-nl-post-doit
+ pre: devlink-nl-pre-doit-parent-dev-optional
+ post: devlink-nl-post-doit-parent-dev-optional
request:
attributes:
- bus-name
@@ -2285,6 +2285,7 @@ operations:
- rate-tx-weight
- rate-parent-node-name
- rate-tc-bws
+ - parent-dev
-
name: rate-new
@@ -2293,8 +2294,8 @@ operations:
dont-validate: [strict]
flags: [admin-perm]
do:
- pre: devlink-nl-pre-doit
- post: devlink-nl-post-doit
+ pre: devlink-nl-pre-doit-parent-dev-optional
+ post: devlink-nl-post-doit-parent-dev-optional
request:
attributes:
- bus-name
@@ -2307,6 +2308,7 @@ operations:
- rate-tx-weight
- rate-parent-node-name
- rate-tc-bws
+ - parent-dev
-
name: rate-del
diff --git a/net/devlink/netlink.c b/net/devlink/netlink.c
index 21a34e4d2a49..5425301acab8 100644
--- a/net/devlink/netlink.c
+++ b/net/devlink/netlink.c
@@ -243,7 +243,29 @@ devlink_get_from_attrs_lock(struct net *net, struct nlattr **attrs,
struct devlink *
devlink_get_parent_from_attrs_lock(struct net *net, struct nlattr **attrs)
{
- return ERR_PTR(-EOPNOTSUPP);
+ unsigned int maxtype = ARRAY_SIZE(devlink_dl_parent_dev_nl_policy) - 1;
+ struct devlink *devlink;
+ struct nlattr **tb;
+ int err;
+
+ if (!attrs[DEVLINK_ATTR_PARENT_DEV])
+ return ERR_PTR(-EINVAL);
+
+ tb = kcalloc(maxtype + 1, sizeof(*tb), GFP_KERNEL);
+ if (!tb)
+ return ERR_PTR(-ENOMEM);
+
+ err = nla_parse_nested(tb, maxtype, attrs[DEVLINK_ATTR_PARENT_DEV],
+ devlink_dl_parent_dev_nl_policy, NULL);
+ if (err)
+ goto out;
+
+ devlink = devlink_get_from_attrs_lock(net, tb, false);
+ kfree(tb);
+ return devlink;
+out:
+ kfree(tb);
+ return ERR_PTR(err);
}
static int __devlink_nl_pre_doit(struct sk_buff *skb, struct genl_info *info,
@@ -322,6 +344,14 @@ int devlink_nl_pre_doit_port_optional(const struct genl_split_ops *ops,
return __devlink_nl_pre_doit(skb, info, DEVLINK_NL_FLAG_NEED_DEVLINK_OR_PORT);
}
+int devlink_nl_pre_doit_parent_dev_optional(const struct genl_split_ops *ops,
+ struct sk_buff *skb,
+ struct genl_info *info)
+{
+ return __devlink_nl_pre_doit(skb, info,
+ DEVLINK_NL_FLAG_OPTIONAL_PARENT_DEV);
+}
+
static void __devlink_nl_post_doit(struct sk_buff *skb, struct genl_info *info,
u8 flags)
{
@@ -348,6 +378,14 @@ devlink_nl_post_doit_dev_lock(const struct genl_split_ops *ops,
__devlink_nl_post_doit(skb, info, DEVLINK_NL_FLAG_NEED_DEV_LOCK);
}
+void
+devlink_nl_post_doit_parent_dev_optional(const struct genl_split_ops *ops,
+ struct sk_buff *skb,
+ struct genl_info *info)
+{
+ __devlink_nl_post_doit(skb, info, DEVLINK_NL_FLAG_OPTIONAL_PARENT_DEV);
+}
+
static int devlink_nl_inst_single_dumpit(struct sk_buff *msg,
struct netlink_callback *cb, int flags,
devlink_nl_dump_one_func_t *dump_one,
diff --git a/net/devlink/netlink_gen.c b/net/devlink/netlink_gen.c
index eb35e80e01d1..999bcc2b4a44 100644
--- a/net/devlink/netlink_gen.c
+++ b/net/devlink/netlink_gen.c
@@ -44,6 +44,12 @@ devlink_attr_param_type_validate(const struct nlattr *attr,
}
/* Common nested types */
+const struct nla_policy devlink_dl_parent_dev_nl_policy[DEVLINK_ATTR_INDEX + 1] = {
+ [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
+ [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
+ [DEVLINK_ATTR_INDEX] = NLA_POLICY_FULL_RANGE(NLA_UINT, &devlink_attr_index_range),
+};
+
const struct nla_policy devlink_dl_port_function_nl_policy[DEVLINK_PORT_FN_ATTR_CAPS + 1] = {
[DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR] = { .type = NLA_BINARY, },
[DEVLINK_PORT_FN_ATTR_STATE] = NLA_POLICY_MAX(NLA_U8, 1),
@@ -597,7 +603,7 @@ static const struct nla_policy devlink_rate_get_dump_nl_policy[DEVLINK_ATTR_INDE
};
/* DEVLINK_CMD_RATE_SET - do */
-static const struct nla_policy devlink_rate_set_nl_policy[DEVLINK_ATTR_INDEX + 1] = {
+static const struct nla_policy devlink_rate_set_nl_policy[DEVLINK_ATTR_PARENT_DEV + 1] = {
[DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_INDEX] = NLA_POLICY_FULL_RANGE(NLA_UINT, &devlink_attr_index_range),
@@ -608,10 +614,11 @@ static const struct nla_policy devlink_rate_set_nl_policy[DEVLINK_ATTR_INDEX + 1
[DEVLINK_ATTR_RATE_TX_WEIGHT] = { .type = NLA_U32, },
[DEVLINK_ATTR_RATE_PARENT_NODE_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_RATE_TC_BWS] = NLA_POLICY_NESTED(devlink_dl_rate_tc_bws_nl_policy),
+ [DEVLINK_ATTR_PARENT_DEV] = NLA_POLICY_NESTED(devlink_dl_parent_dev_nl_policy),
};
/* DEVLINK_CMD_RATE_NEW - do */
-static const struct nla_policy devlink_rate_new_nl_policy[DEVLINK_ATTR_INDEX + 1] = {
+static const struct nla_policy devlink_rate_new_nl_policy[DEVLINK_ATTR_PARENT_DEV + 1] = {
[DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_INDEX] = NLA_POLICY_FULL_RANGE(NLA_UINT, &devlink_attr_index_range),
@@ -622,6 +629,7 @@ static const struct nla_policy devlink_rate_new_nl_policy[DEVLINK_ATTR_INDEX + 1
[DEVLINK_ATTR_RATE_TX_WEIGHT] = { .type = NLA_U32, },
[DEVLINK_ATTR_RATE_PARENT_NODE_NAME] = { .type = NLA_NUL_STRING, },
[DEVLINK_ATTR_RATE_TC_BWS] = NLA_POLICY_NESTED(devlink_dl_rate_tc_bws_nl_policy),
+ [DEVLINK_ATTR_PARENT_DEV] = NLA_POLICY_NESTED(devlink_dl_parent_dev_nl_policy),
};
/* DEVLINK_CMD_RATE_DEL - do */
@@ -1272,21 +1280,21 @@ const struct genl_split_ops devlink_nl_ops[74] = {
{
.cmd = DEVLINK_CMD_RATE_SET,
.validate = GENL_DONT_VALIDATE_STRICT,
- .pre_doit = devlink_nl_pre_doit,
+ .pre_doit = devlink_nl_pre_doit_parent_dev_optional,
.doit = devlink_nl_rate_set_doit,
- .post_doit = devlink_nl_post_doit,
+ .post_doit = devlink_nl_post_doit_parent_dev_optional,
.policy = devlink_rate_set_nl_policy,
- .maxattr = DEVLINK_ATTR_INDEX,
+ .maxattr = DEVLINK_ATTR_PARENT_DEV,
.flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
},
{
.cmd = DEVLINK_CMD_RATE_NEW,
.validate = GENL_DONT_VALIDATE_STRICT,
- .pre_doit = devlink_nl_pre_doit,
+ .pre_doit = devlink_nl_pre_doit_parent_dev_optional,
.doit = devlink_nl_rate_new_doit,
- .post_doit = devlink_nl_post_doit,
+ .post_doit = devlink_nl_post_doit_parent_dev_optional,
.policy = devlink_rate_new_nl_policy,
- .maxattr = DEVLINK_ATTR_INDEX,
+ .maxattr = DEVLINK_ATTR_PARENT_DEV,
.flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
},
{
diff --git a/net/devlink/netlink_gen.h b/net/devlink/netlink_gen.h
index 2817d53a0eba..e16615aaa03f 100644
--- a/net/devlink/netlink_gen.h
+++ b/net/devlink/netlink_gen.h
@@ -13,6 +13,7 @@
#include <uapi/linux/devlink.h>
/* Common nested types */
+extern const struct nla_policy devlink_dl_parent_dev_nl_policy[DEVLINK_ATTR_INDEX + 1];
extern const struct nla_policy devlink_dl_port_function_nl_policy[DEVLINK_PORT_FN_ATTR_CAPS + 1];
extern const struct nla_policy devlink_dl_rate_tc_bws_nl_policy[DEVLINK_RATE_TC_ATTR_BW + 1];
extern const struct nla_policy devlink_dl_selftest_id_nl_policy[DEVLINK_ATTR_SELFTEST_ID_FLASH + 1];
@@ -29,12 +30,19 @@ int devlink_nl_pre_doit_dev_lock(const struct genl_split_ops *ops,
int devlink_nl_pre_doit_port_optional(const struct genl_split_ops *ops,
struct sk_buff *skb,
struct genl_info *info);
+int devlink_nl_pre_doit_parent_dev_optional(const struct genl_split_ops *ops,
+ struct sk_buff *skb,
+ struct genl_info *info);
void
devlink_nl_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb,
struct genl_info *info);
void
devlink_nl_post_doit_dev_lock(const struct genl_split_ops *ops,
struct sk_buff *skb, struct genl_info *info);
+void
+devlink_nl_post_doit_parent_dev_optional(const struct genl_split_ops *ops,
+ struct sk_buff *skb,
+ struct genl_info *info);
int devlink_nl_get_doit(struct sk_buff *skb, struct genl_info *info);
int devlink_nl_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb);
diff --git a/net/devlink/rate.c b/net/devlink/rate.c
index 9ebbc72130c6..1949746fab29 100644
--- a/net/devlink/rate.c
+++ b/net/devlink/rate.c
@@ -655,9 +655,11 @@ int devlink_nl_rate_set_doit(struct sk_buff *skb, struct genl_info *info)
int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
{
- struct devlink *rate_devlink, *devlink = devlink_nl_ctx(info)->devlink;
+ struct devlink_nl_ctx *ctx = devlink_nl_ctx(info);
+ struct devlink *devlink = ctx->devlink;
struct devlink_rate *rate_node;
const struct devlink_ops *ops;
+ struct devlink *rate_devlink;
int err;
ops = devlink->ops;
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 05/14] devlink: Add parent dev to devlink API
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Upcoming changes to the rate commands need the parent devlink specified.
This change adds a nested 'parent-dev' attribute to the API and helpers
to obtain and put a reference to the parent devlink instance in
info->ctx.
To avoid deadlocks, the parent devlink is unlocked before obtaining the
main devlink instance that is the target of the request.
A reference to the parent is kept until the end of the request to avoid
it suddenly disappearing.
This means that this reference is of limited use without additional
protection.
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
Documentation/netlink/specs/devlink.yaml | 14 +++++++++
include/uapi/linux/devlink.h | 2 ++
net/devlink/devl_internal.h | 3 ++
net/devlink/netlink.c | 36 ++++++++++++++++++++----
4 files changed, 50 insertions(+), 5 deletions(-)
diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml
index b495d56b9137..43cc0abf7235 100644
--- a/Documentation/netlink/specs/devlink.yaml
+++ b/Documentation/netlink/specs/devlink.yaml
@@ -873,6 +873,10 @@ attribute-sets:
doc: Unique devlink instance index.
checks:
max: u32-max
+ -
+ name: parent-dev
+ type: nest
+ nested-attributes: dl-parent-dev
-
name: dl-dev-stats
subset-of: devlink
@@ -1295,6 +1299,16 @@ attribute-sets:
Specifies the bandwidth share assigned to the Traffic Class.
The bandwidth for the traffic class is determined
in proportion to the sum of the shares of all configured classes.
+ -
+ name: dl-parent-dev
+ subset-of: devlink
+ attributes:
+ -
+ name: bus-name
+ -
+ name: dev-name
+ -
+ name: index
operations:
enum-model: directional
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index 7de2d8cc862f..01b7a4fcfedd 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -646,6 +646,8 @@ enum devlink_attr {
DEVLINK_ATTR_INDEX, /* uint */
+ DEVLINK_ATTR_PARENT_DEV, /* nested */
+
/* Add new attributes above here, update the spec in
* Documentation/netlink/specs/devlink.yaml and re-generate
* net/devlink/netlink_gen.c.
diff --git a/net/devlink/devl_internal.h b/net/devlink/devl_internal.h
index 1af445f044e5..414b3d8f70a5 100644
--- a/net/devlink/devl_internal.h
+++ b/net/devlink/devl_internal.h
@@ -153,6 +153,7 @@ int devlink_rel_devlink_handle_put(struct sk_buff *msg, struct devlink *devlink,
struct devlink_nl_ctx {
struct devlink *devlink;
struct devlink_port *devlink_port;
+ struct devlink *parent_devlink;
};
static inline struct devlink_nl_ctx *
@@ -191,6 +192,8 @@ typedef int devlink_nl_dump_one_func_t(struct sk_buff *msg,
struct devlink *
devlink_get_from_attrs_lock(struct net *net, struct nlattr **attrs,
bool dev_lock);
+struct devlink *
+devlink_get_parent_from_attrs_lock(struct net *net, struct nlattr **attrs);
int devlink_nl_dumpit(struct sk_buff *msg, struct netlink_callback *cb,
devlink_nl_dump_one_func_t *dump_one);
diff --git a/net/devlink/netlink.c b/net/devlink/netlink.c
index 5624cf71592f..21a34e4d2a49 100644
--- a/net/devlink/netlink.c
+++ b/net/devlink/netlink.c
@@ -12,6 +12,7 @@
#define DEVLINK_NL_FLAG_NEED_PORT BIT(0)
#define DEVLINK_NL_FLAG_NEED_DEVLINK_OR_PORT BIT(1)
#define DEVLINK_NL_FLAG_NEED_DEV_LOCK BIT(2)
+#define DEVLINK_NL_FLAG_OPTIONAL_PARENT_DEV BIT(3)
static const struct genl_multicast_group devlink_nl_mcgrps[] = {
[DEVLINK_MCGRP_CONFIG] = { .name = DEVLINK_GENL_MCGRP_CONFIG_NAME },
@@ -239,19 +240,39 @@ devlink_get_from_attrs_lock(struct net *net, struct nlattr **attrs,
return ERR_PTR(-ENODEV);
}
+struct devlink *
+devlink_get_parent_from_attrs_lock(struct net *net, struct nlattr **attrs)
+{
+ return ERR_PTR(-EOPNOTSUPP);
+}
+
static int __devlink_nl_pre_doit(struct sk_buff *skb, struct genl_info *info,
u8 flags)
{
+ bool parent_dev = flags & DEVLINK_NL_FLAG_OPTIONAL_PARENT_DEV;
bool dev_lock = flags & DEVLINK_NL_FLAG_NEED_DEV_LOCK;
+ struct devlink *devlink, *parent_devlink = NULL;
+ struct net *net = genl_info_net(info);
+ struct nlattr **attrs = info->attrs;
struct devlink_port *devlink_port;
- struct devlink *devlink;
int err;
- devlink = devlink_get_from_attrs_lock(genl_info_net(info), info->attrs,
- dev_lock);
- if (IS_ERR(devlink))
- return PTR_ERR(devlink);
+ if (parent_dev && attrs[DEVLINK_ATTR_PARENT_DEV]) {
+ parent_devlink = devlink_get_parent_from_attrs_lock(net, attrs);
+ if (IS_ERR(parent_devlink))
+ return PTR_ERR(parent_devlink);
+ devlink_nl_ctx(info)->parent_devlink = parent_devlink;
+ /* Drop the parent devlink lock but don't release the reference.
+ * This will keep it alive until the end of the request.
+ */
+ devl_unlock(parent_devlink);
+ }
+ devlink = devlink_get_from_attrs_lock(net, attrs, dev_lock);
+ if (IS_ERR(devlink)) {
+ err = PTR_ERR(devlink);
+ goto parent_put;
+ }
devlink_nl_ctx(info)->devlink = devlink;
if (flags & DEVLINK_NL_FLAG_NEED_PORT) {
devlink_port = devlink_port_get_from_info(devlink, info);
@@ -270,6 +291,9 @@ static int __devlink_nl_pre_doit(struct sk_buff *skb, struct genl_info *info,
unlock:
devl_dev_unlock(devlink, dev_lock);
devlink_put(devlink);
+parent_put:
+ if (parent_dev && parent_devlink)
+ devlink_put(parent_devlink);
return err;
}
@@ -307,6 +331,8 @@ static void __devlink_nl_post_doit(struct sk_buff *skb, struct genl_info *info,
devlink = devlink_nl_ctx(info)->devlink;
devl_dev_unlock(devlink, dev_lock);
devlink_put(devlink);
+ if (devlink_nl_ctx(info)->parent_devlink)
+ devlink_put(devlink_nl_ctx(info)->parent_devlink);
}
void devlink_nl_post_doit(const struct genl_split_ops *ops,
--
2.44.0
^ permalink raw reply related
* [PATCH net-next V9 04/14] devlink: Decouple rate storage from associated devlink object
From: Tariq Toukan @ 2026-03-26 6:59 UTC (permalink / raw)
To: Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn,
David S. Miller
Cc: Donald Hunter, Simon Horman, Jiri Pirko, Jonathan Corbet,
Shuah Khan, Saeed Mahameed, Leon Romanovsky, Tariq Toukan,
Mark Bloch, Shuah Khan, Chuck Lever, Matthieu Baerts (NGI0),
Carolina Jubran, Cosmin Ratiu, Dragos Tatulea, Jacob Keller,
Shahar Shitrit, Daniel Zahka, Parav Pandit, Adithya Jayachandran,
Kees Cook, Shay Drori, Daniel Jurgens, Moshe Shemesh,
Willem de Bruijn, David Wei, Petr Machata, Stanislav Fomichev,
Daniel Borkmann, Joe Damato, Nikolay Aleksandrov, Vadim Fedorenko,
Michael S. Tsirkin, Antonio Quartulli, Allison Henderson,
Bui Quang Minh, Nimrod Oren, netdev, linux-kernel, linux-doc,
linux-rdma, linux-kselftest, Gal Pressman, Jiri Pirko
In-Reply-To: <20260326065949.44058-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Devlink rate leafs and nodes were stored in their respective devlink
objects pointed to by devlink_rate->devlink.
This patch removes that association by introducing the concept of
'rate node devlink', which is where all rates that could link to each
other are stored. For now this is the same as devlink_rate->devlink.
After this patch, the devlink rates stored in this devlink instance
could potentially be from multiple other devlink instances. So all rate
node manipulation code was updated to:
- correctly compare the actual devlink object during iteration.
- maybe acquire additional locks (noop for now).
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
net/devlink/rate.c | 196 +++++++++++++++++++++++++++++++++------------
1 file changed, 144 insertions(+), 52 deletions(-)
diff --git a/net/devlink/rate.c b/net/devlink/rate.c
index 478142910919..9ebbc72130c6 100644
--- a/net/devlink/rate.c
+++ b/net/devlink/rate.c
@@ -30,13 +30,31 @@ devlink_rate_leaf_get_from_info(struct devlink *devlink, struct genl_info *info)
return devlink_rate ?: ERR_PTR(-ENODEV);
}
+static struct devlink *devl_rate_lock(struct devlink *devlink)
+{
+ return devlink;
+}
+
+static struct devlink *
+devl_get_rate_node_instance_locked(struct devlink *devlink)
+{
+ return devlink;
+}
+
+static void devl_rate_unlock(struct devlink *devlink)
+{
+}
+
static struct devlink_rate *
devlink_rate_node_get_by_name(struct devlink *devlink, const char *node_name)
{
struct devlink_rate *devlink_rate;
+ struct devlink *rate_devlink;
- list_for_each_entry(devlink_rate, &devlink->rate_list, list) {
- if (devlink_rate_is_node(devlink_rate) &&
+ rate_devlink = devl_get_rate_node_instance_locked(devlink);
+ list_for_each_entry(devlink_rate, &rate_devlink->rate_list, list) {
+ if (devlink_rate->devlink == devlink &&
+ devlink_rate_is_node(devlink_rate) &&
!strcmp(node_name, devlink_rate->name))
return devlink_rate;
}
@@ -190,17 +208,25 @@ static void devlink_rate_notify(struct devlink_rate *devlink_rate,
void devlink_rates_notify_register(struct devlink *devlink)
{
struct devlink_rate *rate_node;
+ struct devlink *rate_devlink;
- list_for_each_entry(rate_node, &devlink->rate_list, list)
- devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_NEW);
+ rate_devlink = devl_rate_lock(devlink);
+ list_for_each_entry(rate_node, &rate_devlink->rate_list, list)
+ if (rate_node->devlink == devlink)
+ devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_NEW);
+ devl_rate_unlock(devlink);
}
void devlink_rates_notify_unregister(struct devlink *devlink)
{
struct devlink_rate *rate_node;
+ struct devlink *rate_devlink;
- list_for_each_entry_reverse(rate_node, &devlink->rate_list, list)
- devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_DEL);
+ rate_devlink = devl_rate_lock(devlink);
+ list_for_each_entry_reverse(rate_node, &rate_devlink->rate_list, list)
+ if (rate_node->devlink == devlink)
+ devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_DEL);
+ devl_rate_unlock(devlink);
}
static int
@@ -209,17 +235,20 @@ devlink_nl_rate_get_dump_one(struct sk_buff *msg, struct devlink *devlink,
{
struct devlink_nl_dump_state *state = devlink_dump_state(cb);
struct devlink_rate *devlink_rate;
+ struct devlink *rate_devlink;
int idx = 0;
int err = 0;
- list_for_each_entry(devlink_rate, &devlink->rate_list, list) {
+ rate_devlink = devl_rate_lock(devlink);
+ list_for_each_entry(devlink_rate, &rate_devlink->rate_list, list) {
enum devlink_command cmd = DEVLINK_CMD_RATE_NEW;
u32 id = NETLINK_CB(cb->skb).portid;
- if (idx < state->idx) {
+ if (idx < state->idx || devlink_rate->devlink != devlink) {
idx++;
continue;
}
+
err = devlink_nl_rate_fill(msg, devlink_rate, cmd, id,
cb->nlh->nlmsg_seq, flags, NULL);
if (err) {
@@ -228,6 +257,7 @@ devlink_nl_rate_get_dump_one(struct sk_buff *msg, struct devlink *devlink,
}
idx++;
}
+ devl_rate_unlock(devlink);
return err;
}
@@ -244,23 +274,33 @@ int devlink_nl_rate_get_doit(struct sk_buff *skb, struct genl_info *info)
struct sk_buff *msg;
int err;
+ devl_rate_lock(devlink);
devlink_rate = devlink_rate_get_from_info(devlink, info);
- if (IS_ERR(devlink_rate))
- return PTR_ERR(devlink_rate);
+ if (IS_ERR(devlink_rate)) {
+ err = PTR_ERR(devlink_rate);
+ goto unlock;
+ }
msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
- if (!msg)
- return -ENOMEM;
+ if (!msg) {
+ err = -ENOMEM;
+ goto unlock;
+ }
err = devlink_nl_rate_fill(msg, devlink_rate, DEVLINK_CMD_RATE_NEW,
info->snd_portid, info->snd_seq, 0,
info->extack);
- if (err) {
- nlmsg_free(msg);
- return err;
- }
+ if (err)
+ goto err_fill;
+ devl_rate_unlock(devlink);
return genlmsg_reply(msg, info);
+
+err_fill:
+ nlmsg_free(msg);
+unlock:
+ devl_rate_unlock(devlink);
+ return err;
}
static bool
@@ -590,24 +630,32 @@ int devlink_nl_rate_set_doit(struct sk_buff *skb, struct genl_info *info)
const struct devlink_ops *ops;
int err;
+ devl_rate_lock(devlink);
devlink_rate = devlink_rate_get_from_info(devlink, info);
- if (IS_ERR(devlink_rate))
- return PTR_ERR(devlink_rate);
+ if (IS_ERR(devlink_rate)) {
+ err = PTR_ERR(devlink_rate);
+ goto unlock;
+ }
ops = devlink->ops;
- if (!ops || !devlink_rate_set_ops_supported(ops, info, devlink_rate->type))
- return -EOPNOTSUPP;
+ if (!ops ||
+ !devlink_rate_set_ops_supported(ops, info, devlink_rate->type)) {
+ err = -EOPNOTSUPP;
+ goto unlock;
+ }
err = devlink_nl_rate_set(devlink_rate, ops, info);
if (!err)
devlink_rate_notify(devlink_rate, DEVLINK_CMD_RATE_NEW);
+unlock:
+ devl_rate_unlock(devlink);
return err;
}
int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
{
- struct devlink *devlink = devlink_nl_ctx(info)->devlink;
+ struct devlink *rate_devlink, *devlink = devlink_nl_ctx(info)->devlink;
struct devlink_rate *rate_node;
const struct devlink_ops *ops;
int err;
@@ -621,15 +669,21 @@ int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
if (!devlink_rate_set_ops_supported(ops, info, DEVLINK_RATE_TYPE_NODE))
return -EOPNOTSUPP;
+ rate_devlink = devl_rate_lock(devlink);
rate_node = devlink_rate_node_get_from_attrs(devlink, info->attrs);
- if (!IS_ERR(rate_node))
- return -EEXIST;
- else if (rate_node == ERR_PTR(-EINVAL))
- return -EINVAL;
+ if (!IS_ERR(rate_node)) {
+ err = -EEXIST;
+ goto unlock;
+ } else if (rate_node == ERR_PTR(-EINVAL)) {
+ err = -EINVAL;
+ goto unlock;
+ }
rate_node = kzalloc_obj(*rate_node);
- if (!rate_node)
- return -ENOMEM;
+ if (!rate_node) {
+ err = -ENOMEM;
+ goto unlock;
+ }
rate_node->devlink = devlink;
rate_node->type = DEVLINK_RATE_TYPE_NODE;
@@ -648,8 +702,9 @@ int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
goto err_rate_set;
refcount_set(&rate_node->refcnt, 1);
- list_add(&rate_node->list, &devlink->rate_list);
+ list_add(&rate_node->list, &rate_devlink->rate_list);
devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_NEW);
+ devl_rate_unlock(devlink);
return 0;
err_rate_set:
@@ -658,6 +713,8 @@ int devlink_nl_rate_new_doit(struct sk_buff *skb, struct genl_info *info)
kfree(rate_node->name);
err_strdup:
kfree(rate_node);
+unlock:
+ devl_rate_unlock(devlink);
return err;
}
@@ -667,13 +724,17 @@ int devlink_nl_rate_del_doit(struct sk_buff *skb, struct genl_info *info)
struct devlink_rate *rate_node;
int err;
+ devl_rate_lock(devlink);
rate_node = devlink_rate_node_get_from_info(devlink, info);
- if (IS_ERR(rate_node))
- return PTR_ERR(rate_node);
+ if (IS_ERR(rate_node)) {
+ err = PTR_ERR(rate_node);
+ goto unlock;
+ }
if (refcount_read(&rate_node->refcnt) > 1) {
NL_SET_ERR_MSG(info->extack, "Node has children. Cannot delete node.");
- return -EBUSY;
+ err = -EBUSY;
+ goto unlock;
}
devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_DEL);
@@ -684,6 +745,8 @@ int devlink_nl_rate_del_doit(struct sk_buff *skb, struct genl_info *info)
list_del(&rate_node->list);
kfree(rate_node->name);
kfree(rate_node);
+unlock:
+ devl_rate_unlock(devlink);
return err;
}
@@ -692,14 +755,20 @@ int devlink_rates_check(struct devlink *devlink,
struct netlink_ext_ack *extack)
{
struct devlink_rate *devlink_rate;
+ struct devlink *rate_devlink;
+ int err = 0;
- list_for_each_entry(devlink_rate, &devlink->rate_list, list)
- if (!rate_filter || rate_filter(devlink_rate)) {
+ rate_devlink = devl_rate_lock(devlink);
+ list_for_each_entry(devlink_rate, &rate_devlink->rate_list, list)
+ if (devlink_rate->devlink == devlink &&
+ (!rate_filter || rate_filter(devlink_rate))) {
if (extack)
NL_SET_ERR_MSG(extack, "Rate node(s) exists.");
- return -EBUSY;
+ err = -EBUSY;
+ break;
}
- return 0;
+ devl_rate_unlock(devlink);
+ return err;
}
/**
@@ -716,14 +785,20 @@ devl_rate_node_create(struct devlink *devlink, void *priv, char *node_name,
struct devlink_rate *parent)
{
struct devlink_rate *rate_node;
+ struct devlink *rate_devlink;
+ rate_devlink = devl_rate_lock(devlink);
rate_node = devlink_rate_node_get_by_name(devlink, node_name);
- if (!IS_ERR(rate_node))
- return ERR_PTR(-EEXIST);
+ if (!IS_ERR(rate_node)) {
+ rate_node = ERR_PTR(-EEXIST);
+ goto unlock;
+ }
rate_node = kzalloc_obj(*rate_node);
- if (!rate_node)
- return ERR_PTR(-ENOMEM);
+ if (!rate_node) {
+ rate_node = ERR_PTR(-ENOMEM);
+ goto unlock;
+ }
if (parent) {
rate_node->parent = parent;
@@ -737,12 +812,15 @@ devl_rate_node_create(struct devlink *devlink, void *priv, char *node_name,
rate_node->name = kstrdup(node_name, GFP_KERNEL);
if (!rate_node->name) {
kfree(rate_node);
- return ERR_PTR(-ENOMEM);
+ rate_node = ERR_PTR(-ENOMEM);
+ goto unlock;
}
refcount_set(&rate_node->refcnt, 1);
- list_add(&rate_node->list, &devlink->rate_list);
+ list_add(&rate_node->list, &rate_devlink->rate_list);
devlink_rate_notify(rate_node, DEVLINK_CMD_RATE_NEW);
+unlock:
+ devl_rate_unlock(devlink);
return rate_node;
}
EXPORT_SYMBOL_GPL(devl_rate_node_create);
@@ -758,10 +836,10 @@ EXPORT_SYMBOL_GPL(devl_rate_node_create);
int devl_rate_leaf_create(struct devlink_port *devlink_port, void *priv,
struct devlink_rate *parent)
{
- struct devlink *devlink = devlink_port->devlink;
+ struct devlink *rate_devlink, *devlink = devlink_port->devlink;
struct devlink_rate *devlink_rate;
- devl_assert_locked(devlink_port->devlink);
+ devl_assert_locked(devlink);
if (WARN_ON(devlink_port->devlink_rate))
return -EBUSY;
@@ -770,6 +848,7 @@ int devl_rate_leaf_create(struct devlink_port *devlink_port, void *priv,
if (!devlink_rate)
return -ENOMEM;
+ rate_devlink = devl_rate_lock(devlink);
if (parent) {
devlink_rate->parent = parent;
refcount_inc(&devlink_rate->parent->refcnt);
@@ -779,9 +858,10 @@ int devl_rate_leaf_create(struct devlink_port *devlink_port, void *priv,
devlink_rate->devlink = devlink;
devlink_rate->devlink_port = devlink_port;
devlink_rate->priv = priv;
- list_add_tail(&devlink_rate->list, &devlink->rate_list);
+ list_add_tail(&devlink_rate->list, &rate_devlink->rate_list);
devlink_port->devlink_rate = devlink_rate;
devlink_rate_notify(devlink_rate, DEVLINK_CMD_RATE_NEW);
+ devl_rate_unlock(devlink);
return 0;
}
@@ -797,16 +877,19 @@ EXPORT_SYMBOL_GPL(devl_rate_leaf_create);
void devl_rate_leaf_destroy(struct devlink_port *devlink_port)
{
struct devlink_rate *devlink_rate = devlink_port->devlink_rate;
+ struct devlink *devlink = devlink_port->devlink;
- devl_assert_locked(devlink_port->devlink);
+ devl_assert_locked(devlink);
if (!devlink_rate)
return;
+ devl_rate_lock(devlink);
devlink_rate_notify(devlink_rate, DEVLINK_CMD_RATE_DEL);
if (devlink_rate->parent)
refcount_dec(&devlink_rate->parent->refcnt);
list_del(&devlink_rate->list);
devlink_port->devlink_rate = NULL;
+ devl_rate_unlock(devlink);
kfree(devlink_rate);
}
EXPORT_SYMBOL_GPL(devl_rate_leaf_destroy);
@@ -815,20 +898,25 @@ EXPORT_SYMBOL_GPL(devl_rate_leaf_destroy);
* devl_rate_nodes_destroy - destroy all devlink rate nodes on device
* @devlink: devlink instance
*
- * Unset parent for all rate objects and destroy all rate nodes
- * on specified device.
+ * Unset parent for all rate objects involving this device and destroy all rate
+ * nodes on it.
*/
void devl_rate_nodes_destroy(struct devlink *devlink)
{
- const struct devlink_ops *ops = devlink->ops;
struct devlink_rate *devlink_rate, *tmp;
+ const struct devlink_ops *ops;
+ struct devlink *rate_devlink;
devl_assert_locked(devlink);
+ rate_devlink = devl_rate_lock(devlink);
- list_for_each_entry(devlink_rate, &devlink->rate_list, list) {
- if (!devlink_rate->parent)
+ list_for_each_entry(devlink_rate, &rate_devlink->rate_list, list) {
+ if (!devlink_rate->parent ||
+ (devlink_rate->devlink != devlink &&
+ devlink_rate->parent->devlink != devlink))
continue;
+ ops = devlink_rate->devlink->ops;
if (devlink_rate_is_leaf(devlink_rate))
ops->rate_leaf_parent_set(devlink_rate, NULL, devlink_rate->priv,
NULL, NULL);
@@ -839,13 +927,17 @@ void devl_rate_nodes_destroy(struct devlink *devlink)
refcount_dec(&devlink_rate->parent->refcnt);
devlink_rate->parent = NULL;
}
- list_for_each_entry_safe(devlink_rate, tmp, &devlink->rate_list, list) {
- if (devlink_rate_is_node(devlink_rate)) {
+ ops = devlink->ops;
+ list_for_each_entry_safe(devlink_rate, tmp, &rate_devlink->rate_list,
+ list) {
+ if (devlink_rate->devlink == devlink &&
+ devlink_rate_is_node(devlink_rate)) {
ops->rate_node_del(devlink_rate, devlink_rate->priv, NULL);
list_del(&devlink_rate->list);
kfree(devlink_rate->name);
kfree(devlink_rate);
}
}
+ devl_rate_unlock(devlink);
}
EXPORT_SYMBOL_GPL(devl_rate_nodes_destroy);
--
2.44.0
^ permalink raw reply related
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