* [PATCH v2] docs: Remove stale ISDN parameters
From: Costa Shulyupin @ 2026-05-02 12:02 UTC (permalink / raw)
To: Jakub Kicinski, Jonathan Corbet, Shuah Khan, Randy Dunlap,
linux-doc, linux-kernel
Cc: Costa Shulyupin
The icn= and pcbit= parameters referenced drivers removed in
commit 02bbd9802da7 ("staging: i4l: delete the whole thing").
Remove the stale parameter entries and the now-unused ISDN tag
from the legend.
Suggested-by: Randy Dunlap <rdunlap@infradead.org>
Assisted-by: Claude:claude-opus-4-6
---
v2: Remove pcbit= and ISDN too
Address comments of Randy Dunlap
V1: Remove icn=
Signed-off-by: Costa Shulyupin <costa.shul@redhat.com>
---
Documentation/admin-guide/kernel-parameters.txt | 6 ------
1 file changed, 6 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index c13c354728bb..96c189e5f5bf 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -24,7 +24,6 @@
IP_PNP IP DHCP, BOOTP, or RARP is enabled.
IPV6 IPv6 support is enabled.
ISAPNP ISA PnP code is enabled.
- ISDN Appropriate ISDN support is enabled.
ISOL CPU Isolation is enabled.
JOY Appropriate joystick support is enabled.
KGDB Kernel debugger support is enabled.
@@ -2245,9 +2244,6 @@ Kernel parameters
syscalls, essentially overriding IA32_EMULATION_DEFAULT_DISABLED at
boot time. When false, unconditionally disables IA32 emulation.
- icn= [HW,ISDN]
- Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]]
-
idle= [X86,EARLY]
Format: idle=poll, idle=halt, idle=nomwait
@@ -5037,8 +5033,6 @@ Kernel parameters
the specified number of seconds. This is to be used if
your oopses keep scrolling off the screen.
- pcbit= [HW,ISDN]
-
pci=option[,option...] [PCI,EARLY] various PCI subsystem options.
Some options herein operate on a specific device
--
2.53.0
^ permalink raw reply related
* Re: [PATCH] Documentation: Fix duplicated words
From: Björn Persson @ 2026-05-02 12:01 UTC (permalink / raw)
To: Wang Zihan
Cc: davem, edumazet, kuba, pabeni, horms, corbet, skhan, mchehab,
richard, anton.ivanov, johannes, linux-kernel, netdev, linux-doc,
linux-media, linux-um
In-Reply-To: <tencent_B1D6CBBF95486E31D04C2E1B92F5E605A307@qq.com>
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Wang Zihan wrote:
> you can always run UML under gdb and there will be a whole section
> -later on on how to do that. That, however, is not the only way to
> +later on how to do that. That, however, is not the only way to
"Later on" is an established English expression. A plain "later" also
works. This isn't a correction of an error; it's a stylistic change.
Björn Persson
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^ permalink raw reply
* htmldocs: Documentation/gpu/nova/core/intr-ctrl.rst:88: WARNING: Inline substitution_reference start-string without end-string. [docutils]
From: kernel test robot @ 2026-05-02 11:59 UTC (permalink / raw)
To: Joel Fernandes; +Cc: oe-kbuild-all, 0day robot, linux-doc
tree: https://github.com/intel-lab-lkp/linux/commits/Joel-Fernandes/rust-sync-completion-add-wait_for_completion_timeout/20260502-113009
head: 4e10e05ecde578bc23419ce04c62d82020b21d1a
commit: 4e10e05ecde578bc23419ce04c62d82020b21d1a gpu: nova-core: document INTR_CTRL interrupt tree
date: 8 hours ago
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
docutils: docutils (Docutils 0.21.2, Python 3.13.5, on linux)
reproduce: (https://download.01.org/0day-ci/archive/20260502/202605021358.ldpuPGZI-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202605021358.ldpuPGZI-lkp@intel.com/
All warnings (new ones prefixed by >>):
Examples
~~~~~~~~ [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:110: ERROR: Unexpected indentation. [docutils]
>> Documentation/gpu/nova/core/intr-ctrl.rst:88: WARNING: Inline substitution_reference start-string without end-string. [docutils]
>> Documentation/gpu/nova/core/intr-ctrl.rst:111: WARNING: Line block ends without a blank line. [docutils]
>> Documentation/gpu/nova/core/intr-ctrl.rst:112: WARNING: Block quote ends without a blank line; unexpected unindent. [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:121: ERROR: Unexpected indentation. [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:117: ERROR: Unexpected indentation. [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:120: WARNING: Block quote ends without a blank line; unexpected unindent. [docutils]
>> Documentation/gpu/nova/core/intr-ctrl.rst:121: WARNING: Blank line required after table. [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:122: WARNING: Line block ends without a blank line. [docutils]
Documentation/gpu/nova/core/intr-ctrl.rst:123: WARNING: Block quote ends without a blank line; unexpected unindent. [docutils]
Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.c:27: ERROR: Unexpected section title.
vim +88 Documentation/gpu/nova/core/intr-ctrl.rst
86
87 It roughly looks like the following::
> 88 +--------------- Engine (CE, GR, NVDEC, ...) ---------------+
89 | |
90 | internal work completes |
91 | | |
92 | v |
93 | +-----------------------------------------+ |
94 | | INTR_CTRL(i): programmable register | |
95 | | (written once by GSP-RM at boot, | |
96 | | one such reg per engine) | |
97 | | | |
98 | | VECTOR = 200 (-> which leaf bit) | |
99 | | GFID = 0 (-> which function's | |
100 | | tree: 0=PF, N=VF) | |
101 | | CPU = 1 (-> copy to CPU tree?)| |
102 | | GSP = 0 (-> copy to GSP tree?)| |
103 | +--------------------+--------------------+ |
104 | | |
105 | engine builds | |
106 | interrupt ctrl | |
107 | command message | |
108 | (all2ctrl_intr_cmd) | |
109 +------------------------|----------------------------------+
110 |
> 111 v
> 112 +-----------------------------------------+
113 | Central INTR_CTRL block |
114 | |
115 | reads message; for the tree picked |
116 | by GFID, sets: |
117 | LEAF[ 200 / 32 ] = LEAF[6] |
118 | bit ( 200 % 32 ) = bit 8 |
119 | TOP subtree 3 = pending |
120 +--------------------+--------------------+
> 121 |
122 v
123 MSI to host (PF)
124
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* Re: [PATCH] Documentation: loongarch: Fix typo "eXtention" -> "Extension"
From: Björn Persson @ 2026-05-02 11:45 UTC (permalink / raw)
To: Wang Zihan
Cc: chenhuacai, kernel, alexs, si.yanteng, dzm91, corbet, skhan,
2023002089, linux-doc, linux-kernel, loongarch
In-Reply-To: <tencent_ADC4AD99CFC8EFB26D25889B11D4864B9B05@qq.com>
[-- Attachment #1: Type: text/plain, Size: 428 bytes --]
Wang Zihan wrote:
> -- 128位向量擴展LSX（全稱Loongson SIMD eXtention），
> -- 256位向量擴展LASX（全稱Loongson Advanced SIMD eXtention）。
> +- 128位向量擴展LSX（全稱Loongson SIMD Extension），
> +- 256位向量擴展LASX（全稱Loongson Advanced SIMD Extension）。
That's obviously done intentionally to highlight the X. Like it or
dislike it, but it's not a mistake.
Björn Persson
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^ permalink raw reply
* Re: [PATCH] Documentation: translations: Fix "Linux Torvalds" -> "Linus Torvalds"
From: Christian Kujau @ 2026-05-02 11:26 UTC (permalink / raw)
To: Wang Zihan
Cc: linux-doc, federico.vaga, corbet, skhan, carlos.bilbao,
avadhut.naik, linux-kernel, torvalds
In-Reply-To: <tencent_A111D365F88A0FF724E809970A094533B206@qq.com>
On Sat, 2 May 2026, Wang Zihan wrote:
> Fix the misspelling of Linus Torvalds' first name in Italian
> and Spanish translations.
Haha :-)
There's one more:
$ rg -l "Linux Torvalds"
Documentation/translations/sp_SP/process/2.Process.rst
Documentation/translations/it_IT/process/adding-syscalls.rst
Documentation/translations/it_IT/process/submitting-patches.rst
fs/ocfs2/namei.c
And that looks also wrong:
$ rg "Linu. Torvald "
Documentation/translations/it_IT/process/2.Process.rst
56:Al termine di questo periodo, Linus Torvald dichiarerà che la finestra è
Maybe include it into your patch, or add a [2/2] to it?
C.
--
BOFH excuse #394:
Jupiter is aligned with Mars.
^ permalink raw reply
* Re: [PATCH v2] net: switchdev: fix duplicate word in documentation
From: Björn Persson @ 2026-05-02 11:24 UTC (permalink / raw)
To: Wang Zihan; +Cc: netdev, linux-doc, kuba
In-Reply-To: <tencent_93F8CA2FB714A80C571AC978F39E51D6E506@qq.com>
[-- Attachment #1: Type: text/plain, Size: 879 bytes --]
Wang Zihan wrote:
> @@ -162,7 +162,7 @@ The switchdev driver can know a particular port's position in the topology by
> monitoring NETDEV_CHANGEUPPER notifications. For example, a port moved into a
> bond will see its upper master change. If that bond is moved into a bridge,
> the bond's upper master will change. And so on. The driver will track such
> -movements to know what position a port is in in the overall topology by
> +movements to know what position a port is in the overall topology by
> registering for netdevice events and acting on NETDEV_CHANGEUPPER.
>
> L2 Forwarding Offload
This change claims that a port is a position. The preceding sentences,
talking about "a particular port's position" and a port being moved,
make it clear that a port is *in* a position *in* the topology. The
port is not itself a position.
Björn Persson
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^ permalink raw reply
* [PATCH] Documentation: watchdog: Fix typo "oncse" -> "once"
From: Wang Zihan @ 2026-05-02 11:19 UTC (permalink / raw)
To: linux-watchdog
Cc: wim, linux, corbet, skhan, linux-doc, linux-kernel, Wang Zihan
Fix a typo in mlx-wdt.rst documentation.
Signed-off-by: Wang Zihan <3772548978@qq.com>
---
Documentation/watchdog/mlx-wdt.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/watchdog/mlx-wdt.rst b/Documentation/watchdog/mlx-wdt.rst
index 35e690dea..3778f85d1 100644
--- a/Documentation/watchdog/mlx-wdt.rst
+++ b/Documentation/watchdog/mlx-wdt.rst
@@ -48,7 +48,7 @@ which is optional.
Watchdog can be started during a probe, in this case it will be
pinged by watchdog core before watchdog device will be opened by
user space application.
-Watchdog can be initialised in nowayout way, i.e. oncse started
+Watchdog can be initialised in nowayout way, i.e. once started
it can't be stopped.
This mlx-wdt driver supports both HW watchdog implementations.
--
2.54.0
^ permalink raw reply related
* [PATCH] Documentation: Fix duplicated words
From: Wang Zihan @ 2026-05-02 11:19 UTC (permalink / raw)
To: netdev, linux-doc, linux-media, linux-um
Cc: davem, edumazet, kuba, pabeni, horms, corbet, skhan, mchehab,
richard, anton.ivanov, johannes, linux-kernel, Wang Zihan
Remove duplicated words in three documentation files:
- "in in" -> "in" (switchdev.rst)
- "The the" -> "The" (dmx-reqbufs.rst)
- "on on" -> "on" (user_mode_linux_howto_v2.rst)
Signed-off-by: Wang Zihan <3772548978@qq.com>
---
Documentation/networking/switchdev.rst | 2 +-
Documentation/userspace-api/media/dvb/dmx-reqbufs.rst | 2 +-
Documentation/virt/uml/user_mode_linux_howto_v2.rst | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/networking/switchdev.rst b/Documentation/networking/switchdev.rst
index 2966b7122..948bce44c 100644
--- a/Documentation/networking/switchdev.rst
+++ b/Documentation/networking/switchdev.rst
@@ -162,7 +162,7 @@ The switchdev driver can know a particular port's position in the topology by
monitoring NETDEV_CHANGEUPPER notifications. For example, a port moved into a
bond will see its upper master change. If that bond is moved into a bridge,
the bond's upper master will change. And so on. The driver will track such
-movements to know what position a port is in in the overall topology by
+movements to know what position a port is in the overall topology by
registering for netdevice events and acting on NETDEV_CHANGEUPPER.
L2 Forwarding Offload
diff --git a/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst b/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst
index d2bb1909e..18810f0bb 100644
--- a/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst
+++ b/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst
@@ -72,4 +72,4 @@ appropriately. The generic error codes are described at the
:ref:`Generic Error Codes <gen-errors>` chapter.
EOPNOTSUPP
- The the requested I/O method is not supported.
+ The requested I/O method is not supported.
diff --git a/Documentation/virt/uml/user_mode_linux_howto_v2.rst b/Documentation/virt/uml/user_mode_linux_howto_v2.rst
index c37e8e594..7b08738c3 100644
--- a/Documentation/virt/uml/user_mode_linux_howto_v2.rst
+++ b/Documentation/virt/uml/user_mode_linux_howto_v2.rst
@@ -1092,7 +1092,7 @@ be formatted as plain text.
Developing always goes hand in hand with debugging. First of all,
you can always run UML under gdb and there will be a whole section
-later on on how to do that. That, however, is not the only way to
+later on how to do that. That, however, is not the only way to
debug a Linux kernel. Quite often adding tracing statements and/or
using UML specific approaches such as ptracing the UML kernel process
are significantly more informative.
--
2.54.0
^ permalink raw reply related
* [PATCH] Documentation: translations: Fix "Linux Torvalds" -> "Linus Torvalds"
From: Wang Zihan @ 2026-05-02 11:19 UTC (permalink / raw)
To: linux-doc
Cc: federico.vaga, corbet, skhan, carlos.bilbao, avadhut.naik,
linux-kernel, Wang Zihan
Fix the misspelling of Linus Torvalds' first name in Italian
and Spanish translations.
Signed-off-by: Wang Zihan <3772548978@qq.com>
---
.../translations/it_IT/process/submitting-patches.rst | 2 +-
Documentation/translations/sp_SP/process/2.Process.rst | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/translations/it_IT/process/submitting-patches.rst b/Documentation/translations/it_IT/process/submitting-patches.rst
index 1cc480813..48ac4916d 100644
--- a/Documentation/translations/it_IT/process/submitting-patches.rst
+++ b/Documentation/translations/it_IT/process/submitting-patches.rst
@@ -280,7 +280,7 @@ https://subspace.kernel.org. Tuttavia, ci sono altre liste di discussione
ospitate altrove.
L'ultimo giudizio sull'integrazione delle modifiche accettate spetta a
-Linux Torvalds. Il suo indirizzo e-mail è <torvalds@linux-foundation.org>.
+Linus Torvalds. Il suo indirizzo e-mail è <torvalds@linux-foundation.org>.
Riceve moltissime e-mail, e, a questo punto, solo poche patch passano
direttamente attraverso il suo giudizio; quindi, dovreste fare del vostro
meglio per -evitare di- inviargli e-mail.
diff --git a/Documentation/translations/sp_SP/process/2.Process.rst b/Documentation/translations/sp_SP/process/2.Process.rst
index c21b0134c..9e26eb8c6 100644
--- a/Documentation/translations/sp_SP/process/2.Process.rst
+++ b/Documentation/translations/sp_SP/process/2.Process.rst
@@ -56,7 +56,7 @@ y montados con anticipación. Como funciona ese proceso se describirá en
detalle más adelante).
La ventana de fusión dura aproximadamente dos semanas. Al final de este
-tiempo, Linux Torvalds declarará que la ventana está cerrada y publicará
+tiempo, Linus Torvalds declarará que la ventana está cerrada y publicará
el primero de los kernels “rc”. Para el kernel destinado a ser 5.6, por
ejemplo, el lanzamiento al final de la ventana de fusión se llamará
5.6-rc1. El lanzamiento -rc1 señala que el tiempo para fusionar nuevas
@@ -202,7 +202,7 @@ Las etapas por las que pasa un parche son, generalmente:
para su revisión y fusión.
- Fusión en el mainline. Eventualmente, un parche exitoso se fusionará
- en el repositorio mainline administrado por Linux Torvalds. Mas
+ en el repositorio mainline administrado por Linus Torvalds. Mas
comentarios y/o problemas pueden surgir en este momento; es importante
que el desarrollador responda a estos y solucione cualquier problema
que surja.
--
2.54.0
^ permalink raw reply related
* [PATCH] Documentation: loongarch: Fix typo "eXtention" -> "Extension"
From: Wang Zihan @ 2026-05-02 11:19 UTC (permalink / raw)
To: loongarch
Cc: chenhuacai, kernel, alexs, si.yanteng, dzm91, corbet, skhan,
2023002089, linux-doc, linux-kernel, Wang Zihan
Fix the spelling of SIMD Extension in Chinese documentation
(both Simplified and Traditional).
Signed-off-by: Wang Zihan <3772548978@qq.com>
---
.../translations/zh_CN/arch/loongarch/introduction.rst | 4 ++--
.../translations/zh_TW/arch/loongarch/introduction.rst | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/translations/zh_CN/arch/loongarch/introduction.rst b/Documentation/translations/zh_CN/arch/loongarch/introduction.rst
index bf463c5a4..7cd88dfac 100644
--- a/Documentation/translations/zh_CN/arch/loongarch/introduction.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/introduction.rst
@@ -79,8 +79,8 @@ LA64中每个寄存器为64位宽。 ``$r0`` 的内容总是固定为0，而其
LoongArch现有两种向量扩展：
-- 128位向量扩展LSX（全称Loongson SIMD eXtention），
-- 256位向量扩展LASX（全称Loongson Advanced SIMD eXtention）。
+- 128位向量扩展LSX（全称Loongson SIMD Extension），
+- 256位向量扩展LASX（全称Loongson Advanced SIMD Extension）。
LSX使用 ``$v0`` ~ ``$v31`` 向量寄存器，而LASX则使用 ``$x0`` ~ ``$x31`` 。
diff --git a/Documentation/translations/zh_TW/arch/loongarch/introduction.rst b/Documentation/translations/zh_TW/arch/loongarch/introduction.rst
index a5603f9b0..9e4a96f1a 100644
--- a/Documentation/translations/zh_TW/arch/loongarch/introduction.rst
+++ b/Documentation/translations/zh_TW/arch/loongarch/introduction.rst
@@ -79,8 +79,8 @@ LA64中每個寄存器爲64位寬。 ``$r0`` 的內容總是固定爲0，而其
LoongArch現有兩種向量擴展：
-- 128位向量擴展LSX（全稱Loongson SIMD eXtention），
-- 256位向量擴展LASX（全稱Loongson Advanced SIMD eXtention）。
+- 128位向量擴展LSX（全稱Loongson SIMD Extension），
+- 256位向量擴展LASX（全稱Loongson Advanced SIMD Extension）。
LSX使用 ``$v0`` ~ ``$v31`` 向量寄存器，而LASX則使用 ``$x0`` ~ ``$x31`` 。
--
2.54.0
^ permalink raw reply related
* [PATCH v13 2/3] hwmon: ltc4283: Add support for the LTC4283 Swap Controller
From: Nuno Sá via B4 Relay @ 2026-05-02 9:56 UTC (permalink / raw)
To: linux-gpio, linux-hwmon, devicetree, linux-doc
Cc: Guenter Roeck, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski
In-Reply-To: <20260502-ltc4283-support-v13-0-1c206542e652@analog.com>
From: Nuno Sá <nuno.sa@analog.com>
Support the LTC4283 Hot Swap Controller. The device features programmable
current limit with foldback and independently adjustable inrush current to
optimize the MOSFET safe operating area (SOA). The SOA timer limits MOSFET
temperature rise for reliable protection against overstresses.
An I2C interface and onboard ADC allow monitoring of board current,
voltage, power, energy, and fault status.
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
Documentation/hwmon/index.rst | 1 +
Documentation/hwmon/ltc4283.rst | 267 ++++++
MAINTAINERS | 1 +
drivers/hwmon/Kconfig | 12 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ltc4283.c | 1795 +++++++++++++++++++++++++++++++++++++++
6 files changed, 2077 insertions(+)
diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst
index 8b655e5d6b68..b09e6abdd275 100644
--- a/Documentation/hwmon/index.rst
+++ b/Documentation/hwmon/index.rst
@@ -145,6 +145,7 @@ Hardware Monitoring Kernel Drivers
ltc4260
ltc4261
ltc4282
+ ltc4283
ltc4286
macsmc-hwmon
max127
diff --git a/Documentation/hwmon/ltc4283.rst b/Documentation/hwmon/ltc4283.rst
new file mode 100644
index 000000000000..a650c595bc8f
--- /dev/null
+++ b/Documentation/hwmon/ltc4283.rst
@@ -0,0 +1,267 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Kernel drivers ltc4283
+==========================================
+
+Supported chips:
+
+ * Analog Devices LTC4283
+
+ Prefix: 'ltc4283'
+
+ Addresses scanned: -
+
+ Datasheet:
+
+ https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4283.pdf
+
+Author: Nuno Sá <nuno.sa@analog.com>
+
+Description
+___________
+
+The LTC4283 negative voltage hot swap controller drives an external N-channel
+MOSFET to allow a board to be safely inserted and removed from a live backplane.
+The device features programmable current limit with foldback and independently
+adjustable inrush current to optimize the MOSFET safe operating area (SOA). The
+SOA timer limits MOSFET temperature rise for reliable protection against
+overstresses. An I2C interface and onboard gear-shift ADC allow monitoring of
+board current, voltage, power, energy, and fault status. Additional features
+respond to input UV/OV, interrupt the host when a fault has occurred, notify
+when output power is good, detect insertion of a board, turn off the MOSFET
+if an external supply monitor fails to indicate power good within a timeout
+period, and auto-reboot after a programmable delay following a host commanded
+turn-off.
+
+Sysfs entries
+_____________
+
+The following attributes are supported. Limits are read-write and all the other
+attributes are read-only. Note that the VADIOx channels might not be available
+if the ADIO pins are used as GPIOs (naturally also affects the respective
+differential channels).
+
+======================= ==========================================
+in0_lcrit_alarm Critical Undervoltage alarm
+in0_crit_alarm Critical Overvoltage alarm
+in0_reset_history Clears Under and Overvoltage fault logs.
+in0_label Channel label (VIN)
+
+in1_input Output voltage (mV).
+in1_min Undervoltage threshold
+in1_max Overvoltage threshold
+in1_lowest Lowest measured voltage
+in1_highest Highest measured voltage
+in1_reset_history Write 1 to reset history.
+in1_min_alarm Undervoltage alarm
+in1_max_alarm Overvoltage alarm
+in1_label Channel label (VPWR)
+
+in2_input Output voltage (mV).
+in2_min Undervoltage threshold
+in2_max Overvoltage threshold
+in2_lowest Lowest measured voltage
+in2_highest Highest measured voltage
+in2_reset_history Write 1 to reset history.
+in2_min_alarm Undervoltage alarm
+in2_max_alarm Overvoltage alarm
+in2_enable Enable/Disable monitoring.
+in2_label Channel label (VADI1)
+
+in3_input Output voltage (mV).
+in3_min Undervoltage threshold
+in3_max Overvoltage threshold
+in3_lowest Lowest measured voltage
+in3_highest Highest measured voltage
+in3_reset_history Write 1 to reset history.
+in3_min_alarm Undervoltage alarm
+in3_max_alarm Overvoltage alarm
+in3_enable Enable/Disable monitoring.
+in3_label Channel label (VADI2)
+
+in4_input Output voltage (mV).
+in4_min Undervoltage threshold
+in4_max Overvoltage threshold
+in4_lowest Lowest measured voltage
+in4_highest Highest measured voltage
+in4_reset_history Write 1 to reset history.
+in4_min_alarm Undervoltage alarm
+in4_max_alarm Overvoltage alarm
+in4_enable Enable/Disable monitoring.
+in4_label Channel label (VADI3)
+
+in5_input Output voltage (mV).
+in5_min Undervoltage threshold
+in5_max Overvoltage threshold
+in5_lowest Lowest measured voltage
+in5_highest Highest measured voltage
+in5_reset_history Write 1 to reset history.
+in5_min_alarm Undervoltage alarm
+in5_max_alarm Overvoltage alarm
+in5_enable Enable/Disable monitoring.
+in5_label Channel label (VADI4)
+
+in6_input Output voltage (mV).
+in6_min Undervoltage threshold
+in6_max Overvoltage threshold
+in6_lowest Lowest measured voltage
+in6_highest Highest measured voltage
+in6_reset_history Write 1 to reset history.
+in6_min_alarm Undervoltage alarm
+in6_max_alarm Overvoltage alarm
+in6_enable Enable/Disable monitoring.
+in6_label Channel label (VADIO1)
+
+in7_input Output voltage (mV).
+in7_min Undervoltage threshold
+in7_max Overvoltage threshold
+in7_lowest Lowest measured voltage
+in7_highest Highest measured voltage
+in7_reset_history Write 1 to reset history.
+in7_min_alarm Undervoltage alarm
+in7_max_alarm Overvoltage alarm
+in7_enable Enable/Disable monitoring.
+in7_label Channel label (VADIO2)
+
+in8_input Output voltage (mV).
+in8_min Undervoltage threshold
+in8_max Overvoltage threshold
+in8_lowest Lowest measured voltage
+in8_highest Highest measured voltage
+in8_reset_history Write 1 to reset history.
+in8_min_alarm Undervoltage alarm
+in8_max_alarm Overvoltage alarm
+in8_enable Enable/Disable monitoring.
+in8_label Channel label (VADIO3)
+
+in9_input Output voltage (mV).
+in9_min Undervoltage threshold
+in9_max Overvoltage threshold
+in9_lowest Lowest measured voltage
+in9_highest Highest measured voltage
+in9_reset_history Write 1 to reset history.
+in9_min_alarm Undervoltage alarm
+in9_max_alarm Overvoltage alarm
+in9_enable Enable/Disable monitoring.
+in9_label Channel label (VADIO4)
+
+in10_input Output voltage (mV).
+in10_min Undervoltage threshold
+in10_max Overvoltage threshold
+in10_lowest Lowest measured voltage
+in10_highest Highest measured voltage
+in10_reset_history Write 1 to reset history.
+in10_min_alarm Undervoltage alarm
+in10_max_alarm Overvoltage alarm
+in10_enable Enable/Disable monitoring.
+in10_label Channel label (DRNS)
+
+in11_input Output voltage (mV).
+in11_min Undervoltage threshold
+in11_max Overvoltage threshold
+in11_lowest Lowest measured voltage
+in11_highest Highest measured voltage
+in11_reset_history Write 1 to reset history.
+ Also clears fet bad and short fault logs.
+in11_min_alarm Undervoltage alarm
+in11_max_alarm Overvoltage alarm
+in11_enable Enable/Disable monitoring
+in11_fault Failure in the MOSFET. Either bad or shorted FET.
+in11_label Channel label (DRAIN)
+
+in12_input Output voltage (mV).
+in12_min Undervoltage threshold
+in12_max Overvoltage threshold
+in12_lowest Lowest measured voltage
+in12_highest Highest measured voltage
+in12_reset_history Write 1 to reset history.
+in12_min_alarm Undervoltage alarm
+in12_max_alarm Overvoltage alarm
+in12_enable Enable/Disable monitoring.
+in12_label Channel label (ADIN2-ADIN1)
+
+in13_input Output voltage (mV).
+in13_min Undervoltage threshold
+in13_max Overvoltage threshold
+in13_lowest Lowest measured voltage
+in13_highest Highest measured voltage
+in13_reset_history Write 1 to reset history.
+in13_min_alarm Undervoltage alarm
+in13_max_alarm Overvoltage alarm
+in13_enable Enable/Disable monitoring.
+in13_label Channel label (ADIN4-ADIN3)
+
+in14_input Output voltage (mV).
+in14_min Undervoltage threshold
+in14_max Overvoltage threshold
+in14_lowest Lowest measured voltage
+in14_highest Highest measured voltage
+in14_reset_history Write 1 to reset history.
+in14_min_alarm Undervoltage alarm
+in14_max_alarm Overvoltage alarm
+in14_enable Enable/Disable monitoring.
+in14_label Channel label (ADIO2-ADIO1)
+
+in15_input Output voltage (mV).
+in15_min Undervoltage threshold
+in15_max Overvoltage threshold
+in15_lowest Lowest measured voltage
+in15_highest Highest measured voltage
+in15_reset_history Write 1 to reset history.
+in15_min_alarm Undervoltage alarm
+in15_max_alarm Overvoltage alarm
+in15_enable Enable/Disable monitoring.
+in15_label Channel label (ADIO4-ADIO3)
+
+curr1_input Sense current (mA)
+curr1_min Undercurrent threshold
+curr1_max Overcurrent threshold
+curr1_lowest Lowest measured current
+curr1_highest Highest measured current
+curr1_reset_history Write 1 to reset curr1 history.
+ Also clears overcurrent fault logs.
+curr1_min_alarm Undercurrent alarm
+curr1_max_alarm Overcurrent alarm
+curr1_crit_alarm Critical Overcurrent alarm
+curr1_label Channel label (ISENSE)
+
+power1_input Power (in uW)
+power1_min Low power threshold
+power1_max High power threshold
+power1_input_lowest Historical minimum power use
+power1_input_highest Historical maximum power use
+power1_reset_history Write 1 to reset power1 history.
+ Also clears power fault logs.
+power1_min_alarm Low power alarm
+power1_max_alarm High power alarm
+power1_label Channel label (Power)
+
+energy1_input Measured energy over time (in microJoule)
+energy1_enable Enable/Disable Energy accumulation
+======================= ==========================================
+
+DebugFs entries
+_______________
+
+The chip also has a fault log register where failures can be logged. Hence,
+as these are logging events, we give access to them in debugfs. Note that
+even if some failure is detected in these logs, it does necessarily mean
+that the failure is still present. As mentioned in the proper Sysfs entries,
+these logs can be cleared by writing in the proper reset_history attribute.
+
+.. warning:: The debugfs interface is subject to change without notice
+ and is only available when the kernel is compiled with
+ ``CONFIG_DEBUG_FS`` defined.
+
+``/sys/kernel/debug/i2c/i2c-[X]/[X]-addr/``
+contains the following attributes:
+
+======================= ==========================================
+power1_failed_fault_log Set to 1 by a power1 fault occurring.
+power1_good_input_fault_log Set to 1 by a power1 good input fault occurring at PGIO3.
+in11_fet_short_fault_log Set to 1 when a FET-short fault occurs.
+in11_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs.
+in0_lcrit_fault_log Set to 1 by a VIN undervoltage fault occurring.
+in0_crit_fault_log Set to 1 by a VIN overvoltage fault occurring.
+curr1_crit_fault_log Set to 1 by an overcurrent fault occurring.
+======================= ==========================================
diff --git a/MAINTAINERS b/MAINTAINERS
index 76dd9edca7d5..c657ca0a4652 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15243,6 +15243,7 @@ M: Nuno Sá <nuno.sa@analog.com>
L: linux-hwmon@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml
+F: drivers/hwmon/ltc4283.c
LTC4286 HARDWARE MONITOR DRIVER
M: Delphine CC Chiu <Delphine_CC_Chiu@Wiwynn.com>
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 14e4cea48acc..0c1cdd12f71e 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1157,6 +1157,18 @@ config SENSORS_LTC4282
This driver can also be built as a module. If so, the module will
be called ltc4282.
+config SENSORS_LTC4283
+ tristate "Analog Devices LTC4283"
+ depends on I2C
+ select REGMAP_I2C
+ select AUXILIARY_BUS
+ help
+ If you say yes here you get support for Analog Devices LTC4283
+ Negative Voltage Hot Swap Controller I2C interface.
+
+ This driver can also be built as a module. If so, the module will
+ be called ltc4283.
+
config SENSORS_LTQ_CPUTEMP
bool "Lantiq cpu temperature sensor driver"
depends on SOC_XWAY
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 4788996aa137..9e75e9f70375 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -147,6 +147,7 @@ obj-$(CONFIG_SENSORS_LTC4245) += ltc4245.o
obj-$(CONFIG_SENSORS_LTC4260) += ltc4260.o
obj-$(CONFIG_SENSORS_LTC4261) += ltc4261.o
obj-$(CONFIG_SENSORS_LTC4282) += ltc4282.o
+obj-$(CONFIG_SENSORS_LTC4283) += ltc4283.o
obj-$(CONFIG_SENSORS_LTQ_CPUTEMP) += ltq-cputemp.o
obj-$(CONFIG_SENSORS_MACSMC_HWMON) += macsmc-hwmon.o
obj-$(CONFIG_SENSORS_MAX1111) += max1111.o
diff --git a/drivers/hwmon/ltc4283.c b/drivers/hwmon/ltc4283.c
new file mode 100644
index 000000000000..d8931c9a4685
--- /dev/null
+++ b/drivers/hwmon/ltc4283.c
@@ -0,0 +1,1795 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Analog Devices LTC4283 I2C Negative Voltage Hot Swap Controller (HWMON)
+ *
+ * Copyright 2025 Analog Devices Inc.
+ */
+#include <linux/auxiliary_bus.h>
+#include <linux/bitfield.h>
+#include <linux/bitmap.h>
+#include <linux/bitops.h>
+#include <linux/bits.h>
+
+#include <linux/debugfs.h>
+#include <linux/device.h>
+#include <linux/device/devres.h>
+#include <linux/hwmon.h>
+#include <linux/i2c.h>
+#include <linux/math.h>
+#include <linux/math64.h>
+#include <linux/minmax.h>
+#include <linux/module.h>
+
+#include <linux/mod_devicetable.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+#include <linux/unaligned.h>
+#include <linux/units.h>
+
+#define LTC4283_SYSTEM_STATUS 0x00
+#define LTC4283_FAULT_STATUS 0x03
+#define LTC4283_OV_MASK BIT(0)
+#define LTC4283_UV_MASK BIT(1)
+#define LTC4283_OC_MASK BIT(2)
+#define LTC4283_FET_BAD_MASK BIT(3)
+#define LTC4283_FET_SHORT_MASK BIT(6)
+#define LTC4283_FAULT_LOG 0x04
+#define LTC4283_OV_FAULT_MASK BIT(0)
+#define LTC4283_UV_FAULT_MASK BIT(1)
+#define LTC4283_OC_FAULT_MASK BIT(2)
+#define LTC4283_FET_BAD_FAULT_MASK BIT(3)
+#define LTC4283_PGI_FAULT_MASK BIT(4)
+#define LTC4283_PWR_FAIL_FAULT_MASK BIT(5)
+#define LTC4283_FET_SHORT_FAULT_MASK BIT(6)
+#define LTC4283_ADC_ALM_LOG_1 0x05
+#define LTC4283_POWER_LOW_ALM BIT(0)
+#define LTC4283_POWER_HIGH_ALM BIT(1)
+#define LTC4283_SENSE_LOW_ALM BIT(4)
+#define LTC4283_SENSE_HIGH_ALM BIT(5)
+#define LTC4283_ADC_ALM_LOG_2 0x06
+#define LTC4283_ADC_ALM_LOG_3 0x07
+#define LTC4283_ADC_ALM_LOG_4 0x08
+#define LTC4283_ADC_ALM_LOG_5 0x09
+#define LTC4283_CONTROL_1 0x0a
+#define LTC4283_RW_PAGE_MASK BIT(0)
+#define LTC4283_PIGIO2_ACLB_MASK BIT(2)
+#define LTC4283_PWRGD_RST_CTRL_MASK BIT(3)
+#define LTC4283_FET_BAD_OFF_MASK BIT(4)
+#define LTC4283_THERM_TMR_MASK BIT(5)
+#define LTC4283_DVDT_MASK BIT(6)
+#define LTC4283_CONTROL_2 0x0b
+#define LTC4283_OV_RETRY_MASK BIT(0)
+#define LTC4283_UV_RETRY_MASK BIT(1)
+#define LTC4283_OC_RETRY_MASK GENMASK(3, 2)
+#define LTC4283_FET_BAD_RETRY_MASK GENMASK(5, 4)
+#define LTC4283_EXT_FAULT_RETRY_MASK BIT(7)
+#define LTC4283_RESERVED_OC 0x0c
+#define LTC4283_CONFIG_1 0x0d
+#define LTC4283_FB_MASK GENMASK(3, 2)
+#define LTC4283_ILIM_MASK GENMASK(7, 4)
+#define LTC4283_CONFIG_2 0x0e
+#define LTC4283_COOLING_DL_MASK GENMASK(3, 1)
+#define LTC4283_FTBD_DL_MASK GENMASK(5, 4)
+#define LTC4283_CONFIG_3 0x0f
+#define LTC4283_VPWR_DRNS_MASK BIT(6)
+#define LTC4283_EXTFLT_TURN_OFF_MASK BIT(7)
+#define LTC4283_PGIO_CONFIG 0x10
+#define LTC4283_PGIO1_CFG_MASK GENMASK(1, 0)
+#define LTC4283_PGIO2_CFG_MASK GENMASK(3, 2)
+#define LTC4283_PGIO3_CFG_MASK GENMASK(5, 4)
+#define LTC4283_PGIO4_CFG_MASK GENMASK(7, 6)
+#define LTC4283_PGIO_CONFIG_2 0x11
+#define LTC4283_ADC_MASK GENMASK(2, 0)
+#define LTC4283_ADC_SELECT(c) (0x13 + (c) / 8)
+#define LTC4283_ADC_SELECT_MASK(c) BIT((c) % 8)
+#define LTC4283_SENSE_MIN_TH 0x1b
+#define LTC4283_SENSE_MAX_TH 0x1c
+#define LTC4283_VPWR_MIN_TH 0x1d
+#define LTC4283_VPWR_MAX_TH 0x1e
+#define LTC4283_POWER_MIN_TH 0x1f
+#define LTC4283_POWER_MAX_TH 0x20
+#define LTC4283_ADC_2_MIN_TH(c) (0x21 + (c) * 2)
+#define LTC4283_ADC_2_MAX_TH(c) (0x22 + (c) * 2)
+#define LTC4283_ADC_2_MIN_TH_DIFF(c) (0x39 + (c) * 2)
+#define LTC4283_ADC_2_MAX_TH_DIFF(c) (0x3a + (c) * 2)
+#define LTC4283_SENSE 0x41
+#define LTC4283_SENSE_MIN 0x42
+#define LTC4283_SENSE_MAX 0x43
+#define LTC4283_VPWR 0x44
+#define LTC4283_VPWR_MIN 0x45
+#define LTC4283_VPWR_MAX 0x46
+#define LTC4283_POWER 0x47
+#define LTC4283_POWER_MIN 0x48
+#define LTC4283_POWER_MAX 0x49
+#define LTC4283_RESERVED_68 0x68
+#define LTC4283_RESERVED_6D 0x6D
+/* get channels from ADC 2 */
+#define LTC4283_ADC_2(c) (0x4a + (c) * 3)
+#define LTC4283_ADC_2_MIN(c) (0x4b + (c) * 3)
+#define LTC4283_ADC_2_MAX(c) (0x4c + (c) * 3)
+#define LTC4283_ADC_2_DIFF(c) (0x6e + (c) * 3)
+#define LTC4283_ADC_2_MIN_DIFF(c) (0x6f + (c) * 3)
+#define LTC4283_ADC_2_MAX_DIFF(c) (0x70 + (c) * 3)
+#define LTC4283_ENERGY 0x7a
+#define LTC4283_METER_CONTROL 0x84
+#define LTC4283_INTEGRATE_I_MASK BIT(0)
+#define LTC4283_METER_HALT_MASK BIT(6)
+#define LTC4283_RESERVED_86 0x86
+#define LTC4283_RESERVED_8F 0x8F
+#define LTC4283_FAULT_LOG_CTRL 0x90
+#define LTC4283_FAULT_LOG_EN_MASK BIT(7)
+#define LTC4283_RESERVED_91 0x91
+#define LTC4283_RESERVED_A1 0xA1
+#define LTC4283_RESERVED_A3 0xA3
+#define LTC4283_RESERVED_AC 0xAC
+#define LTC4283_POWER_PLAY_MSB 0xE7
+#define LTC4283_POWER_PLAY_LSB 0xE8
+#define LTC4283_RESERVED_F1 0xF1
+#define LTC4283_RESERVED_FF 0xFF
+
+/* also applies for differential channels */
+#define LTC4283_ADC1_FS_uV 32768
+#define LTC4283_ADC2_FS_mV 2048
+#define LTC4283_TCONV_uS 64103
+#define LTC4283_VILIM_MIN_uV 15000
+#define LTC4283_VILIM_MAX_uV 30000
+#define LTC4283_VILIM_RANGE \
+ (LTC4283_VILIM_MAX_uV - LTC4283_VILIM_MIN_uV + 1)
+
+#define LTC4283_PGIO_FUNC_GPIO 2
+#define LTC4283_PGIO2_FUNC_ACLB 3
+
+/*
+ * Maximum value for rsense in nano ohms. The reasoning for this value is that
+ * it's the max value for which multiplying by 256 does not overflow long on
+ * 32bits. For the minimum value, is a sane minimum rsense for which power_max
+ * does not overflow 32bits.
+ */
+#define LTC4283_MAX_RSENSE 1677721599
+#define LTC4283_MIN_RSENSE 50000
+
+/* voltage channels */
+enum {
+ LTC4283_CHAN_VIN,
+ LTC4283_CHAN_VPWR,
+ LTC4283_CHAN_ADI_1,
+ LTC4283_CHAN_ADI_2,
+ LTC4283_CHAN_ADI_3,
+ LTC4283_CHAN_ADI_4,
+ LTC4283_CHAN_ADIO_1,
+ LTC4283_CHAN_ADIO_2,
+ LTC4283_CHAN_ADIO_3,
+ LTC4283_CHAN_ADIO_4,
+ LTC4283_CHAN_DRNS,
+ LTC4283_CHAN_DRAIN,
+ /* differential channels */
+ LTC4283_CHAN_ADIN12,
+ LTC4283_CHAN_ADIN34,
+ LTC4283_CHAN_ADIO12,
+ LTC4283_CHAN_ADIO34,
+ LTC4283_CHAN_MAX
+};
+
+/* Just for ease of use on the regmap */
+#define LTC4283_ADIO34_MAX \
+ LTC4283_ADC_2_MAX_DIFF(LTC4283_CHAN_ADIO34 - LTC4283_CHAN_ADIN12)
+
+struct ltc4283_hwmon {
+ struct regmap *map;
+ struct i2c_client *client;
+ unsigned long gpio_mask;
+ unsigned long ch_enable_mask;
+ /* in microwatt */
+ unsigned long power_max;
+ /* in millivolt */
+ u32 vsense_max;
+ /* in tenths of microohm*/
+ u32 rsense;
+ bool energy_en;
+ bool ext_fault;
+};
+
+static int ltc4283_read_voltage_word(const struct ltc4283_hwmon *st,
+ u32 reg, u32 fs, long *val)
+{
+ unsigned int __raw;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &__raw);
+ if (ret)
+ return ret;
+
+ *val = DIV_ROUND_CLOSEST(__raw * fs, BIT(16));
+ return 0;
+}
+
+static int ltc4283_read_voltage_byte(const struct ltc4283_hwmon *st,
+ u32 reg, u32 fs, long *val)
+{
+ int ret;
+ u32 in;
+
+ ret = regmap_read(st->map, reg, &in);
+ if (ret)
+ return ret;
+
+ *val = DIV_ROUND_CLOSEST(in * fs, BIT(8));
+ return 0;
+}
+
+static u32 ltc4283_in_reg(u32 attr, u32 channel)
+{
+ switch (attr) {
+ case hwmon_in_input:
+ if (channel == LTC4283_CHAN_VPWR)
+ return LTC4283_VPWR;
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN)
+ return LTC4283_ADC_2(channel - LTC4283_CHAN_ADI_1);
+ return LTC4283_ADC_2_DIFF(channel - LTC4283_CHAN_ADIN12);
+ case hwmon_in_highest:
+ if (channel == LTC4283_CHAN_VPWR)
+ return LTC4283_VPWR_MAX;
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN)
+ return LTC4283_ADC_2_MAX(channel - LTC4283_CHAN_ADI_1);
+ return LTC4283_ADC_2_MAX_DIFF(channel - LTC4283_CHAN_ADIN12);
+ case hwmon_in_lowest:
+ if (channel == LTC4283_CHAN_VPWR)
+ return LTC4283_VPWR_MIN;
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN)
+ return LTC4283_ADC_2_MIN(channel - LTC4283_CHAN_ADI_1);
+ return LTC4283_ADC_2_MIN_DIFF(channel - LTC4283_CHAN_ADIN12);
+ case hwmon_in_max:
+ if (channel == LTC4283_CHAN_VPWR)
+ return LTC4283_VPWR_MAX_TH;
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN)
+ return LTC4283_ADC_2_MAX_TH(channel - LTC4283_CHAN_ADI_1);
+ return LTC4283_ADC_2_MAX_TH_DIFF(channel - LTC4283_CHAN_ADIN12);
+ default:
+ if (channel == LTC4283_CHAN_VPWR)
+ return LTC4283_VPWR_MIN_TH;
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN)
+ return LTC4283_ADC_2_MIN_TH(channel - LTC4283_CHAN_ADI_1);
+ return LTC4283_ADC_2_MIN_TH_DIFF(channel - LTC4283_CHAN_ADIN12);
+ }
+}
+
+static int ltc4283_read_in_vals(const struct ltc4283_hwmon *st,
+ u32 attr, u32 channel, long *val)
+{
+ u32 reg = ltc4283_in_reg(attr, channel);
+ int ret;
+
+ if (channel < LTC4283_CHAN_ADIN12) {
+ if (attr != hwmon_in_max && attr != hwmon_in_min)
+ return ltc4283_read_voltage_word(st, reg,
+ LTC4283_ADC2_FS_mV,
+ val);
+
+ return ltc4283_read_voltage_byte(st, reg,
+ LTC4283_ADC2_FS_mV, val);
+ }
+
+ if (attr != hwmon_in_max && attr != hwmon_in_min)
+ ret = ltc4283_read_voltage_word(st, reg,
+ LTC4283_ADC1_FS_uV, val);
+ else
+ ret = ltc4283_read_voltage_byte(st, reg,
+ LTC4283_ADC1_FS_uV, val);
+ if (ret)
+ return ret;
+
+ *val = DIV_ROUND_CLOSEST(*val, MILLI);
+ return 0;
+}
+
+static int ltc4283_read_alarm(struct ltc4283_hwmon *st, u32 reg,
+ u32 mask, long *val)
+{
+ u32 alarm;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &alarm);
+ if (ret)
+ return ret;
+
+ *val = !!(alarm & mask);
+
+ /* If not status/fault logs, clear the alarm after reading it. */
+ if (reg != LTC4283_FAULT_STATUS && reg != LTC4283_FAULT_LOG)
+ return regmap_write(st->map, reg, alarm & ~mask);
+
+ return 0;
+}
+
+static int ltc4283_read_in_alarm(struct ltc4283_hwmon *st, u32 channel,
+ bool max_alm, long *val)
+{
+ if (channel == LTC4283_CHAN_VPWR)
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_1,
+ BIT(2 + max_alm), val);
+
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_ADI_4) {
+ u32 bit = (channel - LTC4283_CHAN_ADI_1) * 2;
+ /*
+ * Lower channels go to higher bits. We also want to go +1 down
+ * in the min_alarm case.
+ */
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_2,
+ BIT(7 - bit - !max_alm), val);
+ }
+
+ if (channel >= LTC4283_CHAN_ADIO_1 && channel <= LTC4283_CHAN_ADIO_4) {
+ u32 bit = (channel - LTC4283_CHAN_ADIO_1) * 2;
+
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_3,
+ BIT(7 - bit - !max_alm), val);
+ }
+
+ if (channel >= LTC4283_CHAN_ADIN12 && channel <= LTC4283_CHAN_ADIO34) {
+ u32 bit = (channel - LTC4283_CHAN_ADIN12) * 2;
+
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_5,
+ BIT(7 - bit - !max_alm), val);
+ }
+
+ if (channel == LTC4283_CHAN_DRNS)
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_4,
+ BIT(6 + max_alm), val);
+
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_4, BIT(4 + max_alm),
+ val);
+}
+
+static int ltc4283_read_in(struct ltc4283_hwmon *st, u32 attr, u32 channel,
+ long *val)
+{
+ switch (attr) {
+ case hwmon_in_input:
+ if (!test_bit(channel, &st->ch_enable_mask))
+ return -ENODATA;
+
+ return ltc4283_read_in_vals(st, attr, channel, val);
+ case hwmon_in_highest:
+ case hwmon_in_lowest:
+ case hwmon_in_max:
+ case hwmon_in_min:
+ return ltc4283_read_in_vals(st, attr, channel, val);
+ case hwmon_in_max_alarm:
+ return ltc4283_read_in_alarm(st, channel, true, val);
+ case hwmon_in_min_alarm:
+ return ltc4283_read_in_alarm(st, channel, false, val);
+ case hwmon_in_crit_alarm:
+ return ltc4283_read_alarm(st, LTC4283_FAULT_STATUS,
+ LTC4283_OV_MASK, val);
+ case hwmon_in_lcrit_alarm:
+ return ltc4283_read_alarm(st, LTC4283_FAULT_STATUS,
+ LTC4283_UV_MASK, val);
+ case hwmon_in_fault:
+ /*
+ * We report failure if we detect either a fer_bad or a
+ * fet_short in the status register.
+ */
+ return ltc4283_read_alarm(st, LTC4283_FAULT_STATUS,
+ LTC4283_FET_BAD_MASK | LTC4283_FET_SHORT_MASK, val);
+ case hwmon_in_enable:
+ *val = test_bit(channel, &st->ch_enable_mask);
+ return 0;
+ default:
+ return -EOPNOTSUPP;
+ }
+ return 0;
+}
+
+static int ltc4283_read_current_word(const struct ltc4283_hwmon *st, u32 reg,
+ long *val)
+{
+ u64 temp = (u64)LTC4283_ADC1_FS_uV * DECA * MILLI;
+ unsigned int __raw;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &__raw);
+ if (ret)
+ return ret;
+
+ *val = DIV64_U64_ROUND_CLOSEST(__raw * temp,
+ BIT_ULL(16) * st->rsense);
+
+ return 0;
+}
+
+static int ltc4283_read_current_byte(const struct ltc4283_hwmon *st, u32 reg,
+ long *val)
+{
+ u64 temp = (u64)LTC4283_ADC1_FS_uV * DECA * MILLI;
+ u32 curr;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &curr);
+ if (ret)
+ return ret;
+
+ *val = DIV_ROUND_CLOSEST_ULL(curr * temp, BIT(8) * st->rsense);
+ return 0;
+}
+
+static int ltc4283_read_curr(struct ltc4283_hwmon *st, u32 attr, long *val)
+{
+ switch (attr) {
+ case hwmon_curr_input:
+ return ltc4283_read_current_word(st, LTC4283_SENSE, val);
+ case hwmon_curr_highest:
+ return ltc4283_read_current_word(st, LTC4283_SENSE_MAX, val);
+ case hwmon_curr_lowest:
+ return ltc4283_read_current_word(st, LTC4283_SENSE_MIN, val);
+ case hwmon_curr_max:
+ return ltc4283_read_current_byte(st, LTC4283_SENSE_MAX_TH, val);
+ case hwmon_curr_min:
+ return ltc4283_read_current_byte(st, LTC4283_SENSE_MIN_TH, val);
+ case hwmon_curr_max_alarm:
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_1,
+ LTC4283_SENSE_HIGH_ALM, val);
+ case hwmon_curr_min_alarm:
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_1,
+ LTC4283_SENSE_LOW_ALM, val);
+ case hwmon_curr_crit_alarm:
+ return ltc4283_read_alarm(st, LTC4283_FAULT_STATUS,
+ LTC4283_OC_MASK, val);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_read_power_word(const struct ltc4283_hwmon *st,
+ u32 reg, long *val)
+{
+ u64 temp = (u64)LTC4283_ADC1_FS_uV * LTC4283_ADC2_FS_mV * DECA * MILLI;
+ unsigned int __raw;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &__raw);
+ if (ret)
+ return ret;
+
+ /*
+ * Power is given by:
+ * P = CODE(16b) * 32.768mV * 2.048V / (2^16 * Rsense)
+ */
+ *val = DIV64_U64_ROUND_CLOSEST(temp * __raw, BIT_ULL(16) * st->rsense);
+
+ return 0;
+}
+
+static int ltc4283_read_power_byte(const struct ltc4283_hwmon *st,
+ u32 reg, long *val)
+{
+ u64 temp = (u64)LTC4283_ADC1_FS_uV * LTC4283_ADC2_FS_mV * DECA * MILLI;
+ u32 power;
+ int ret;
+
+ ret = regmap_read(st->map, reg, &power);
+ if (ret)
+ return ret;
+
+ *val = DIV_ROUND_CLOSEST_ULL(power * temp, BIT(8) * st->rsense);
+
+ return 0;
+}
+
+static int ltc4283_read_power(struct ltc4283_hwmon *st, u32 attr, long *val)
+{
+ switch (attr) {
+ case hwmon_power_input:
+ return ltc4283_read_power_word(st, LTC4283_POWER, val);
+ case hwmon_power_input_highest:
+ return ltc4283_read_power_word(st, LTC4283_POWER_MAX, val);
+ case hwmon_power_input_lowest:
+ return ltc4283_read_power_word(st, LTC4283_POWER_MIN, val);
+ case hwmon_power_max_alarm:
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_1,
+ LTC4283_POWER_HIGH_ALM, val);
+ case hwmon_power_min_alarm:
+ return ltc4283_read_alarm(st, LTC4283_ADC_ALM_LOG_1,
+ LTC4283_POWER_LOW_ALM, val);
+ case hwmon_power_max:
+ return ltc4283_read_power_byte(st, LTC4283_POWER_MAX_TH, val);
+ case hwmon_power_min:
+ return ltc4283_read_power_byte(st, LTC4283_POWER_MIN_TH, val);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_read_energy(struct ltc4283_hwmon *st, u32 attr, s64 *val)
+{
+ u64 temp = LTC4283_ADC1_FS_uV * LTC4283_ADC2_FS_mV, energy;
+ u8 raw[8] = {};
+ int ret;
+
+ if (!st->energy_en)
+ return -ENODATA;
+
+ ret = i2c_smbus_read_i2c_block_data(st->client, LTC4283_ENERGY, 6, raw);
+ if (ret < 0)
+ return ret;
+ if (ret != 6)
+ return -EIO;
+
+ energy = get_unaligned_be64(raw) >> 16;
+
+ /*
+ * The formula for energy is given by:
+ * E = CODE(48b) * 32.768mV * 2.048V * Tconv / 2^24 * Rsense
+ *
+ * As Rsense can have tenths of micro-ohm resolution, we need to
+ * multiply by DECA to get microjoule.
+ */
+
+ /*
+ * Use mul_u64_u64_div_u64() to handle the 128-bit intermediate
+ * product of energy (up to 48 bits) * temp * Tconv without overflow.
+ * Multiply rsense by CENTI to convert from tenths-of-microohm back
+ * to nanoohm so the result comes out in microjoule.
+ */
+ energy = mul_u64_u64_div_u64(energy, temp * LTC4283_TCONV_uS,
+ BIT_ULL(24) * st->rsense * CENTI);
+
+ *val = energy;
+ return 0;
+}
+
+static int ltc4283_read(struct device *dev, enum hwmon_sensor_types type,
+ u32 attr, int channel, long *val)
+{
+ struct ltc4283_hwmon *st = dev_get_drvdata(dev);
+
+ switch (type) {
+ case hwmon_in:
+ return ltc4283_read_in(st, attr, channel, val);
+ case hwmon_curr:
+ return ltc4283_read_curr(st, attr, val);
+ case hwmon_power:
+ return ltc4283_read_power(st, attr, val);
+ case hwmon_energy:
+ *val = st->energy_en;
+ return 0;
+ case hwmon_energy64:
+ return ltc4283_read_energy(st, attr, (s64 *)val);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_write_power_byte(const struct ltc4283_hwmon *st, u32 reg,
+ long val)
+{
+ u64 temp = (u64)LTC4283_ADC1_FS_uV * LTC4283_ADC2_FS_mV * DECA * MILLI;
+ u32 __raw;
+
+ val = clamp_val(val, 0, st->power_max);
+ __raw = DIV64_U64_ROUND_CLOSEST(val * BIT_ULL(8) * st->rsense, temp);
+
+ return regmap_write(st->map, reg, __raw);
+}
+
+static int ltc4283_write_power_word(const struct ltc4283_hwmon *st,
+ u32 reg, unsigned long val)
+{
+ u64 divisor = (u64)LTC4283_ADC1_FS_uV * LTC4283_ADC2_FS_mV * DECA * MILLI;
+ u16 __raw;
+
+ __raw = mul_u64_u64_div_u64(val, st->rsense * BIT_ULL(16), divisor);
+
+ return regmap_write(st->map, reg, __raw);
+}
+
+static int ltc4283_reset_power_hist(struct ltc4283_hwmon *st)
+{
+ int ret;
+
+ ret = ltc4283_write_power_word(st, LTC4283_POWER_MIN, st->power_max);
+ if (ret)
+ return ret;
+
+ ret = ltc4283_write_power_word(st, LTC4283_POWER_MAX, 0);
+ if (ret)
+ return ret;
+
+ /* Clear possible power faults. */
+ return regmap_clear_bits(st->map, LTC4283_FAULT_LOG,
+ LTC4283_PWR_FAIL_FAULT_MASK | LTC4283_PGI_FAULT_MASK);
+}
+
+static int ltc4283_write_power(struct ltc4283_hwmon *st, u32 attr, long val)
+{
+ switch (attr) {
+ case hwmon_power_max:
+ return ltc4283_write_power_byte(st, LTC4283_POWER_MAX_TH, val);
+ case hwmon_power_min:
+ return ltc4283_write_power_byte(st, LTC4283_POWER_MIN_TH, val);
+ case hwmon_power_reset_history:
+ return ltc4283_reset_power_hist(st);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_write_in_history(struct ltc4283_hwmon *st, u32 reg,
+ long lowest, u32 fs)
+{
+ u32 __raw;
+ int ret;
+
+ __raw = DIV_ROUND_CLOSEST(BIT(16) * lowest, fs);
+ if (__raw == BIT(16))
+ __raw = U16_MAX;
+
+ ret = regmap_write(st->map, reg, __raw);
+ if (ret)
+ return ret;
+
+ return regmap_write(st->map, reg + 1, 0);
+}
+
+static int ltc4283_write_in_byte(const struct ltc4283_hwmon *st,
+ u32 reg, u32 fs, long val)
+{
+ u32 __raw;
+
+ val = clamp_val(val, 0, fs);
+ __raw = DIV_ROUND_CLOSEST(val * BIT(8), fs);
+ if (__raw == BIT(8))
+ __raw = U8_MAX;
+
+ return regmap_write(st->map, reg, __raw);
+}
+
+static int ltc4283_reset_in_hist(struct ltc4283_hwmon *st, u32 channel)
+{
+ u32 reg, fs;
+ int ret;
+
+ /*
+ * Make sure to clear possible under/over voltage faults. Otherwise the
+ * chip won't latch on again.
+ */
+ if (channel == LTC4283_CHAN_VIN)
+ return regmap_clear_bits(st->map, LTC4283_FAULT_LOG,
+ LTC4283_OV_FAULT_MASK | LTC4283_UV_FAULT_MASK);
+
+ if (channel == LTC4283_CHAN_VPWR)
+ return ltc4283_write_in_history(st, LTC4283_VPWR_MIN,
+ LTC4283_ADC2_FS_mV,
+ LTC4283_ADC2_FS_mV);
+
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN) {
+ fs = LTC4283_ADC2_FS_mV;
+ reg = LTC4283_ADC_2_MIN(channel - LTC4283_CHAN_ADI_1);
+ } else {
+ fs = LTC4283_ADC1_FS_uV;
+ reg = LTC4283_ADC_2_MIN_DIFF(channel - LTC4283_CHAN_ADIN12);
+ }
+
+ ret = ltc4283_write_in_history(st, reg, fs, fs);
+ if (ret)
+ return ret;
+ if (channel != LTC4283_CHAN_DRAIN)
+ return 0;
+
+ /* Then, let's also clear possible fet faults. Same as above. */
+ return regmap_clear_bits(st->map, LTC4283_FAULT_LOG,
+ LTC4283_FET_BAD_FAULT_MASK | LTC4283_FET_SHORT_FAULT_MASK);
+}
+
+static int ltc4283_write_in_en(struct ltc4283_hwmon *st, u32 channel, bool en)
+{
+ unsigned int bit, adc_idx = channel - LTC4283_CHAN_ADI_1;
+ unsigned int reg = LTC4283_ADC_SELECT(adc_idx);
+ int ret;
+
+ bit = LTC4283_ADC_SELECT_MASK(adc_idx);
+ if (channel > LTC4283_CHAN_DRAIN)
+ /* Account for two reserved fields after DRAIN. */
+ bit <<= 2;
+
+ if (en)
+ ret = regmap_set_bits(st->map, reg, bit);
+ else
+ ret = regmap_clear_bits(st->map, reg, bit);
+ if (ret)
+ return ret;
+
+ __assign_bit(channel, &st->ch_enable_mask, en);
+ return 0;
+}
+
+static int ltc4283_write_minmax(struct ltc4283_hwmon *st, long val,
+ u32 channel, bool is_max)
+{
+ u32 reg;
+
+ if (channel == LTC4283_CHAN_VPWR) {
+ if (is_max)
+ return ltc4283_write_in_byte(st, LTC4283_VPWR_MAX_TH,
+ LTC4283_ADC2_FS_mV, val);
+
+ return ltc4283_write_in_byte(st, LTC4283_VPWR_MIN_TH,
+ LTC4283_ADC2_FS_mV, val);
+ }
+
+ if (channel >= LTC4283_CHAN_ADI_1 && channel <= LTC4283_CHAN_DRAIN) {
+ if (is_max) {
+ reg = LTC4283_ADC_2_MAX_TH(channel - LTC4283_CHAN_ADI_1);
+ return ltc4283_write_in_byte(st, reg,
+ LTC4283_ADC2_FS_mV, val);
+ }
+
+ reg = LTC4283_ADC_2_MIN_TH(channel - LTC4283_CHAN_ADI_1);
+ return ltc4283_write_in_byte(st, reg, LTC4283_ADC2_FS_mV, val);
+ }
+
+ /* Clamp before multiplying to avoid overflow on any arch. */
+ val = clamp_val(val, 0, LONG_MAX / MILLI);
+
+ if (is_max) {
+ reg = LTC4283_ADC_2_MAX_TH_DIFF(channel - LTC4283_CHAN_ADIN12);
+ return ltc4283_write_in_byte(st, reg, LTC4283_ADC1_FS_uV,
+ val * MILLI);
+ }
+
+ reg = LTC4283_ADC_2_MIN_TH_DIFF(channel - LTC4283_CHAN_ADIN12);
+ return ltc4283_write_in_byte(st, reg, LTC4283_ADC1_FS_uV, val * MILLI);
+}
+
+static int ltc4283_write_in(struct ltc4283_hwmon *st, u32 attr, long val,
+ int channel)
+{
+ switch (attr) {
+ case hwmon_in_max:
+ return ltc4283_write_minmax(st, val, channel, true);
+ case hwmon_in_min:
+ return ltc4283_write_minmax(st, val, channel, false);
+ case hwmon_in_reset_history:
+ return ltc4283_reset_in_hist(st, channel);
+ case hwmon_in_enable:
+ return ltc4283_write_in_en(st, channel, !!val);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_write_curr_byte(const struct ltc4283_hwmon *st,
+ u32 reg, long val)
+{
+ u32 temp = LTC4283_ADC1_FS_uV * DECA * MILLI;
+ u32 reg_val, isense_max;
+
+ isense_max = DIV_ROUND_CLOSEST(st->vsense_max * MICRO * DECA, st->rsense);
+ val = clamp_val(val, 0, isense_max);
+ reg_val = DIV_ROUND_CLOSEST_ULL(val * BIT_ULL(8) * st->rsense, temp);
+
+ return regmap_write(st->map, reg, reg_val);
+}
+
+static int ltc4283_write_curr_history(struct ltc4283_hwmon *st)
+{
+ int ret;
+
+ ret = ltc4283_write_in_history(st, LTC4283_SENSE_MIN,
+ st->vsense_max * MILLI,
+ LTC4283_ADC1_FS_uV);
+ if (ret)
+ return ret;
+
+ /* Now, let's also clear possible overcurrent logs. */
+ return regmap_clear_bits(st->map, LTC4283_FAULT_LOG,
+ LTC4283_OC_FAULT_MASK);
+}
+
+static int ltc4283_write_curr(struct ltc4283_hwmon *st, u32 attr, long val)
+{
+ switch (attr) {
+ case hwmon_curr_max:
+ return ltc4283_write_curr_byte(st, LTC4283_SENSE_MAX_TH, val);
+ case hwmon_curr_min:
+ return ltc4283_write_curr_byte(st, LTC4283_SENSE_MIN_TH, val);
+ case hwmon_curr_reset_history:
+ return ltc4283_write_curr_history(st);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int ltc4283_energy_enable_set(struct ltc4283_hwmon *st, long val)
+{
+ int ret;
+
+ /* Setting the bit halts the meter. */
+ val = !!val;
+ ret = regmap_update_bits(st->map, LTC4283_METER_CONTROL,
+ LTC4283_METER_HALT_MASK,
+ FIELD_PREP(LTC4283_METER_HALT_MASK, !val));
+ if (ret)
+ return ret;
+
+ st->energy_en = val;
+
+ return 0;
+}
+
+static int ltc4283_write(struct device *dev, enum hwmon_sensor_types type,
+ u32 attr, int channel, long val)
+{
+ struct ltc4283_hwmon *st = dev_get_drvdata(dev);
+
+ switch (type) {
+ case hwmon_power:
+ return ltc4283_write_power(st, attr, val);
+ case hwmon_in:
+ return ltc4283_write_in(st, attr, val, channel);
+ case hwmon_curr:
+ return ltc4283_write_curr(st, attr, val);
+ case hwmon_energy:
+ return ltc4283_energy_enable_set(st, val);
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static umode_t ltc4283_in_is_visible(const struct ltc4283_hwmon *st,
+ u32 attr, int channel)
+{
+ /* If ADIO is set as a GPIO, don´t make it visible. */
+ if (channel >= LTC4283_CHAN_ADIO_1 && channel <= LTC4283_CHAN_ADIO_4) {
+ /* ADIOX pins come at index 0 in the gpio mask. */
+ channel -= LTC4283_CHAN_ADIO_1;
+ if (test_bit(channel, &st->gpio_mask))
+ return 0;
+ }
+
+ /* Also take care of differential channels. */
+ if (channel >= LTC4283_CHAN_ADIO12 && channel <= LTC4283_CHAN_ADIO34) {
+ channel -= LTC4283_CHAN_ADIO12;
+ /* If one channel in the pair is used, make it invisible. */
+ if (test_bit(channel * 2, &st->gpio_mask) ||
+ test_bit(channel * 2 + 1, &st->gpio_mask))
+ return 0;
+ }
+
+ switch (attr) {
+ case hwmon_in_input:
+ case hwmon_in_highest:
+ case hwmon_in_lowest:
+ case hwmon_in_max_alarm:
+ case hwmon_in_min_alarm:
+ case hwmon_in_label:
+ case hwmon_in_lcrit_alarm:
+ case hwmon_in_crit_alarm:
+ case hwmon_in_fault:
+ return 0444;
+ case hwmon_in_max:
+ case hwmon_in_min:
+ case hwmon_in_enable:
+ return 0644;
+ case hwmon_in_reset_history:
+ return 0200;
+ default:
+ return 0;
+ }
+}
+
+static umode_t ltc4283_curr_is_visible(u32 attr)
+{
+ switch (attr) {
+ case hwmon_curr_input:
+ case hwmon_curr_highest:
+ case hwmon_curr_lowest:
+ case hwmon_curr_max_alarm:
+ case hwmon_curr_min_alarm:
+ case hwmon_curr_crit_alarm:
+ case hwmon_curr_label:
+ return 0444;
+ case hwmon_curr_max:
+ case hwmon_curr_min:
+ return 0644;
+ case hwmon_curr_reset_history:
+ return 0200;
+ default:
+ return 0;
+ }
+}
+
+static umode_t ltc4283_power_is_visible(u32 attr)
+{
+ switch (attr) {
+ case hwmon_power_input:
+ case hwmon_power_input_highest:
+ case hwmon_power_input_lowest:
+ case hwmon_power_label:
+ case hwmon_power_max_alarm:
+ case hwmon_power_min_alarm:
+ return 0444;
+ case hwmon_power_max:
+ case hwmon_power_min:
+ return 0644;
+ case hwmon_power_reset_history:
+ return 0200;
+ default:
+ return 0;
+ }
+}
+
+static umode_t ltc4283_is_visible(const void *data,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel)
+{
+ switch (type) {
+ case hwmon_in:
+ return ltc4283_in_is_visible(data, attr, channel);
+ case hwmon_curr:
+ return ltc4283_curr_is_visible(attr);
+ case hwmon_power:
+ return ltc4283_power_is_visible(attr);
+ case hwmon_energy:
+ /* hwmon_energy_enable */
+ return 0644;
+ case hwmon_energy64:
+ /* hwmon_energy_input */
+ return 0444;
+ default:
+ return 0;
+ }
+}
+
+static const char * const ltc4283_in_strs[] = {
+ "VIN", "VPWR", "VADI1", "VADI2", "VADI3", "VADI4", "VADIO1", "VADIO2",
+ "VADIO3", "VADIO4", "DRNS", "DRAIN", "ADIN2-ADIN1", "ADIN4-ADIN3",
+ "ADIO2-ADIO1", "ADIO4-ADIO3"
+};
+
+static int ltc4283_read_labels(struct device *dev,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel, const char **str)
+{
+ switch (type) {
+ case hwmon_in:
+ *str = ltc4283_in_strs[channel];
+ return 0;
+ case hwmon_curr:
+ *str = "ISENSE";
+ return 0;
+ case hwmon_power:
+ *str = "Power";
+ return 0;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+/*
+ * Set max limits for ISENSE and Power as that depends on the max voltage on
+ * rsense that is defined in ILIM_ADJUST. This is specially important for power
+ * because for some rsense and vfsout values, if we allow the default raw 255
+ * value, that would overflow long in 32bit archs when reading back the max
+ * power limit.
+ */
+static int ltc4283_set_max_limits(struct ltc4283_hwmon *st, struct device *dev)
+{
+ u32 temp = st->vsense_max * DECA * MICRO;
+ int ret;
+
+ ret = ltc4283_write_in_byte(st, LTC4283_SENSE_MAX_TH, LTC4283_ADC1_FS_uV,
+ st->vsense_max * MILLI);
+ if (ret)
+ return ret;
+
+ /* Power is given by ISENSE * Vout. */
+ st->power_max = DIV_ROUND_CLOSEST(temp, st->rsense) * LTC4283_ADC2_FS_mV;
+ return ltc4283_write_power_byte(st, LTC4283_POWER_MAX_TH, st->power_max);
+}
+
+static int ltc4283_parse_array_prop(const struct ltc4283_hwmon *st,
+ struct device *dev, const char *prop,
+ const u32 *vals, u32 n_vals)
+{
+ u32 prop_val;
+ int ret;
+ u32 i;
+
+ ret = device_property_read_u32(dev, prop, &prop_val);
+ if (ret)
+ return n_vals;
+
+ for (i = 0; i < n_vals; i++) {
+ if (prop_val != vals[i])
+ continue;
+
+ return i;
+ }
+
+ return dev_err_probe(dev, -EINVAL,
+ "Invalid %s property value %u\n", prop, prop_val);
+}
+
+static int ltc4283_get_defaults(struct ltc4283_hwmon *st)
+{
+ u32 reg_val, ilm_adjust, c;
+ int ret;
+
+ ret = regmap_read(st->map, LTC4283_METER_CONTROL, ®_val);
+ if (ret)
+ return ret;
+
+ st->energy_en = !FIELD_GET(LTC4283_METER_HALT_MASK, reg_val);
+
+ ret = regmap_read(st->map, LTC4283_CONFIG_1, ®_val);
+ if (ret)
+ return ret;
+
+ ilm_adjust = FIELD_GET(LTC4283_ILIM_MASK, reg_val);
+ st->vsense_max = LTC4283_VILIM_MIN_uV / MILLI + ilm_adjust;
+
+ ret = regmap_read(st->map, LTC4283_PGIO_CONFIG, ®_val);
+ if (ret)
+ return ret;
+
+ /* Can be latter overwritten in ltc4283_pgio_config() */
+ if (FIELD_GET(LTC4283_PGIO4_CFG_MASK, reg_val) < LTC4283_PGIO_FUNC_GPIO)
+ st->ext_fault = true;
+
+ /* VPWR and VIN are always enabled */
+ __set_bit(LTC4283_CHAN_VIN, &st->ch_enable_mask);
+ __set_bit(LTC4283_CHAN_VPWR, &st->ch_enable_mask);
+ for (c = LTC4283_CHAN_ADI_1; c < LTC4283_CHAN_MAX; c++) {
+ u32 chan = c - LTC4283_CHAN_ADI_1, bit;
+
+ ret = regmap_read(st->map, LTC4283_ADC_SELECT(chan), ®_val);
+ if (ret)
+ return ret;
+
+ bit = LTC4283_ADC_SELECT_MASK(chan);
+ if (c > LTC4283_CHAN_DRAIN)
+ /* account for two reserved fields after DRAIN */
+ bit <<= 2;
+
+ if (!(bit & reg_val))
+ continue;
+
+ __set_bit(c, &st->ch_enable_mask);
+ }
+
+ return 0;
+}
+
+static const char * const ltc4283_pgio1_funcs[] = {
+ "inverted_power_good", "power_good", "gpio"
+};
+
+static const char * const ltc4283_pgio2_funcs[] = {
+ "inverted_power_good", "power_good", "gpio", "active_current_limiting"
+};
+
+static const char * const ltc4283_pgio3_funcs[] = {
+ "inverted_power_good_input", "power_good_input", "gpio"
+};
+
+static const char * const ltc4283_pgio4_funcs[] = {
+ "inverted_external_fault", "external_fault", "gpio"
+};
+
+enum {
+ LTC4283_PIN_ADIO1,
+ LTC4283_PIN_ADIO2,
+ LTC4283_PIN_ADIO3,
+ LTC4283_PIN_ADIO4,
+ LTC4283_PIN_PGIO1,
+ LTC4283_PIN_PGIO2,
+ LTC4283_PIN_PGIO3,
+ LTC4283_PIN_PGIO4,
+};
+
+static int ltc4283_pgio_config(struct ltc4283_hwmon *st, struct device *dev)
+{
+ int ret, func;
+
+ func = device_property_match_property_string(dev, "adi,pgio1-func",
+ ltc4283_pgio1_funcs,
+ ARRAY_SIZE(ltc4283_pgio1_funcs));
+ if (func < 0 && func != -EINVAL)
+ return dev_err_probe(dev, func,
+ "Invalid adi,pgio1-func property\n");
+ if (func >= 0) {
+ if (func == LTC4283_PGIO_FUNC_GPIO) {
+ __set_bit(LTC4283_PIN_PGIO1, &st->gpio_mask);
+ /* If GPIO, default to an input pin. */
+ func++;
+ }
+
+ ret = regmap_update_bits(st->map, LTC4283_PGIO_CONFIG,
+ LTC4283_PGIO1_CFG_MASK,
+ FIELD_PREP(LTC4283_PGIO1_CFG_MASK, func));
+ if (ret)
+ return ret;
+ }
+
+ func = device_property_match_property_string(dev, "adi,pgio2-func",
+ ltc4283_pgio2_funcs,
+ ARRAY_SIZE(ltc4283_pgio2_funcs));
+
+ if (func < 0 && func != -EINVAL)
+ return dev_err_probe(dev, func,
+ "Invalid adi,pgio2-func property\n");
+ if (func >= 0) {
+ if (func != LTC4283_PGIO2_FUNC_ACLB) {
+ if (func == LTC4283_PGIO_FUNC_GPIO) {
+ __set_bit(LTC4283_PIN_PGIO2, &st->gpio_mask);
+ func++;
+ }
+
+ ret = regmap_update_bits(st->map, LTC4283_PGIO_CONFIG,
+ LTC4283_PGIO2_CFG_MASK,
+ FIELD_PREP(LTC4283_PGIO2_CFG_MASK, func));
+ } else {
+ ret = regmap_set_bits(st->map, LTC4283_CONTROL_1,
+ LTC4283_PIGIO2_ACLB_MASK);
+ }
+
+ if (ret)
+ return ret;
+ }
+
+ func = device_property_match_property_string(dev, "adi,pgio3-func",
+ ltc4283_pgio3_funcs,
+ ARRAY_SIZE(ltc4283_pgio3_funcs));
+
+ if (func < 0 && func != -EINVAL)
+ return dev_err_probe(dev, func,
+ "Invalid adi,pgio3-func property\n");
+ if (func >= 0) {
+ if (func == LTC4283_PGIO_FUNC_GPIO) {
+ __set_bit(LTC4283_PIN_PGIO3, &st->gpio_mask);
+ func++;
+ }
+
+ ret = regmap_update_bits(st->map, LTC4283_PGIO_CONFIG,
+ LTC4283_PGIO3_CFG_MASK,
+ FIELD_PREP(LTC4283_PGIO3_CFG_MASK, func));
+ if (ret)
+ return ret;
+ }
+
+ func = device_property_match_property_string(dev, "adi,pgio4-func",
+ ltc4283_pgio4_funcs,
+ ARRAY_SIZE(ltc4283_pgio4_funcs));
+
+ if (func < 0 && func != -EINVAL)
+ return dev_err_probe(dev, func,
+ "Invalid adi,pgio4-func property\n");
+ if (func >= 0) {
+ if (func == LTC4283_PGIO_FUNC_GPIO) {
+ __set_bit(LTC4283_PIN_PGIO4, &st->gpio_mask);
+ func++;
+ st->ext_fault = false;
+ } else {
+ st->ext_fault = true;
+ }
+
+ ret = regmap_update_bits(st->map, LTC4283_PGIO_CONFIG,
+ LTC4283_PGIO4_CFG_MASK,
+ FIELD_PREP(LTC4283_PGIO4_CFG_MASK, func));
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ltc4283_adio_config(struct ltc4283_hwmon *st, struct device *dev,
+ const char *prop, u32 pin)
+{
+ u32 adc_idx;
+ int ret;
+
+ if (!device_property_read_bool(dev, prop))
+ return 0;
+
+ adc_idx = LTC4283_CHAN_ADIO_1 - LTC4283_CHAN_ADI_1 + pin;
+ ret = regmap_clear_bits(st->map, LTC4283_ADC_SELECT(adc_idx),
+ LTC4283_ADC_SELECT_MASK(adc_idx));
+ if (ret)
+ return ret;
+
+ __set_bit(pin, &st->gpio_mask);
+ return 0;
+}
+
+static int ltc4283_pin_config(struct ltc4283_hwmon *st, struct device *dev)
+{
+ int ret;
+
+ ret = ltc4283_pgio_config(st, dev);
+ if (ret)
+ return ret;
+
+ ret = ltc4283_adio_config(st, dev, "adi,gpio-on-adio1", LTC4283_PIN_ADIO1);
+ if (ret)
+ return ret;
+
+ ret = ltc4283_adio_config(st, dev, "adi,gpio-on-adio2", LTC4283_PIN_ADIO2);
+ if (ret)
+ return ret;
+
+ ret = ltc4283_adio_config(st, dev, "adi,gpio-on-adio3", LTC4283_PIN_ADIO3);
+ if (ret)
+ return ret;
+
+ return ltc4283_adio_config(st, dev, "adi,gpio-on-adio4", LTC4283_PIN_ADIO4);
+}
+
+static const char * const ltc4283_oc_fet_retry[] = {
+ "latch-off", "1", "7", "unlimited"
+};
+
+static const u32 ltc4283_fb_factor[] = {
+ 100, 50, 20, 10
+};
+
+static const u32 ltc4283_cooling_dl[] = {
+ 512, 1002, 2005, 4100, 8190, 16400, 32800, 65600
+};
+
+static const u32 ltc4283_fet_bad_delay[] = {
+ 256, 512, 1002, 2005
+};
+
+static int ltc4283_setup(struct ltc4283_hwmon *st, struct device *dev)
+{
+ u32 val;
+ int ret;
+
+ /* The part has an eeprom so let's get the needed defaults from it */
+ ret = ltc4283_get_defaults(st);
+ if (ret)
+ return ret;
+
+ /*
+ * Default to LTC4283_MIN_RSENSE so we can probe without FW properties.
+ */
+ st->rsense = LTC4283_MIN_RSENSE;
+ ret = device_property_read_u32(dev, "adi,rsense-nano-ohms",
+ &st->rsense);
+ if (!ret) {
+ if (st->rsense < LTC4283_MIN_RSENSE || st->rsense > LTC4283_MAX_RSENSE)
+ return dev_err_probe(dev, -EINVAL,
+ "adi,rsense-nano-ohms(%u) too small or too large [%u %u]\n",
+ st->rsense, LTC4283_MIN_RSENSE, LTC4283_MAX_RSENSE);
+ }
+
+ /*
+ * The resolution for rsense is tenths of micro (eg: 62.5 uOhm) which
+ * means we need nano in the bindings. However, to make things easier to
+ * handle (with respect to overflows) we divide it by 100 as we don't
+ * really need the last two digits.
+ */
+ st->rsense /= CENTI;
+
+ ret = device_property_read_u32(dev, "adi,current-limit-sense-microvolt",
+ &st->vsense_max);
+ if (!ret) {
+ u32 reg_val;
+
+ if (!in_range(st->vsense_max, LTC4283_VILIM_MIN_uV,
+ LTC4283_VILIM_RANGE)) {
+ return dev_err_probe(dev, -EINVAL,
+ "adi,current-limit-sense-microvolt (%u) out of range [%u %u]\n",
+ st->vsense_max, LTC4283_VILIM_MIN_uV,
+ LTC4283_VILIM_MAX_uV);
+ }
+
+ st->vsense_max /= MILLI;
+ reg_val = FIELD_PREP(LTC4283_ILIM_MASK,
+ st->vsense_max - LTC4283_VILIM_MIN_uV / MILLI);
+ ret = regmap_update_bits(st->map, LTC4283_CONFIG_1,
+ LTC4283_ILIM_MASK, reg_val);
+ if (ret)
+ return ret;
+ }
+
+ ret = ltc4283_parse_array_prop(st, dev, "adi,current-limit-foldback-factor",
+ ltc4283_fb_factor, ARRAY_SIZE(ltc4283_fb_factor));
+ if (ret < 0)
+ return ret;
+ if (ret < ARRAY_SIZE(ltc4283_fb_factor)) {
+ ret = regmap_update_bits(st->map, LTC4283_CONFIG_1, LTC4283_FB_MASK,
+ FIELD_PREP(LTC4283_FB_MASK, ret));
+ if (ret)
+ return ret;
+ }
+
+ ret = ltc4283_parse_array_prop(st, dev, "adi,cooling-delay-ms",
+ ltc4283_cooling_dl, ARRAY_SIZE(ltc4283_cooling_dl));
+ if (ret < 0)
+ return ret;
+ if (ret < ARRAY_SIZE(ltc4283_cooling_dl)) {
+ ret = regmap_update_bits(st->map, LTC4283_CONFIG_2, LTC4283_COOLING_DL_MASK,
+ FIELD_PREP(LTC4283_COOLING_DL_MASK, ret));
+ if (ret)
+ return ret;
+ }
+
+ ret = ltc4283_parse_array_prop(st, dev, "adi,fet-bad-timer-delay-ms",
+ ltc4283_fet_bad_delay, ARRAY_SIZE(ltc4283_fet_bad_delay));
+ if (ret < 0)
+ return ret;
+ if (ret < ARRAY_SIZE(ltc4283_fet_bad_delay)) {
+ ret = regmap_update_bits(st->map, LTC4283_CONFIG_2, LTC4283_FTBD_DL_MASK,
+ FIELD_PREP(LTC4283_FTBD_DL_MASK, ret));
+ if (ret)
+ return ret;
+ }
+
+ ret = ltc4283_set_max_limits(st, dev);
+ if (ret)
+ return ret;
+
+ ret = ltc4283_pin_config(st, dev);
+ if (ret)
+ return ret;
+
+ if (device_property_read_bool(dev, "adi,power-good-reset-on-fet")) {
+ ret = regmap_clear_bits(st->map, LTC4283_CONTROL_1,
+ LTC4283_PWRGD_RST_CTRL_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,fet-turn-off-disable")) {
+ ret = regmap_clear_bits(st->map, LTC4283_CONTROL_1,
+ LTC4283_FET_BAD_OFF_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,tmr-pull-down-disable")) {
+ ret = regmap_set_bits(st->map, LTC4283_CONTROL_1,
+ LTC4283_THERM_TMR_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,dvdt-inrush-control-disable")) {
+ ret = regmap_clear_bits(st->map, LTC4283_CONTROL_1,
+ LTC4283_DVDT_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,undervoltage-retry-disable")) {
+ ret = regmap_clear_bits(st->map, LTC4283_CONTROL_2,
+ LTC4283_UV_RETRY_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,overvoltage-retry-disable")) {
+ ret = regmap_clear_bits(st->map, LTC4283_CONTROL_2,
+ LTC4283_OV_RETRY_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,external-fault-retry-enable")) {
+ if (!st->ext_fault)
+ return dev_err_probe(dev, -EINVAL,
+ "adi,external-fault-retry-enable set but PGIO4 not configured\n");
+ ret = regmap_set_bits(st->map, LTC4283_CONTROL_2,
+ LTC4283_EXT_FAULT_RETRY_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,fault-log-enable")) {
+ ret = regmap_set_bits(st->map, LTC4283_FAULT_LOG_CTRL,
+ LTC4283_FAULT_LOG_EN_MASK);
+ if (ret)
+ return ret;
+ }
+
+ ret = device_property_match_property_string(dev, "adi,overcurrent-retries",
+ ltc4283_oc_fet_retry,
+ ARRAY_SIZE(ltc4283_oc_fet_retry));
+ /* We still want to catch when an invalid string is given. */
+ if (ret < 0 && ret != -EINVAL)
+ return dev_err_probe(dev, ret,
+ "adi,overcurrent-retries invalid value\n");
+ if (ret >= 0) {
+ ret = regmap_update_bits(st->map, LTC4283_CONTROL_2,
+ LTC4283_OC_RETRY_MASK,
+ FIELD_PREP(LTC4283_OC_RETRY_MASK, ret));
+ if (ret)
+ return ret;
+ }
+
+ ret = device_property_match_property_string(dev, "adi,fet-bad-retries",
+ ltc4283_oc_fet_retry,
+ ARRAY_SIZE(ltc4283_oc_fet_retry));
+ if (ret < 0 && ret != -EINVAL)
+ return dev_err_probe(dev, ret,
+ "adi,fet-bad-retries invalid value\n");
+ if (ret >= 0) {
+ ret = regmap_update_bits(st->map, LTC4283_CONTROL_2,
+ LTC4283_FET_BAD_RETRY_MASK,
+ FIELD_PREP(LTC4283_FET_BAD_RETRY_MASK, ret));
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,external-fault-fet-off-enable")) {
+ if (!st->ext_fault)
+ return dev_err_probe(dev, -EINVAL,
+ "adi,external-fault-fet-off-enable set but PGIO4 not configured\n");
+ ret = regmap_set_bits(st->map, LTC4283_CONFIG_3,
+ LTC4283_EXTFLT_TURN_OFF_MASK);
+ if (ret)
+ return ret;
+ }
+
+ if (device_property_read_bool(dev, "adi,vpower-drns-enable")) {
+ u32 chan = LTC4283_CHAN_DRNS - LTC4283_CHAN_ADI_1;
+
+ __clear_bit(LTC4283_CHAN_DRNS, &st->ch_enable_mask);
+ /*
+ * Then, let's by default disable DRNS from ADC2 given that it
+ * is already being monitored by the VPWR channel. One can still
+ * enable it later on if needed.
+ */
+ ret = regmap_clear_bits(st->map, LTC4283_ADC_SELECT(chan),
+ LTC4283_ADC_SELECT_MASK(chan));
+ if (ret)
+ return ret;
+
+ val = 1;
+ } else {
+ val = 0;
+ }
+
+ ret = regmap_update_bits(st->map, LTC4283_CONFIG_3,
+ LTC4283_VPWR_DRNS_MASK,
+ FIELD_PREP(LTC4283_VPWR_DRNS_MASK, val));
+ if (ret)
+ return ret;
+
+ /* Make sure the ADC has 12bit resolution since we're assuming that. */
+ ret = regmap_update_bits(st->map, LTC4283_PGIO_CONFIG_2,
+ LTC4283_ADC_MASK,
+ FIELD_PREP(LTC4283_ADC_MASK, 3));
+ if (ret)
+ return ret;
+
+ /* Energy reads (which are 6 byte block reads) rely on page access */
+ ret = regmap_set_bits(st->map, LTC4283_CONTROL_1, LTC4283_RW_PAGE_MASK);
+ if (ret)
+ return ret;
+
+ /*
+ * Make sure we are integrating power as we only support reporting
+ * consumed energy.
+ */
+ return regmap_clear_bits(st->map, LTC4283_METER_CONTROL,
+ LTC4283_INTEGRATE_I_MASK);
+}
+
+static const struct hwmon_channel_info * const ltc4283_info[] = {
+ HWMON_CHANNEL_INFO(in,
+ HWMON_I_LCRIT_ALARM | HWMON_I_CRIT_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_MAX_ALARM | HWMON_I_RESET_HISTORY |
+ HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_FAULT | HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LOWEST | HWMON_I_HIGHEST |
+ HWMON_I_MAX | HWMON_I_MIN | HWMON_I_MIN_ALARM |
+ HWMON_I_RESET_HISTORY | HWMON_I_MAX_ALARM |
+ HWMON_I_ENABLE | HWMON_I_LABEL),
+ HWMON_CHANNEL_INFO(curr,
+ HWMON_C_INPUT | HWMON_C_LOWEST | HWMON_C_HIGHEST |
+ HWMON_C_MAX | HWMON_C_MIN | HWMON_C_MIN_ALARM |
+ HWMON_C_MAX_ALARM | HWMON_C_CRIT_ALARM |
+ HWMON_C_RESET_HISTORY | HWMON_C_LABEL),
+ HWMON_CHANNEL_INFO(power,
+ HWMON_P_INPUT | HWMON_P_INPUT_LOWEST |
+ HWMON_P_INPUT_HIGHEST | HWMON_P_MAX | HWMON_P_MIN |
+ HWMON_P_MAX_ALARM | HWMON_P_MIN_ALARM |
+ HWMON_P_RESET_HISTORY | HWMON_P_LABEL),
+ HWMON_CHANNEL_INFO(energy,
+ HWMON_E_ENABLE),
+ HWMON_CHANNEL_INFO(energy64,
+ HWMON_E_INPUT),
+ NULL
+};
+
+static const struct hwmon_ops ltc4283_ops = {
+ .read = ltc4283_read,
+ .write = ltc4283_write,
+ .is_visible = ltc4283_is_visible,
+ .read_string = ltc4283_read_labels,
+};
+
+static const struct hwmon_chip_info ltc4283_chip_info = {
+ .ops = <c4283_ops,
+ .info = ltc4283_info,
+};
+
+static int ltc4283_show_fault_log(void *arg, u64 *val, u32 mask)
+{
+ struct ltc4283_hwmon *st = arg;
+ long alarm;
+ int ret;
+
+ ret = ltc4283_read_alarm(st, LTC4283_FAULT_LOG, mask, &alarm);
+ if (ret)
+ return ret;
+
+ *val = alarm;
+
+ return 0;
+}
+
+static int ltc4283_show_in0_lcrit_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_UV_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_in0_lcrit_fault_log,
+ ltc4283_show_in0_lcrit_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_in0_crit_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_OV_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_in0_crit_fault_log,
+ ltc4283_show_in0_crit_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_fet_bad_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_FET_BAD_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_fet_bad_fault_log,
+ ltc4283_show_fet_bad_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_fet_short_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_FET_SHORT_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_fet_short_fault_log,
+ ltc4283_show_fet_short_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_curr1_crit_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_OC_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_curr1_crit_fault_log,
+ ltc4283_show_curr1_crit_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_power1_failed_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_PWR_FAIL_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_power1_failed_fault_log,
+ ltc4283_show_power1_failed_fault_log, NULL, "%llu\n");
+
+static int ltc4283_show_power1_good_input_fault_log(void *arg, u64 *val)
+{
+ return ltc4283_show_fault_log(arg, val, LTC4283_PGI_FAULT_MASK);
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ltc4283_power1_good_input_fault_log,
+ ltc4283_show_power1_good_input_fault_log, NULL, "%llu\n");
+
+static void ltc4283_debugfs_init(struct ltc4283_hwmon *st, struct i2c_client *i2c)
+{
+ debugfs_create_file_unsafe("in0_crit_fault_log", 0400, i2c->debugfs, st,
+ <c4283_in0_crit_fault_log);
+ debugfs_create_file_unsafe("in0_lcrit_fault_log", 0400, i2c->debugfs, st,
+ <c4283_in0_lcrit_fault_log);
+ debugfs_create_file_unsafe("in11_fet_bad_fault_log", 0400, i2c->debugfs, st,
+ <c4283_fet_bad_fault_log);
+ debugfs_create_file_unsafe("in11_fet_short_fault_log", 0400, i2c->debugfs, st,
+ <c4283_fet_short_fault_log);
+ debugfs_create_file_unsafe("curr1_crit_fault_log", 0400, i2c->debugfs, st,
+ <c4283_curr1_crit_fault_log);
+ debugfs_create_file_unsafe("power1_failed_fault_log", 0400, i2c->debugfs, st,
+ <c4283_power1_failed_fault_log);
+ debugfs_create_file_unsafe("power1_good_input_fault_log", 0400, i2c->debugfs,
+ st, <c4283_power1_good_input_fault_log);
+}
+
+static bool ltc4283_is_word_reg(unsigned int reg)
+{
+ return reg >= LTC4283_SENSE && reg <= LTC4283_ADIO34_MAX;
+}
+
+static int ltc4283_reg_read(void *context, unsigned int reg, unsigned int *val)
+{
+ struct i2c_client *client = context;
+ int ret;
+
+ if (ltc4283_is_word_reg(reg))
+ ret = i2c_smbus_read_word_swapped(client, reg);
+ else
+ ret = i2c_smbus_read_byte_data(client, reg);
+
+ if (ret < 0)
+ return ret;
+
+ *val = ret;
+ return 0;
+}
+
+static int ltc4283_reg_write(void *context, unsigned int reg, unsigned int val)
+{
+ struct i2c_client *client = context;
+
+ if (ltc4283_is_word_reg(reg))
+ return i2c_smbus_write_word_swapped(client, reg, val);
+
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static const struct regmap_bus ltc4283_regmap_bus = {
+ .reg_read = ltc4283_reg_read,
+ .reg_write = ltc4283_reg_write,
+};
+
+static bool ltc4283_writable_reg(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case LTC4283_SYSTEM_STATUS ... LTC4283_FAULT_STATUS:
+ return false;
+ case LTC4283_RESERVED_OC:
+ return false;
+ case LTC4283_RESERVED_86 ... LTC4283_RESERVED_8F:
+ return false;
+ case LTC4283_RESERVED_91 ... LTC4283_RESERVED_A1:
+ return false;
+ case LTC4283_RESERVED_A3:
+ return false;
+ case LTC4283_RESERVED_AC:
+ return false;
+ case LTC4283_POWER_PLAY_MSB ... LTC4283_POWER_PLAY_LSB:
+ return false;
+ case LTC4283_RESERVED_F1 ... LTC4283_RESERVED_FF:
+ return false;
+ default:
+ return true;
+ }
+}
+
+static const struct regmap_config ltc4283_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 16,
+ .max_register = 0xFF,
+ .writeable_reg = ltc4283_writable_reg,
+};
+
+static int ltc4283_probe(struct i2c_client *client)
+{
+ struct device *dev = &client->dev, *hwmon;
+ struct auxiliary_device *adev;
+ struct ltc4283_hwmon *st;
+ int ret, id;
+
+ st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
+ if (!st)
+ return -ENOMEM;
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA |
+ I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_SMBUS_READ_I2C_BLOCK))
+ return -EOPNOTSUPP;
+
+ st->client = client;
+ st->map = devm_regmap_init(dev, <c4283_regmap_bus, client,
+ <c4283_regmap_config);
+ if (IS_ERR(st->map))
+ return dev_err_probe(dev, PTR_ERR(st->map),
+ "Failed to create regmap\n");
+
+ ret = ltc4283_setup(st, dev);
+ if (ret)
+ return ret;
+
+ hwmon = devm_hwmon_device_register_with_info(dev, "ltc4283", st,
+ <c4283_chip_info, NULL);
+
+ if (IS_ERR(hwmon))
+ return PTR_ERR(hwmon);
+
+ ltc4283_debugfs_init(st, client);
+
+ if (!st->gpio_mask)
+ return 0;
+
+ id = (client->adapter->nr << 10) | client->addr;
+ adev = __devm_auxiliary_device_create(dev, KBUILD_MODNAME, "gpio",
+ &st->gpio_mask, id);
+ if (!adev)
+ return dev_err_probe(dev, -ENODEV, "Failed to add GPIO device\n");
+
+ return 0;
+}
+
+static const struct of_device_id ltc4283_of_match[] = {
+ { .compatible = "adi,ltc4283" },
+ { }
+};
+
+static const struct i2c_device_id ltc4283_i2c_id[] = {
+ { "ltc4283" },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ltc4283_i2c_id);
+
+static struct i2c_driver ltc4283_driver = {
+ .driver = {
+ .name = "ltc4283",
+ .of_match_table = ltc4283_of_match,
+ },
+ .probe = ltc4283_probe,
+ .id_table = ltc4283_i2c_id,
+};
+module_i2c_driver(ltc4283_driver);
+
+MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
+MODULE_DESCRIPTION("LTC4283 Hot Swap Controller driver");
+MODULE_LICENSE("GPL");
--
2.54.0
^ permalink raw reply related
* [PATCH v13 3/3] gpio: gpio-ltc4283: Add support for the LTC4283 Swap Controller
From: Nuno Sá via B4 Relay @ 2026-05-02 9:56 UTC (permalink / raw)
To: linux-gpio, linux-hwmon, devicetree, linux-doc
Cc: Guenter Roeck, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski,
Bartosz Golaszewski
In-Reply-To: <20260502-ltc4283-support-v13-0-1c206542e652@analog.com>
From: Nuno Sá <nuno.sa@analog.com>
The LTC4283 device has up to 8 pins that can be configured as GPIOs.
Note that PGIO pins are not set as GPIOs by default so if they are
configured to be used as GPIOs we need to make sure to initialize them
to a sane default. They are set as inputs by default.
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
MAINTAINERS | 2 +
drivers/gpio/Kconfig | 15 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-ltc4283.c | 218 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 236 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c657ca0a4652..de6bc7828f28 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15240,9 +15240,11 @@ F: drivers/hwmon/ltc4282.c
LTC4283 HARDWARE MONITOR AND GPIO DRIVER
M: Nuno Sá <nuno.sa@analog.com>
+L: linux-gpio@vger.kernel.org
L: linux-hwmon@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml
+F: drivers/gpio/gpio-ltc4283.c
F: drivers/hwmon/ltc4283.c
LTC4286 HARDWARE MONITOR DRIVER
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 020e51e30317..9b6e0a34eff6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1783,6 +1783,21 @@ config GPIO_WM8994
endmenu
+menu "Auxiliary Bus GPIO drivers"
+ depends on AUXILIARY_BUS
+
+config GPIO_LTC4283
+ tristate "Analog Devices LTC4283 GPIO support"
+ depends on SENSORS_LTC4283
+ help
+ If you say yes here you want the GPIO function available in Analog
+ Devices LTC4283 Negative Voltage Hot Swap Controller.
+
+ This driver can also be built as a module. If so, the module will
+ be called gpio-ltc4283.
+
+endmenu
+
menu "PCI GPIO expanders"
depends on PCI
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b267598b517d..6e2367cab94f 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
obj-$(CONFIG_GPIO_LPC32XX) += gpio-lpc32xx.o
+obj-$(CONFIG_GPIO_LTC4283) += gpio-ltc4283.o
obj-$(CONFIG_GPIO_MACSMC) += gpio-macsmc.o
obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
diff --git a/drivers/gpio/gpio-ltc4283.c b/drivers/gpio/gpio-ltc4283.c
new file mode 100644
index 000000000000..6609443c5d62
--- /dev/null
+++ b/drivers/gpio/gpio-ltc4283.c
@@ -0,0 +1,218 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Analog Devices LTC4283 GPIO driver
+ *
+ * Copyright 2025 Analog Devices Inc.
+ */
+
+#include <linux/auxiliary_bus.h>
+#include <linux/bitfield.h>
+#include <linux/bitmap.h>
+#include <linux/bits.h>
+#include <linux/device.h>
+#include <linux/gpio/driver.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+
+#define LTC4283_PINS_MAX 8
+#define LTC4283_PGIOX_START_NR 4
+#define LTC4283_INPUT_STATUS 0x02
+#define LTC4283_PGIO_CONFIG 0x10
+#define LTC4283_PGIO_CFG_MASK(pin) \
+ GENMASK(((pin) - LTC4283_PGIOX_START_NR) * 2 + 1, (((pin) - LTC4283_PGIOX_START_NR) * 2))
+#define LTC4283_PGIO_CONFIG_2 0x11
+
+#define LTC4283_ADIO_CONFIG 0x12
+/* starts at bit 4 */
+#define LTC4283_ADIOX_CONFIG_MASK(pin) BIT((pin) + 4)
+#define LTC4283_PGIO_DIR_IN 3
+#define LTC4283_PGIO_DIR_OUT 2
+
+struct ltc4283_gpio {
+ struct gpio_chip gpio_chip;
+ struct regmap *regmap;
+};
+
+static int ltc4283_pgio_get_direction(const struct ltc4283_gpio *st, unsigned int off)
+{
+ unsigned int val;
+ int ret;
+
+ ret = regmap_read(st->regmap, LTC4283_PGIO_CONFIG, &val);
+ if (ret)
+ return ret;
+
+ val = field_get(LTC4283_PGIO_CFG_MASK(off), val);
+ if (val == LTC4283_PGIO_DIR_IN)
+ return GPIO_LINE_DIRECTION_IN;
+
+ return GPIO_LINE_DIRECTION_OUT;
+}
+
+static int ltc4283_gpio_get_direction(struct gpio_chip *gc, unsigned int off)
+{
+ struct ltc4283_gpio *st = gpiochip_get_data(gc);
+ unsigned int val;
+ int ret;
+
+ if (off >= LTC4283_PGIOX_START_NR)
+ return ltc4283_pgio_get_direction(st, off);
+
+ ret = regmap_read(st->regmap, LTC4283_ADIO_CONFIG, &val);
+ if (ret)
+ return ret;
+
+ if (val & LTC4283_ADIOX_CONFIG_MASK(off))
+ return GPIO_LINE_DIRECTION_IN;
+
+ return GPIO_LINE_DIRECTION_OUT;
+}
+
+static int ltc4283_gpio_direction_set(const struct ltc4283_gpio *st,
+ unsigned int off, bool input)
+{
+ if (off >= LTC4283_PGIOX_START_NR) {
+ unsigned int val = LTC4283_PGIO_DIR_OUT;
+
+ if (input)
+ val = LTC4283_PGIO_DIR_IN;
+
+ val = field_prep(LTC4283_PGIO_CFG_MASK(off), val);
+ return regmap_update_bits(st->regmap, LTC4283_PGIO_CONFIG,
+ LTC4283_PGIO_CFG_MASK(off), val);
+ }
+
+ return regmap_update_bits(st->regmap, LTC4283_ADIO_CONFIG,
+ LTC4283_ADIOX_CONFIG_MASK(off),
+ field_prep(LTC4283_ADIOX_CONFIG_MASK(off), input));
+}
+
+static int __ltc4283_gpio_set_value(const struct ltc4283_gpio *st,
+ unsigned int off, int val)
+{
+ u32 reg = off < LTC4283_PGIOX_START_NR ? LTC4283_ADIO_CONFIG : LTC4283_PGIO_CONFIG_2;
+
+ return regmap_update_bits(st->regmap, reg, BIT(off),
+ field_prep(BIT(off), !!val));
+}
+
+static int ltc4283_gpio_direction_input(struct gpio_chip *gc, unsigned int off)
+{
+ struct ltc4283_gpio *st = gpiochip_get_data(gc);
+
+ return ltc4283_gpio_direction_set(st, off, true);
+}
+
+static int ltc4283_gpio_direction_output(struct gpio_chip *gc, unsigned int off, int val)
+{
+ struct ltc4283_gpio *st = gpiochip_get_data(gc);
+ int ret;
+
+ ret = ltc4283_gpio_direction_set(st, off, false);
+ if (ret)
+ return ret;
+
+ return __ltc4283_gpio_set_value(st, off, val);
+}
+
+static int ltc4283_gpio_get_value(struct gpio_chip *gc, unsigned int off)
+{
+ struct ltc4283_gpio *st = gpiochip_get_data(gc);
+ unsigned int val, reg;
+ int ret, dir;
+
+ dir = ltc4283_gpio_get_direction(gc, off);
+ if (dir < 0)
+ return dir;
+
+ if (dir == GPIO_LINE_DIRECTION_IN) {
+ ret = regmap_read(st->regmap, LTC4283_INPUT_STATUS, &val);
+ if (ret)
+ return ret;
+
+ /* ADIO1 is at bit 3. */
+ if (off < LTC4283_PGIOX_START_NR)
+ return !!(val & BIT(3 - off));
+
+ /* PGIO1 is at bit 7. */
+ return !!(val & BIT(7 - (off - LTC4283_PGIOX_START_NR)));
+ }
+
+ if (off < LTC4283_PGIOX_START_NR)
+ reg = LTC4283_ADIO_CONFIG;
+ else
+ reg = LTC4283_PGIO_CONFIG_2;
+
+ ret = regmap_read(st->regmap, reg, &val);
+ if (ret)
+ return ret;
+
+ return !!(val & BIT(off));
+}
+
+static int ltc4283_gpio_set_value(struct gpio_chip *gc, unsigned int off, int val)
+{
+ struct ltc4283_gpio *st = gpiochip_get_data(gc);
+
+ return __ltc4283_gpio_set_value(st, off, val);
+}
+
+static int ltc4283_init_valid_mask(struct gpio_chip *gc, unsigned long *valid_mask,
+ unsigned int ngpios)
+{
+ unsigned long *mask = dev_get_platdata(gc->parent);
+
+ bitmap_copy(valid_mask, mask, ngpios);
+ return 0;
+}
+
+static int ltc4283_gpio_probe(struct auxiliary_device *adev,
+ const struct auxiliary_device_id *id)
+{
+ struct device *dev = &adev->dev;
+ struct ltc4283_gpio *st;
+ struct gpio_chip *gc;
+
+ st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
+ if (!st)
+ return -ENOMEM;
+
+ st->regmap = dev_get_regmap(dev->parent, NULL);
+ if (!st->regmap)
+ return dev_err_probe(dev, -ENODEV,
+ "Failed to get regmap\n");
+
+ gc = &st->gpio_chip;
+ gc->parent = dev;
+ gc->get_direction = ltc4283_gpio_get_direction;
+ gc->direction_input = ltc4283_gpio_direction_input;
+ gc->direction_output = ltc4283_gpio_direction_output;
+ gc->get = ltc4283_gpio_get_value;
+ gc->set = ltc4283_gpio_set_value;
+ gc->init_valid_mask = ltc4283_init_valid_mask;
+ gc->can_sleep = true;
+
+ gc->base = -1;
+ gc->ngpio = LTC4283_PINS_MAX;
+ gc->label = adev->name;
+ gc->owner = THIS_MODULE;
+
+ return devm_gpiochip_add_data(dev, &st->gpio_chip, st);
+}
+
+static const struct auxiliary_device_id ltc4283_aux_id_table[] = {
+ { "ltc4283.gpio" },
+ { }
+};
+MODULE_DEVICE_TABLE(auxiliary, ltc4283_aux_id_table);
+
+static struct auxiliary_driver ltc4283_gpio_driver = {
+ .probe = ltc4283_gpio_probe,
+ .id_table = ltc4283_aux_id_table,
+};
+module_auxiliary_driver(ltc4283_gpio_driver);
+
+MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
+MODULE_DESCRIPTION("GPIO LTC4283 Driver");
+MODULE_LICENSE("GPL");
--
2.54.0
^ permalink raw reply related
* [PATCH v13 1/3] dt-bindings: hwmon: Document the LTC4283 Swap Controller
From: Nuno Sá via B4 Relay @ 2026-05-02 9:56 UTC (permalink / raw)
To: linux-gpio, linux-hwmon, devicetree, linux-doc
Cc: Guenter Roeck, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski
In-Reply-To: <20260502-ltc4283-support-v13-0-1c206542e652@analog.com>
From: Nuno Sá <nuno.sa@analog.com>
The LTC4283 is a negative voltage hot swap controller that drives an
external N-channel MOSFET to allow a board to be safely inserted and
removed from a live backplane.
Special note for the "adi,vpower-drns-enable" property. It allows to choose
between the attenuated MOSFET drain voltage or the attenuated input
voltage at the RTNS pin (effectively choosing between input or output
power). This is a system level decision not really intended to change at
runtime and hence is being added as a Firmware property.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
.../devicetree/bindings/hwmon/adi,ltc4283.yaml | 272 +++++++++++++++++++++
MAINTAINERS | 6 +
2 files changed, 278 insertions(+)
diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml
new file mode 100644
index 000000000000..05e2132ad4d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml
@@ -0,0 +1,272 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/adi,ltc4283.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LTC4283 Negative Voltage Hot Swap Controller
+
+maintainers:
+ - Nuno Sá <nuno.sa@analog.com>
+
+description: |
+ The LTC4283 negative voltage hot swap controller drives an external N-channel
+ MOSFET to allow a board to be safely inserted and removed from a live
+ backplane.
+
+ https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4283.pdf
+
+properties:
+ compatible:
+ enum:
+ - adi,ltc4283
+
+ reg:
+ maxItems: 1
+
+ adi,rsense-nano-ohms:
+ description: Value of the sense resistor.
+
+ adi,current-limit-sense-microvolt:
+ description:
+ The current limit sense voltage of the chip is adjustable between
+ 15mV and 30mV in 1mV steps. This effectively limits the current
+ on the load.
+ minimum: 15000
+ maximum: 30000
+ default: 15000
+
+ adi,current-limit-foldback-factor:
+ description:
+ Specifies the foldback factor for the current limit. The current limit
+ can be reduced (folded back) to one of four preset levels. The value
+ represents the percentage of the current limit sense voltage to use
+ during foldback. A value of 100 means no foldback.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [10, 20, 50, 100]
+ default: 100
+
+ adi,cooling-delay-ms:
+ description:
+ Cooling time to apply after an overcurrent fault, FET bad or
+ external fault.
+ enum: [512, 1002, 2005, 4100, 8190, 16400, 32800, 65600]
+ default: 512
+
+ adi,fet-bad-timer-delay-ms:
+ description:
+ FET bad timer delay. After a FET bad status condition is detected,
+ this timer is started. If the condition persists for the
+ specified time, the FET is turned off and a fault is logged.
+ enum: [256, 512, 1002, 2005]
+ default: 256
+
+ adi,power-good-reset-on-fet:
+ description:
+ If set, resets the power good status when the MOSFET is turned off.
+ Otherwise, it resets when a low output voltage is detected.
+ type: boolean
+
+ adi,fet-turn-off-disable:
+ description:
+ If set, the MOSFET is not turned off when a FET fault is detected.
+ type: boolean
+
+ adi,tmr-pull-down-disable:
+ description: Disables 2uA pull-down current on the TMR pin.
+ type: boolean
+
+ adi,dvdt-inrush-control-disable:
+ description:
+ Disables dV/dt inrush control during startup. In dV/dt mode, the inrush
+ current is limited by controlling a constant output voltage ramp rate.
+ When disabled, the inrush control mechanism is active current limiting.
+ type: boolean
+
+ adi,fault-log-enable:
+ description:
+ If set, enables logging fault registers and ADC data into EEPROM upon a
+ fault.
+ type: boolean
+
+ adi,vpower-drns-enable:
+ description:
+ If set, enables the attenuated MOSFET drain voltage to be monitored. This
+ effectively means that the MOSFET power is monitored. If not set, the
+ attenuated input voltage (and hence input power) is monitored.
+ type: boolean
+
+ adi,external-fault-fet-off-enable:
+ description: Turns MOSFET off following an external fault.
+ type: boolean
+
+ adi,undervoltage-retry-disable:
+ description: Do not retry to turn on the MOSFET after an undervoltage fault.
+ type: boolean
+
+ adi,overvoltage-retry-disable:
+ description: Do not retry to turn on the MOSFET after an overvoltage fault.
+ type: boolean
+
+ adi,external-fault-retry-enable:
+ description: Retry to turn on the MOSFET after an external fault.
+ type: boolean
+
+ adi,overcurrent-retries:
+ description: Configures auto-retry following an Overcurrent fault.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [latch-off, "1", "7", unlimited]
+ default: latch-off
+
+ adi,fet-bad-retries:
+ description:
+ Configures auto-retry following a FET bad fault and a consequent MOSFET
+ turn off.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [latch-off, "1", "7", unlimited]
+ default: latch-off
+
+ adi,pgio1-func:
+ description: Configures the function of the PGIO1 pin.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [inverted_power_good, power_good, gpio]
+ default: inverted_power_good
+
+ adi,pgio2-func:
+ description: Configures the function of the PGIO2 pin.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [inverted_power_good, power_good, gpio, active_current_limiting]
+ default: inverted_power_good
+
+ adi,pgio3-func:
+ description: Configures the function of the PGIO3 pin.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [inverted_power_good_input, power_good_input, gpio]
+ default: inverted_power_good_input
+
+ adi,pgio4-func:
+ description: Configures the function of the PGIO4 pin.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [inverted_external_fault, external_fault, gpio]
+ default: inverted_external_fault
+
+ adi,gpio-on-adio1:
+ description: If set, the ADIO1 pin is used as a GPIO.
+ type: boolean
+
+ adi,gpio-on-adio2:
+ description: If set, the ADIO2 pin is used as a GPIO.
+ type: boolean
+
+ adi,gpio-on-adio3:
+ description: If set, the ADIO3 pin is used as a GPIO.
+ type: boolean
+
+ adi,gpio-on-adio4:
+ description: If set, the ADIO4 pin is used as a GPIO.
+ type: boolean
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+dependencies:
+ adi,gpio-on-adio1:
+ - gpio-controller
+ - '#gpio-cells'
+ adi,gpio-on-adio2:
+ - gpio-controller
+ - '#gpio-cells'
+ adi,gpio-on-adio3:
+ - gpio-controller
+ - '#gpio-cells'
+ adi,gpio-on-adio4:
+ - gpio-controller
+ - '#gpio-cells'
+ adi,external-fault-retry-enable:
+ - adi,pgio4-func
+ adi,external-fault-fet-off-enable:
+ - adi,pgio4-func
+
+required:
+ - compatible
+ - reg
+ - adi,rsense-nano-ohms
+
+allOf:
+ - if:
+ properties:
+ adi,pgio1-func:
+ const: gpio
+ required:
+ - adi,pgio1-func
+ then:
+ required:
+ - gpio-controller
+ - '#gpio-cells'
+
+ - if:
+ properties:
+ adi,pgio2-func:
+ const: gpio
+ required:
+ - adi,pgio2-func
+ then:
+ required:
+ - gpio-controller
+ - '#gpio-cells'
+
+ - if:
+ properties:
+ adi,pgio3-func:
+ const: gpio
+ required:
+ - adi,pgio3-func
+ then:
+ required:
+ - gpio-controller
+ - '#gpio-cells'
+
+ - if:
+ properties:
+ adi,pgio4-func:
+ const: gpio
+ required:
+ - adi,pgio4-func
+ then:
+ properties:
+ adi,external-fault-retry-enable: false
+ adi,external-fault-fet-off-enable: false
+ required:
+ - gpio-controller
+ - '#gpio-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swap-controller@15 {
+ compatible = "adi,ltc4283";
+ reg = <0x15>;
+
+ adi,rsense-nano-ohms = <500>;
+ adi,current-limit-sense-microvolt = <25000>;
+ adi,current-limit-foldback-factor = <10>;
+ adi,cooling-delay-ms = <8190>;
+ adi,fet-bad-timer-delay-ms = <512>;
+
+ adi,external-fault-fet-off-enable;
+ adi,pgio4-func = "external_fault";
+
+ adi,gpio-on-adio1;
+ adi,pgio1-func = "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index c77860210bd5..76dd9edca7d5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15238,6 +15238,12 @@ F: Documentation/devicetree/bindings/hwmon/adi,ltc4282.yaml
F: Documentation/hwmon/ltc4282.rst
F: drivers/hwmon/ltc4282.c
+LTC4283 HARDWARE MONITOR AND GPIO DRIVER
+M: Nuno Sá <nuno.sa@analog.com>
+L: linux-hwmon@vger.kernel.org
+S: Supported
+F: Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml
+
LTC4286 HARDWARE MONITOR DRIVER
M: Delphine CC Chiu <Delphine_CC_Chiu@Wiwynn.com>
L: linux-hwmon@vger.kernel.org
--
2.54.0
^ permalink raw reply related
* [PATCH v13 0/3] hwmon: Add support for the LTC4283 Hot Swap Controller
From: Nuno Sá via B4 Relay @ 2026-05-02 9:56 UTC (permalink / raw)
To: linux-gpio, linux-hwmon, devicetree, linux-doc
Cc: Guenter Roeck, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski,
Bartosz Golaszewski
This is v8 for the LTC4283 how swap controller.
Similar to the LTC4282 device, we're clearing some fault logs in the
reset_history attributes.
Guenter, for my last email worrying about rsense low values, this is
what I got internally:
"10uOhm at the smallest sense voltage of 15mV would be 1500A and 72kW, which
seems a tad excessive. The highest currents I’ve seen are around 200A, and
the -48V market 4283 serves is generally a lot lower than that. Normal values
are around 200uOhm. I’d say the resolution should be around 1uohm and if a
minimum is needed, 50uOhm is probably safe."
For the resolution, I'm pretty sure I got the tenths of micro
resolution for ltc4282 so I just kept it in here. So, if you don't mind
I would prefer to keep it this way to be safer and changing that now would
require me to change some formulas and I would prefer not to do that at
this stage.
---
Changes in v13:
- Patch 2
* Properly register debugfs fet faults to match DRAIN channel (in11).
- Link to v12: https://patch.msgid.link/20260430-ltc4283-support-v12-0-5dc9901f2567@analog.com
---
Nuno Sá (3):
dt-bindings: hwmon: Document the LTC4283 Swap Controller
hwmon: ltc4283: Add support for the LTC4283 Swap Controller
gpio: gpio-ltc4283: Add support for the LTC4283 Swap Controller
.../devicetree/bindings/hwmon/adi,ltc4283.yaml | 272 +++
Documentation/hwmon/index.rst | 1 +
Documentation/hwmon/ltc4283.rst | 267 +++
MAINTAINERS | 9 +
drivers/gpio/Kconfig | 15 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-ltc4283.c | 218 +++
drivers/hwmon/Kconfig | 12 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ltc4283.c | 1795 ++++++++++++++++++++
10 files changed, 2591 insertions(+)
---
base-commit: 992920ad25f27f41521c1bb905d0e1062ecb9e93
change-id: 20260303-ltc4283-support-063f78acc5a4
--
Thanks!
- Nuno Sá
^ permalink raw reply
* Re: [PATCH v4] docs/ja_JP: translate more of submitting-patches.rst
From: Akira Yokosawa @ 2026-05-02 9:30 UTC (permalink / raw)
To: Akiyoshi Kurita; +Cc: linux-kernel, corbet, linux-doc
In-Reply-To: <20260502070143.1015416-1-weibu@redadmin.org>
On Sat, 2 May 2026 16:01:43 +0900, Akiyoshi Kurita wrote:
> Translate the "Separate your changes", "Style-check your changes",
> and "Select the recipients for your patch" sections in
> Documentation/translations/ja_JP/process/submitting-patches.rst.
>
> Keep the wording close to the English text and wrap lines to match
> the style used in the surrounding Japanese translation.
>
> Signed-off-by: Akiyoshi Kurita <weibu@redadmin.org>
> ---
> v4:
> - Rebase onto docs-next
>
> .../ja_JP/process/submitting-patches.rst | 127 +++++++++++++++++-
> 1 file changed, 120 insertions(+), 7 deletions(-)
>
Looks good to me.
Acked-by: Akira Yokosawa <akiyks@gmail.com>
Thanks, Akira
^ permalink raw reply
* [PATCH v4] docs/ja_JP: translate more of submitting-patches.rst
From: Akiyoshi Kurita @ 2026-05-02 7:01 UTC (permalink / raw)
To: linux-doc; +Cc: linux-kernel, corbet, akiyks, Akiyoshi Kurita
Translate the "Separate your changes", "Style-check your changes",
and "Select the recipients for your patch" sections in
Documentation/translations/ja_JP/process/submitting-patches.rst.
Keep the wording close to the English text and wrap lines to match
the style used in the surrounding Japanese translation.
Signed-off-by: Akiyoshi Kurita <weibu@redadmin.org>
---
v4:
- Rebase onto docs-next
.../ja_JP/process/submitting-patches.rst | 127 +++++++++++++++++-
1 file changed, 120 insertions(+), 7 deletions(-)
diff --git a/Documentation/translations/ja_JP/process/submitting-patches.rst b/Documentation/translations/ja_JP/process/submitting-patches.rst
index 9d63220abd15..928e38a8d34d 100644
--- a/Documentation/translations/ja_JP/process/submitting-patches.rst
+++ b/Documentation/translations/ja_JP/process/submitting-patches.rst
@@ -83,19 +83,18 @@ Linux の多くの環境は、上流から特定のパッチだけを取り込
詳しく説明してください。コードが意図したとおりに動作していることを
レビューアが確認できるよう、変更内容を平易な言葉で書き下すことが重要です。
-パッチの説明が Linux のソースコード管理システム ``git`` の「コミットログ」
-としてそのまま取り込める形で書かれていれば、メンテナは助かります。
-詳細は原文の該当節 ("The canonical patch format") を参照してください。
+パッチ説明を Linux のソースコード管理システム ``git`` の
+「コミットログ」としてそのまま取り込める形で書けば、メンテナは
+助かります。詳細は原文の該当節 ("The canonical patch format") を
+参照してください。
.. TODO: Convert to file-local cross-reference when the destination is
translated.
1 つのパッチでは 1 つの問題だけを解決してください。記述が長くなり
-始めたら、それはパッチを分割すべきサインです。
-詳細は原文の該当節 ("Separate your changes") を参照してください。
+始めたら、パッチを分割すべきサインです。詳細は `変更を分割する`_ を
+参照してください。
-.. TODO: Convert to file-local cross-reference when the destination is
- translated.
パッチまたはパッチシリーズを投稿／再投稿する際は、その完全な
説明と、それを正当化する理由を含めてください。単に「これはパッチ
@@ -179,3 +178,117 @@ URL は禁止です。
$ git log -1 --pretty=fixes 54a4f0239f2e
Fixes: 54a4f0239f2e ("KVM: MMU: make kvm_mmu_zap_page() return the number of pages it actually freed")
+
+変更を分割する
+--------------
+
+各 **論理的な変更** は、個別のパッチに分けてください。
+
+たとえば、単一のドライバに対する変更にバグ修正と性能改善の
+両方が含まれるなら、それらは 2 つ以上のパッチに分けてください。
+変更に API の更新と、その新しい API を使う新しいドライバが
+含まれるなら、それらは 2 つのパッチに分けてください。
+
+一方、多数のファイルに対して単一の変更を行う場合は、それらを
+1 つのパッチにまとめてください。つまり、1 つの論理的な変更は
+1 つのパッチに含めるべきです。
+
+覚えておくべき点は、各パッチがレビューアに理解しやすく、
+検証できる変更であるべきだということです。各パッチは、
+それ自体の妥当性で正当化できなければなりません。
+
+変更を完成させるために、あるパッチが別のパッチに依存するなら、
+それでも構いません。単に、パッチの説明に
+**"this patch depends on patch X"** と記してください。
+
+変更を一連のパッチに分ける際は、シリーズ中の各パッチを
+適用した後でも、カーネルが正しくビルドされ、正常に動作することを
+特に注意して確認してください。問題の追跡に ``git bisect`` を
+使う開発者は、あなたのパッチシリーズを任意の地点で分割する
+ことがあります。途中でバグを持ち込めば、彼らに感謝されることは
+ないでしょう。
+
+パッチセットをこれ以上小さくできないなら、一度に投稿するのは
+15 個程度までにして、レビューと統合を待ってください。
+
+
+変更のスタイルを確認する
+------------------------
+
+パッチに基本的なスタイル違反がないか確認してください。詳細は
+Documentation/process/coding-style.rst を参照してください。
+これを怠ると、単にレビューアの時間を無駄にするだけでなく、
+パッチはおそらく読まれもせずに却下されます。
+
+大きな例外が 1 つあります。コードをあるファイルから別の
+ファイルへ移動する場合です。このときは、コードを移動する
+その同じパッチの中で、移動したコードを一切変更してはいけません。
+そうすることで、コードの移動という行為と、あなたの変更とを
+明確に区別できます。これは実際の差分のレビューを大いに助け、
+ツールがコード自体の履歴をより適切に追跡できるようにします。
+
+提出前に、パッチスタイルチェッカー
+(``scripts/checkpatch.pl``) でパッチを確認してください。
+ただし、スタイルチェッカーは指針として見るべきであり、
+人間の判断に取って代わるものではないことに注意してください。
+違反があっても、その方がコードの見栄えがよいなら、
+そのままにしておくのが最善でしょう。
+
+チェッカーは 3 つのレベルで報告します:
+
+ - ERROR: 間違っている可能性が非常に高いもの
+ - WARNING: 慎重なレビューを要するもの
+ - CHECK: 検討を要するもの
+
+パッチに残した違反については、すべて理由を説明できなければ
+なりません。
+
+
+パッチの宛先を選択する
+----------------------
+
+各パッチでは、そのコードを保守する適切なサブシステムメンテナと
+メーリングリストを、必ず Cc に入れてください。誰がその
+メンテナかは、MAINTAINERS ファイルとソースコードの改訂履歴を
+調べて確認してください。この段階では ``scripts/get_maintainer.pl``
+が非常に役立ちます（パッチへのパスを引数として
+``scripts/get_maintainer.pl`` に渡してください）。作業中の
+サブシステムのメンテナが見つからない場合は、Andrew Morton
+(akpm@linux-foundation.org) が最後の手段となるメンテナです。
+
+すべてのパッチでは、デフォルトで linux-kernel@vger.kernel.org を
+使うべきですが、このリストの流量が多いため、目を通さなくなった
+開発者も少なくありません。とはいえ、無関係なメーリングリストや
+無関係な人々にスパムを送らないでください。
+
+カーネル関連のメーリングリストの多くは kernel.org で運営されており、
+その一覧は https://subspace.kernel.org で確認できます。ただし、
+他所で運営されているカーネル関連のメーリングリストもあります。
+
+Linux カーネルに採用されるすべての変更の最終的な裁定者は
+Linus Torvalds です。彼のメールアドレスは
+<torvalds@linux-foundation.org> です。Linus は大量のメールを
+受け取っており、現時点では彼に直接届くパッチはごくわずかなので、
+通常は彼にメールを送ることを極力避けてください。
+
+悪用可能なセキュリティバグを修正するパッチがあるなら、
+そのパッチを security@kernel.org に送ってください。深刻なバグに
+ついては、ディストリビュータがユーザーにパッチを配布できるよう、
+短期間の embargo が検討される場合があります。そのような場合、
+そのパッチを公開メーリングリストに送るべきではありません。
+Documentation/process/security-bugs.rst も参照してください。
+
+リリース済みカーネルの深刻なバグを修正するパッチは、次のような行を
+パッチの sign-off 欄に入れることで、stable メンテナへ向けてください::
+
+ Cc: stable@vger.kernel.org
+
+これはメールの受信者ではないことに注意してください。また、
+この文書に加えて Documentation/process/stable-kernel-rules.rst も
+読んでください。
+
+変更がユーザーランドとカーネルのインターフェースに影響する場合は、
+MAINTAINERS ファイルに記載されている MAN-PAGES メンテナに
+man-pages パッチ、少なくとも変更の通知を送って、情報が
+マニュアルページに反映されるようにしてください。ユーザー空間 API の
+変更は、linux-api@vger.kernel.org にも Cc してください。
--
2.47.3
^ permalink raw reply related
* Re: [PATCH 2/3] Documentation: security-bugs: explain what is and is not a security bug
From: Demi Marie Obenour @ 2026-05-02 6:27 UTC (permalink / raw)
To: Willy Tarreau
Cc: Greg KH, leon, security, Jonathan Corbet, skhan, workflows,
linux-doc, linux-kernel, Qubes Developer Mailing List
In-Reply-To: <afWUjN1FbIHIK99Z@1wt.eu>
[-- Attachment #1.1.1: Type: text/plain, Size: 5195 bytes --]
On 5/2/26 02:07, Willy Tarreau wrote:
> On Sat, May 02, 2026 at 01:51:08AM -0400, Demi Marie Obenour wrote:
>> On 5/2/26 01:35, Willy Tarreau wrote:
>>> Hi Demi Marie,
>>>
>>> On Sat, May 02, 2026 at 01:20:10AM -0400, Demi Marie Obenour wrote:
>>>>>>> Ah, but USB does cover "some" modification of devices, so this is going
>>>>>>> to be something that is good to document over time, if for no other
>>>>>>> reason to keep these scanning tools in check from hallucinating crazy
>>>>>>> situations that are obviously not a valid thing we care about.
>>>>>>
>>>>>> OK but does this mean you still want to get these reports in the end ?
>>>>>
>>>>> I want a patch if a user cares about that threat-model (as Android does
>>>>> but no one else) as it's up to the user groups that want to change the
>>>>> default kernel's behavior like this to actually submit patches to do so.
>>>> FYI, I don't think this is limited to Android. Chrome OS definitely
>>>> cares about malicious USB devices, and the whole purpose of USBGuard is
>>>> to prevent a USB device from being able to compromise the system unless
>>>> authorized. I believe Qubes OS also cares, as it supports USB device
>>>> assignment to virtual machines. CCing qubes-devel for confirmation.
>>>>
>>>> What should that patch look like? Could there be a way for these user
>>>> groups to be informed of vulnerabilities in the USB subsystem, so that
>>>> they can take responsibility for fixing them before they become public?
>>>
>>> I've posted a proposal elsewhere in the same thread:
>>>
>>> https://lore.kernel.org/lkml/afSxSX8RK0Z4kkOI@1wt.eu/
>>
>> I saw that, but it's still not quite clear what is meant here.
>> My understanding is that those concerned about malicious USB devices
>> are generally concerned about _arbitrary_ malicious USB devices.
>> The one thing a USB device shouldn't be able to spoof is the port
>> it is plugged into, and userspace tools like USBGuard can use that
>> information. But to do that, they have to trust that the device
>> can't harm the system if it isn't assigned to any drivers.
>
> The goal sought by that early document precisely is to draw the line
> between what is a regular bug and hwat is a kernel bug. The kernel
> currently doesn't consider problems posed by a crafted USB device as a
> security issue because the kernel trusts the hardware in runs on. Of
> course there can be valid reasons to disagree with this, but it's just
> the current situation and the purpose of the document is to clarify it
> so that bugs are reported to the right place and handled efficiently.
Fair. That does bring up the question of what those who want
to change that situation should do, and they definitely exist.
A documented path for them to follow (even if long and convoluted,
such as becoming co-maintainers of the subsystem) could be helpful.
I'd offer to help write something, but I suspect that this is
something that can only really be written by a member of the kernel
security team. Hence this request.
>>>> It does make sense for those who care about the security of a subsystem
>>>> to be responsible for vulnerabilities in that system, but right now
>>>> I'm not sure how one would offer to take up that responsibility.
>>>
>>> I think that at least some subsystems will want to add their own
>>> restrictions based on the bug reports they keep receiving, and I hope
>>> it can help distros figure where there's a gap between is promised to
>>> users and what the kernel promises, that needs to be filled by userland
>>> verification tools for example.
>>>
>>> Willy
>>
>> I think there might be another category, which is were there is a
>> third party who is much more interested in the security of a subsystem
>> than its primary maintainers are. I suspect that Google is said
>> third party in multiple such cases, especially various USB drivers.
>> In particular, exploiting the kernel via USB is a common attack
>> technique used in the wild by tools like Cellebrite.
>
> Possibly that such ones might appear there at some point. The best
> way for these might be to have such teams try to step up as
> co-maintainers for the parts they care about though.
Makes sense.
>> In these cases, I think it makes sense to funnel vulnerability
>> reports to the people who actually seriously care about fixing them.
>> For instance, problems in USB might be funneled to the Chrome OS and
>> Android security teams. They will get fixed much more quickly, and
>> upstream maintainers won't be flooded with reports that don't have
>> attached patches.
>
> Trust me, patches written behind closed doors rarely resist publication
> and discovery by the maintainer. And treating bugs as regular ones in
> fact tends to make them move faster than as security ones. No need to
> go back-and-forth asking for data that reporters hesitate to share, nor
> to have to first convince them that their bug needs to be fixed even
> though they were planning on speaking about them at a conference, etc.
That doesn't surprise me, actually.
--
Sincerely,
Demi Marie Obenour (she/her/hers)
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^ permalink raw reply
* Re: [PATCH v1] docs: Remove icn= ISDN parameter
From: Jonathan Corbet @ 2026-05-02 6:12 UTC (permalink / raw)
To: Jakub Kicinski
Cc: Costa Shulyupin, Shuah Khan, Andrew Morton, Borislav Petkov (AMD),
Randy Dunlap, Dave Hansen, Dapeng Mi, Kees Cook, Marco Elver,
Li RongQing, Eric Biggers, Paul E. McKenney, linux-doc,
linux-kernel
In-Reply-To: <20260501190546.27a6f8fb@kernel.org>
Jakub Kicinski <kuba@kernel.org> writes:
> On Fri, 1 May 2026 21:26:30 +0300 Costa Shulyupin wrote:
>> The ICN ISDN driver was removed in commit 02bbd9802da7
>> ("staging: i4l: delete the whole thing"), but the icn= kernel
>> parameter documentation was left behind.
>>
>> Assisted-by: Claude:claude-opus-4-6
>> Signed-off-by: Costa Shulyupin <costa.shul@redhat.com>
>
> Acked-by: Jakub Kicinski <kuba@kernel.org>
>
> Jon, since linux-doc got CCed I suppose it's most expedient for you to
> take this? LMK if you prefer us to handle it via netdev.
I'll pick it up, no worries.
Thanks,
jon
^ permalink raw reply
* [PATCH v2] scsi: st: fix typo in documentation
From: Wang Zihan @ 2026-05-02 6:07 UTC (permalink / raw)
To: Kai.Makisara; +Cc: linux-scsi, linux-doc, Wang Zihan
Correct "form" to "from" in drive buffers description.
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/scsi/st.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/scsi/st.rst b/Documentation/scsi/st.rst
index b4a092faa..539ff06da 100644
--- a/Documentation/scsi/st.rst
+++ b/Documentation/scsi/st.rst
@@ -93,7 +93,7 @@ optionally written. In both cases end of data is signified by
returning zero bytes for two consecutive reads.
Writing filemarks without the immediate bit set in the SCSI command block acts
-as a synchronization point, i.e., all remaining data form the drive buffers is
+as a synchronization point, i.e., all remaining data from the drive buffers is
written to tape before the command returns. This makes sure that write errors
are caught at that point, but this takes time. In some applications, several
consecutive files must be written fast. The MTWEOFI operation can be used to
--
2.54.0
^ permalink raw reply related
* [PATCH v2] dmaengine: dmatest: fix preposition error in documentation
From: Wang Zihan @ 2026-05-02 6:07 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine, linux-doc, Wang Zihan
Change "built-in in" to "built into".
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/driver-api/dmaengine/dmatest.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/driver-api/dmaengine/dmatest.rst b/Documentation/driver-api/dmaengine/dmatest.rst
index e2a63cefd..dafb84afd 100644
--- a/Documentation/driver-api/dmaengine/dmatest.rst
+++ b/Documentation/driver-api/dmaengine/dmatest.rst
@@ -108,7 +108,7 @@ Example::
% cat /sys/module/dmatest/parameters/wait
% modprobe -r dmatest
-Part 3 - When built-in in the kernel
+Part 3 - When built into the kernel
====================================
The module parameters that is supplied to the kernel command line will be used
--
2.54.0
^ permalink raw reply related
* [PATCH v2] net: switchdev: fix duplicate word in documentation
From: Wang Zihan @ 2026-05-02 6:07 UTC (permalink / raw)
To: kuba; +Cc: netdev, linux-doc, Wang Zihan
Remove duplicate "in" word.
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/networking/switchdev.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/networking/switchdev.rst b/Documentation/networking/switchdev.rst
index 2966b7122..948bce44c 100644
--- a/Documentation/networking/switchdev.rst
+++ b/Documentation/networking/switchdev.rst
@@ -162,7 +162,7 @@ The switchdev driver can know a particular port's position in the topology by
monitoring NETDEV_CHANGEUPPER notifications. For example, a port moved into a
bond will see its upper master change. If that bond is moved into a bridge,
the bond's upper master will change. And so on. The driver will track such
-movements to know what position a port is in in the overall topology by
+movements to know what position a port is in the overall topology by
registering for netdevice events and acting on NETDEV_CHANGEUPPER.
L2 Forwarding Offload
--
2.54.0
^ permalink raw reply related
* [PATCH v2] iio: adxl313: fix typos in documentation
From: Wang Zihan @ 2026-05-02 6:07 UTC (permalink / raw)
To: jic23; +Cc: linux-iio, linux-doc, Wang Zihan
Add missing space in "ADXL313is" and correct "a single types"
to "a single type".
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/iio/adxl313.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/iio/adxl313.rst b/Documentation/iio/adxl313.rst
index 966e72c01..3662153a6 100644
--- a/Documentation/iio/adxl313.rst
+++ b/Documentation/iio/adxl313.rst
@@ -11,7 +11,7 @@ This driver supports Analog Device's ADXL313 on SPI/I2C bus.
* `ADXL313 <https://www.analog.com/ADXL313>`_
-The ADXL313is a low noise density, low power, 3-axis accelerometer with
+The ADXL313 is a low noise density, low power, 3-axis accelerometer with
selectable measurement ranges. The ADXL313 supports the ±0.5 g, ±1 g, ±2 g and
±4 g ranges.
@@ -112,7 +112,7 @@ apply the following formula:
Where _offset and _scale are device attributes. If no _offset attribute is
present, simply assume its value is 0.
-The ADXL313 driver offers data for a single types of channels, the table below
+The ADXL313 driver offers data for a single type of channels, the table below
shows the measurement units for the processed value, which are defined by the
IIO framework:
--
2.54.0
^ permalink raw reply related
* Re: [PATCH 2/3] Documentation: security-bugs: explain what is and is not a security bug
From: Willy Tarreau @ 2026-05-02 6:07 UTC (permalink / raw)
To: Demi Marie Obenour
Cc: Greg KH, leon, security, Jonathan Corbet, skhan, workflows,
linux-doc, linux-kernel, Qubes Developer Mailing List
In-Reply-To: <a8e60dfe-2965-4a4b-89fb-ce5991395dc5@gmail.com>
On Sat, May 02, 2026 at 01:51:08AM -0400, Demi Marie Obenour wrote:
> On 5/2/26 01:35, Willy Tarreau wrote:
> > Hi Demi Marie,
> >
> > On Sat, May 02, 2026 at 01:20:10AM -0400, Demi Marie Obenour wrote:
> >>>>> Ah, but USB does cover "some" modification of devices, so this is going
> >>>>> to be something that is good to document over time, if for no other
> >>>>> reason to keep these scanning tools in check from hallucinating crazy
> >>>>> situations that are obviously not a valid thing we care about.
> >>>>
> >>>> OK but does this mean you still want to get these reports in the end ?
> >>>
> >>> I want a patch if a user cares about that threat-model (as Android does
> >>> but no one else) as it's up to the user groups that want to change the
> >>> default kernel's behavior like this to actually submit patches to do so.
> >> FYI, I don't think this is limited to Android. Chrome OS definitely
> >> cares about malicious USB devices, and the whole purpose of USBGuard is
> >> to prevent a USB device from being able to compromise the system unless
> >> authorized. I believe Qubes OS also cares, as it supports USB device
> >> assignment to virtual machines. CCing qubes-devel for confirmation.
> >>
> >> What should that patch look like? Could there be a way for these user
> >> groups to be informed of vulnerabilities in the USB subsystem, so that
> >> they can take responsibility for fixing them before they become public?
> >
> > I've posted a proposal elsewhere in the same thread:
> >
> > https://lore.kernel.org/lkml/afSxSX8RK0Z4kkOI@1wt.eu/
>
> I saw that, but it's still not quite clear what is meant here.
> My understanding is that those concerned about malicious USB devices
> are generally concerned about _arbitrary_ malicious USB devices.
> The one thing a USB device shouldn't be able to spoof is the port
> it is plugged into, and userspace tools like USBGuard can use that
> information. But to do that, they have to trust that the device
> can't harm the system if it isn't assigned to any drivers.
The goal sought by that early document precisely is to draw the line
between what is a regular bug and hwat is a kernel bug. The kernel
currently doesn't consider problems posed by a crafted USB device as a
security issue because the kernel trusts the hardware in runs on. Of
course there can be valid reasons to disagree with this, but it's just
the current situation and the purpose of the document is to clarify it
so that bugs are reported to the right place and handled efficiently.
> >> It does make sense for those who care about the security of a subsystem
> >> to be responsible for vulnerabilities in that system, but right now
> >> I'm not sure how one would offer to take up that responsibility.
> >
> > I think that at least some subsystems will want to add their own
> > restrictions based on the bug reports they keep receiving, and I hope
> > it can help distros figure where there's a gap between is promised to
> > users and what the kernel promises, that needs to be filled by userland
> > verification tools for example.
> >
> > Willy
>
> I think there might be another category, which is were there is a
> third party who is much more interested in the security of a subsystem
> than its primary maintainers are. I suspect that Google is said
> third party in multiple such cases, especially various USB drivers.
> In particular, exploiting the kernel via USB is a common attack
> technique used in the wild by tools like Cellebrite.
Possibly that such ones might appear there at some point. The best
way for these might be to have such teams try to step up as
co-maintainers for the parts they care about though.
> In these cases, I think it makes sense to funnel vulnerability
> reports to the people who actually seriously care about fixing them.
> For instance, problems in USB might be funneled to the Chrome OS and
> Android security teams. They will get fixed much more quickly, and
> upstream maintainers won't be flooded with reports that don't have
> attached patches.
Trust me, patches written behind closed doors rarely resist publication
and discovery by the maintainer. And treating bugs as regular ones in
fact tends to make them move faster than as security ones. No need to
go back-and-forth asking for data that reporters hesitate to share, nor
to have to first convince them that their bug needs to be fixed even
though they were planning on speaking about them at a conference, etc.
Cheers,
Willy
^ permalink raw reply
* [PATCH 4/4] scsi: st: fix typo in documentation
From: Wang Zihan @ 2026-05-02 5:59 UTC (permalink / raw)
To: Kai.Makisara; +Cc: linux-scsi, linux-doc, Wang Zihan
Correct "form" to "from" in drive buffers description.
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/scsi/st.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/scsi/st.rst b/Documentation/scsi/st.rst
index b4a092faa..539ff06da 100644
--- a/Documentation/scsi/st.rst
+++ b/Documentation/scsi/st.rst
@@ -93,7 +93,7 @@ optionally written. In both cases end of data is signified by
returning zero bytes for two consecutive reads.
Writing filemarks without the immediate bit set in the SCSI command block acts
-as a synchronization point, i.e., all remaining data form the drive buffers is
+as a synchronization point, i.e., all remaining data from the drive buffers is
written to tape before the command returns. This makes sure that write errors
are caught at that point, but this takes time. In some applications, several
consecutive files must be written fast. The MTWEOFI operation can be used to
--
2.54.0
^ permalink raw reply related
* [PATCH 3/4] dmaengine: dmatest: fix preposition error in documentation
From: Wang Zihan @ 2026-05-02 5:59 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine, linux-doc, Wang Zihan
Change "built-in in" to "built into".
Signed-off-by: Wang Zihan <jiyu03@qq.com>
---
Documentation/driver-api/dmaengine/dmatest.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/driver-api/dmaengine/dmatest.rst b/Documentation/driver-api/dmaengine/dmatest.rst
index e2a63cefd..dafb84afd 100644
--- a/Documentation/driver-api/dmaengine/dmatest.rst
+++ b/Documentation/driver-api/dmaengine/dmatest.rst
@@ -108,7 +108,7 @@ Example::
% cat /sys/module/dmatest/parameters/wait
% modprobe -r dmatest
-Part 3 - When built-in in the kernel
+Part 3 - When built into the kernel
====================================
The module parameters that is supplied to the kernel command line will be used
--
2.54.0
^ permalink raw reply related
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