* [3/3] arm64: dts: stratix10: add sdram ecc
@ 2018-04-24 18:35 thor.thayer
0 siblings, 0 replies; only message in thread
From: thor.thayer @ 2018-04-24 18:35 UTC (permalink / raw)
To: bp, mchehab, robh+dt, mark.rutland, dinguyen, catalin.marinas,
will.deacon
Cc: thor.thayer, devicetree, linux-arm-kernel, linux-edac
From: Thor Thayer <thor.thayer@linux.intel.com>
Add the Stratix10 ECC Manager and SDRAM EDAC nodes to the
device tree.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 76d5db4138b0..3a7da19216bb 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -924,6 +924,23 @@
status = "disabled";
};
+ eccmgr: eccmgr@ffd12000 {
+ compatible = "altr,socfpga-s10-ecc-manager";
+ altr,sysmgr-syscon = <&sysmgr>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupts = <0 15 4>, <0 95 4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ranges;
+
+ sdramedac@f8011100 {
+ compatible = "altr,sdram-edac-s10";
+ reg = <0xf8011100 0xC0>;
+ interrupts = <16 4>, <48 4>;
+ };
+ };
+
qspi: spi@ff8d2000 {
compatible = "cdns,qspi-nor";
#address-cells = <1>;
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