* [v2,4/4] arm64: zynqmp: Add DDRC node
@ 2018-08-02 12:34 Manish Narani
0 siblings, 0 replies; only message in thread
From: Manish Narani @ 2018-08-02 12:34 UTC (permalink / raw)
To: robh+dt, mark.rutland, catalin.marinas, will.deacon, michal.simek,
bp, mchehab, mdf, edgar.iglesias, shubhrajyoti.datta,
naga.sureshkumar.relli, bharat.kumar.gogada, stefan.krsmanovic
Cc: sgoud, anirudh, linux-kernel, devicetree, linux-arm-kernel,
linux-edac, Manish Narani
This patch adds ddrc memory controller node in dts. The size mentioned
in dts is 0x30000, because we need to access DDR_QOS INTR registers
located at fd090208 from this driver.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index a091e6f..7d6a3cf 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -355,6 +355,13 @@
xlnx,bus-width = <64>;
};
+ mc: memory-controller@fd070000 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd070000 0x0 0x30000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 112 4>;
+ };
+
gem0: ethernet@ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
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