From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v3,2/2] x86/mce: add CMCI support for Centaur CPUs From: Borislav Petkov Message-Id: <20180430094802.GF6509@pd.tnic> Date: Mon, 30 Apr 2018 11:48:02 +0200 To: David Wang Cc: tony.luck@intel.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, gregkh@linuxfoundation.org, x86@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, brucechang@via-alliance.com, cooperyan@zhaoxin.com, qiyuanwang@zhaoxin.com, benjaminpan@viatech.com, lukelin@viacpu.com, timguo@zhaoxin.com List-ID: T24gV2VkLCBBcHIgMjUsIDIwMTggYXQgMDY6MzM6NDBQTSArMDgwMCwgRGF2aWQgV2FuZyB3cm90 ZToKPiBOZXdlciBDZW50YXVyIHN1cHBvcnQgQ01DSSBtZWNobmlzbSwgd2hpY2ggaXMgY29tcGF0 aWJsZSB3aXRoIElOVEVMIENNQ0kuCj4gCj4gU2lnbmVkLW9mZi1ieTogRGF2aWQgV2FuZyA8ZGF2 aWR3YW5nQHpoYW94aW4uY29tPgo+IC0tLQo+ICBhcmNoL3g4Ni9rZXJuZWwvY3B1L21jaGVjay9t Y2UuYyB8IDIgKysKPiAgMSBmaWxlIGNoYW5nZWQsIDIgaW5zZXJ0aW9ucygrKQo+IAo+IGRpZmYg LS1naXQgYS9hcmNoL3g4Ni9rZXJuZWwvY3B1L21jaGVjay9tY2UuYyBiL2FyY2gveDg2L2tlcm5l bC9jcHUvbWNoZWNrL21jZS5jCj4gaW5kZXggMzhjY2FiOC4uZjlhNzI5NSAxMDA2NDQKPiAtLS0g YS9hcmNoL3g4Ni9rZXJuZWwvY3B1L21jaGVjay9tY2UuYwo+ICsrKyBiL2FyY2gveDg2L2tlcm5l bC9jcHUvbWNoZWNrL21jZS5jCj4gQEAgLTE3NTcsNiArMTc1Nyw4IEBAIHN0YXRpYyB2b2lkIF9f bWNoZWNrX2NwdV9pbml0X3ZlbmRvcihzdHJ1Y3QgY3B1aW5mb194ODYgKmMpCj4gIAkJfQo+ICAJ Y2FzZSBYODZfVkVORE9SX0NFTlRBVVI6Cj4gIAkJbWNlX2NlbnRhdXJfZmVhdHVyZV9pbml0KGMp Owo+ICsJCW1jZV9pbnRlbF9mZWF0dXJlX2luaXQoYyk7Cj4gKwkJbWNlX2FkanVzdF90aW1lciA9 IGNtY2lfaW50ZWxfYWRqdXN0X3RpbWVyOwoKVGhpcyB3b24ndCB3b3JrIGluIGNvbmZpZ3Mgd2l0 aCBDT05GSUdfWDg2X01DRV9JTlRFTCBkaXNhYmxlZC4KCllvdSBuZWVkIHRvIGRlZmluZSBDT05G SUdfWDg2X01DRV9DRU5UQVVSIG9yIHNvIHdoaWNoIGRlcGVuZHMgb24KQ09ORklHX0NQVV9TVVBf Q0VOVEFVUiBhbmQgQ09ORklHX1g4Nl9NQ0VfSU5URUwgYW5kIHdoaWNoIHRoZW4gbWFrZXMKc3Vy ZSB0aGUgaW50ZWwgQ01DSSBldCBhbCBzdHVmZiBpcyBlbmFibGVkLgo=