* [v3,4/4] dt-bindings: msm: Update documentation of qcom,llcc
@ 2018-08-29 0:42 Venkata Narendra Kumar Gutta
0 siblings, 0 replies; 2+ messages in thread
From: Venkata Narendra Kumar Gutta @ 2018-08-29 0:42 UTC (permalink / raw)
To: evgreen, robh, mchehab, linux-edac, linux-kernel, Andy Gross,
David Brown, linux-arm-msm, linux-soc, robh+dt, mark.rutland,
devicetree, tsoni, ckadabi, rishabhb, bp, swboyd
Cc: Venkata Narendra Kumar Gutta
Add reg-names and interrupts for LLCC documentation and the usage
examples. llcc broadcast base is added in addition to llcc base,
which is used for llcc broadcast writes.
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
---
.../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
index 5e85749..2e007dc 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
@@ -16,11 +16,26 @@ Properties:
- reg:
Usage: required
Value Type: <prop-encoded-array>
- Definition: Start address and the the size of the register region.
+ Definition: The first element specifies the llcc base start address and
+ the size of the register region. The second element specifies
+ the llcc broadcast base address and size of the register region.
+
+- reg-names:
+ Usage: required
+ Value Type: <stringlist>
+ Definition: Register region names. Must be "llcc_base", "llcc_bcast_base".
+
+- interrupts:
+ Usage: required
+ Definition: The interrupt is associated with the llcc edac device.
+ It's used for llcc cache single and double bit error detection
+ and reporting.
Example:
cache-controller@1100000 {
compatible = "qcom,sdm845-llcc";
- reg = <0x1100000 0x250000>;
+ reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
+ reg-names = "llcc_base", "llcc_bcast_base";
+ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [v3,4/4] dt-bindings: msm: Update documentation of qcom,llcc
@ 2018-08-29 12:48 Rob Herring
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2018-08-29 12:48 UTC (permalink / raw)
To: Venkata Narendra Kumar Gutta
Cc: evgreen, robh, mchehab, linux-edac, linux-kernel, Andy Gross,
David Brown, linux-arm-msm, linux-soc, robh+dt, mark.rutland,
devicetree, tsoni, ckadabi, rishabhb, bp, swboyd
On Tue, 28 Aug 2018 17:42:27 -0700, Venkata Narendra Kumar Gutta wrote:
> Add reg-names and interrupts for LLCC documentation and the usage
> examples. llcc broadcast base is added in addition to llcc base,
> which is used for llcc broadcast writes.
>
> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
> ---
> .../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +++++++++++++++++--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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