From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [4/5] EDAC/amd64: Support more than two Controllers for Chip Select handling
Date: Tue, 26 Feb 2019 14:24:16 +0100 [thread overview]
Message-ID: <20190226132416.GE14836@zn.tnic> (raw)
On Tue, Feb 19, 2019 at 08:26:09PM +0000, Ghannam, Yazen wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
>
> The struct chip_select array that's used for saving Chip Select bases
> and masks is fixed at length of two. There should be one struct
> chip_select for each controller, so this array should be increased to
> support systems that may have more than two controllers.
>
> Increase the size of the struct chip_select array to eight, which is the
> largest number of controllers per die currently supported on AMD
> systems.
>
> Also, carve out the Fam17h+ reading of the bases/masks into a separate
> function. This effectively reverts the original bases/masks reading code
> to pre-Fam17h support.
I like it simpler again. :-)
next reply other threads:[~2019-02-26 13:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-26 13:24 Borislav Petkov [this message]
-- strict thread matches above, loose matches on Subject: below --
2019-02-19 20:26 [4/5] EDAC/amd64: Support more than two Controllers for Chip Select handling Yazen Ghannam
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