From: Shiju Jose <shiju.jose@huawei.com>
To: <linux-edac@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <james.morse@arm.com>,
<bp@alien8.de>, <tony.luck@intel.com>, <rjw@rjwysocki.net>,
<lenb@kernel.org>, <rrichter@marvell.com>
Cc: <linuxarm@huawei.com>, <jonathan.cameron@huawei.com>,
<shiju.jose@huawei.com>
Subject: [RFC PATCH 2/4] ACPI: PPTT: Add function acpi_find_cache_info
Date: Thu, 5 Nov 2020 17:42:31 +0000 [thread overview]
Message-ID: <20201105174233.1146-3-shiju.jose@huawei.com> (raw)
In-Reply-To: <20201105174233.1146-1-shiju.jose@huawei.com>
Add function acpi_find_cache_info() to find the
information of the caches found in a CPU hierarchy
represented in the PPTT.
Co-developed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
drivers/acpi/pptt.c | 62 +++++++++++++++++++++++++++++++++++++++
include/linux/cacheinfo.h | 12 ++++++++
2 files changed, 74 insertions(+)
diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
index de1dd605d3ad..5f46e6257e6b 100644
--- a/drivers/acpi/pptt.c
+++ b/drivers/acpi/pptt.c
@@ -670,6 +670,68 @@ int acpi_find_last_cache_level(unsigned int cpu)
return number_of_levels;
}
+/**
+ * acpi_find_cache_info() - Find the information of CPU caches
+ * represented in the PPTT.
+ * @cpu: Kernel logical CPU number.
+ * @cacheinfo: array of struct acpi_cacheinfo.
+ * @size: dimension of the array.
+ *
+ * Given a logical CPU number, returns the info of caches
+ * represented in the PPTT.
+ * Errors caused by lack of a PPTT table, or otherwise, return 0
+ * indicating we didn't find any cache levels.
+ *
+ * Return: total number of caches found in the CPU hierarchy or error.
+ */
+int acpi_find_cache_info(unsigned int cpu, struct acpi_cacheinfo *cacheinfo,
+ size_t size)
+{
+ u32 acpi_cpu_id;
+ acpi_status status;
+ struct acpi_table_header *table_hdr;
+ struct acpi_pptt_processor *cpu_node = NULL;
+ struct acpi_pptt_cache *found_cache;
+ int i, number_of_caches = 0;
+ int max_level, level = 1;
+ enum cache_type type[] = {
+ CACHE_TYPE_DATA,
+ CACHE_TYPE_INST,
+ CACHE_TYPE_UNIFIED,
+ };
+
+ if (!cacheinfo || !size)
+ return -ENOMEM;
+
+ status = acpi_get_table(ACPI_SIG_PPTT, 0, &table_hdr);
+ if (ACPI_FAILURE(status)) {
+ acpi_pptt_warn_missing();
+ return -ENOENT;
+ }
+
+ acpi_cpu_id = get_acpi_id_for_cpu(cpu);
+ max_level = acpi_find_cache_levels(table_hdr, acpi_cpu_id);
+ while (level <= max_level) {
+ for (i = 0; i < ARRAY_SIZE(type); i++) {
+ found_cache = acpi_find_cache_node(table_hdr, acpi_cpu_id,
+ type[i], level, &cpu_node);
+ if (found_cache) {
+ cacheinfo[number_of_caches].level = level;
+ cacheinfo[number_of_caches].type = acpi_cache_type(type[i]);
+ number_of_caches++;
+ if (number_of_caches >= size) {
+ acpi_put_table(table_hdr);
+ return -ENOMEM;
+ }
+ }
+ }
+ level++;
+ }
+ acpi_put_table(table_hdr);
+
+ return number_of_caches;
+}
+
/**
* cache_setup_acpi() - Override CPU cache topology with data from the PPTT
* @cpu: Kernel logical CPU number
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 4f72b47973c3..7d37945d2650 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -79,6 +79,11 @@ struct cpu_cacheinfo {
bool cpu_map_populated;
};
+struct acpi_cacheinfo {
+ u8 level;
+ u8 type;
+};
+
/*
* Helpers to make sure "func" is executed on the cpu whose cache
* attributes are being detected
@@ -114,8 +119,15 @@ static inline int acpi_find_last_cache_level(unsigned int cpu)
{
return 0;
}
+static inline int acpi_find_cache_info(unsigned int cpu, struct acpi_cacheinfo *cacheinfo,
+ size_t size)
+{
+ return 0;
+}
#else
int acpi_find_last_cache_level(unsigned int cpu);
+int acpi_find_cache_info(unsigned int cpu, struct acpi_cacheinfo *cacheinfo,
+ size_t size);
#endif
const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf);
--
2.17.1
next prev parent reply other threads:[~2020-11-05 18:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 17:42 [RFC PATCH 0/4] EDAC/ghes: Add EDAC device for recording the CPU error count Shiju Jose
2020-11-05 17:42 ` [RFC PATCH 1/4] ACPI: PPTT: Fix for a high level cache node detected in the low level Shiju Jose
2020-11-06 19:33 ` James Morse
2020-11-09 12:27 ` Jonathan Cameron
2020-11-09 15:59 ` Shiju Jose
2020-11-05 17:42 ` Shiju Jose [this message]
2020-11-05 17:42 ` [RFC PATCH 3/4] EDAC/ghes: Add EDAC device for the CPU caches Shiju Jose
2020-11-05 17:42 ` [RFC PATCH 4/4] ACPI / APEI: Add reporting ARM64 CPU cache corrected error count Shiju Jose
2020-11-06 19:33 ` [RFC PATCH 0/4] EDAC/ghes: Add EDAC device for recording the CPU " James Morse
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