Re: [PATCH v6 2/3] dt-bindings: edac: nuvoton: add NPCM memory controller

Medad Young
2022-04-11T08:01:43Z

Dear Paul,

thanks for your comments

Paul Menzel <pmenzel@molgen.mpg.de> 於 2022年4月9日 週六 下午2:12寫道：
>
> Dear Medad,
>
>
> Thank you for your patch.
>
> Am 22.03.22 um 04:01 schrieb Medad CChien:
> > Added device tree binding documentation for Nuvoton BMC
> > NPCM memory controller.
>
> Please use present tense, and spell *devicetree* without a space. The
> line below even fits in 75 characters:
>
> Document devicetree bindings for the Nuvoton BMC NPCM memory controller.

OK

>
> > Signed-off-by: Medad CChien <ctcchien@nuvoton.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > ---
> > .../edac/nuvoton,npcm-memory-controller.yaml | 62 +++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
> > new file mode 100644
> > index 000000000000..97469294f4ba
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
> > @@ -0,0 +1,62 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/edac/nuvoton,npcm-memory-controller.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Nuvoton NPCM Memory Controller
> > +
> > +maintainers:
> > + - Medad CChien <ctcchien@nuvoton.com>
> > +
> > +description: |
> > + The Nuvoton BMC SoC supports DDR4 memory with and without ECC (error
> > + correction check).
> > +
> > + The memory controller supports single bit error correction, double bit
> > + error detection (in-line ECC in which a section (1/8th) of the
> > + memory device used to store data is used for ECC storage).
>
> *memory* fits on the line above?

do you mean I should change the term "memory" to others?

>
> > +
> > + Note, the bootloader must configure ECC mode for the memory controller.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - nuvoton,npcm845-memory-controller
> > + - nuvoton,npcm750-memory-controller
>
> Sort the entries?

OK

>
>
> Kind regards,
>
> Paul
>
>
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + minItems: 1
> > + items:
> > + - description: uncorrectable error interrupt
> > + - description: correctable error interrupt
> > +
> > + interrupt-names:
> > + minItems: 1
> > + items:
> > + - const: ue
> > + - const: ce
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + ahb {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + mc: memory-controller@f0824000 {
> > + compatible = "nuvoton,npcm750-memory-controller";
> > + reg = <0x0 0xf0824000 0x0 0x1000>;
> > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > + };
> > +