From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Borislav Petkov <bp@alien8.de>
Cc: andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, tony.luck@intel.com,
quic_saipraka@quicinc.com, konrad.dybcio@linaro.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
james.morse@arm.com, mchehab@kernel.org, rric@kernel.org,
linux-edac@vger.kernel.org, quic_ppareek@quicinc.com,
luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org
Subject: Re: [PATCH v5 16/17] qcom: llcc/edac: Support polling mode for ECC handling
Date: Wed, 18 Jan 2023 20:38:44 +0530 [thread overview]
Message-ID: <20230118150844.GB4690@thinkpad> (raw)
In-Reply-To: <Y8Up1kjaIRLlxemH@zn.tnic>
On Mon, Jan 16, 2023 at 11:41:26AM +0100, Borislav Petkov wrote:
> On Sun, Jan 15, 2023 at 09:38:25AM +0530, Manivannan Sadhasivam wrote:
> > > You need to request the IRQ first and then set edac_op_state above. I.e., this
> > > devm_request_irq() needs to move in the if (ecc_irq > 0) branch above.
> >
> > May I know why? I also checked other drivers, most of them are doing the same.
>
> If the others do it, that doesn't mean it is clean.
>
> What happens to edac_op_state if devm_request_irq() fails?
>
> I know I know, the probe function will fail and the driver won't load but still,
> this is sloppy. And it could come down to bite us later, when someone
> reorganizes that function.
>
OK. I just wanted to know the reasoning behind it.
Thanks,
Mani
> So, do all the error checking method determination - polling or interrupt - in
> one place. Something like this (totally untested ofc, pasting here the whole
> thing to show what I mean):
>
> static int qcom_llcc_edac_probe(struct platform_device *pdev)
> {
> struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data;
> struct edac_device_ctl_info *edev_ctl;
> struct device *dev = &pdev->dev;
> int ecc_irq;
> int rc;
>
> rc = qcom_llcc_core_setup(llcc_driv_data->bcast_regmap);
> if (rc)
> return rc;
>
> /* Allocate edac control info */
> edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank",
> llcc_driv_data->num_banks, 1,
> NULL, 0,
> edac_device_alloc_index());
>
> if (!edev_ctl)
> return -ENOMEM;
>
> edev_ctl->dev = dev;
> edev_ctl->mod_name = dev_name(dev);
> edev_ctl->dev_name = dev_name(dev);
> edev_ctl->ctl_name = "llcc";
> edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE;
>
> /* Check if LLCC driver has passed ECC IRQ */
> ecc_irq = llcc_driv_data->ecc_irq;
> if (ecc_irq > 0) {
> rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler,
> IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl);
> if (!rc) {
> edac_op_state = EDAC_OPSTATE_INT;
> goto irq_done;
> }
> }
>
> /* Fall back to polling mode otherwise */
> edev_ctl->poll_msec = ECC_POLL_MSEC;
> edev_ctl->edac_check = llcc_ecc_check;
> edac_op_state = EDAC_OPSTATE_POLL;
>
> irq_done:
> rc = edac_device_add_device(edev_ctl);
> if (rc) {
> edac_device_free_ctl_info(edev_ctl);
> return rc;
> }
>
> platform_set_drvdata(pdev, edev_ctl);
>
> return rc;
> }
>
> --
> Regards/Gruss,
> Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2023-01-18 15:08 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 8:40 [PATCH v5 00/17] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 01/17] EDAC/device: Make use of poll_msec value in edac_device_ctl_info struct Manivannan Sadhasivam
2022-12-28 11:17 ` Borislav Petkov
2022-12-28 8:40 ` [PATCH v5 02/17] EDAC/qcom: Add platform_device_id table for module autoloading Manivannan Sadhasivam
2022-12-28 11:54 ` Borislav Petkov
2022-12-28 8:40 ` [PATCH v5 03/17] EDAC/qcom: Do not pass llcc_driv_data as edac_device_ctl_info's pvt_info Manivannan Sadhasivam
2022-12-28 11:58 ` Borislav Petkov
2022-12-28 8:40 ` [PATCH v5 04/17] dt-bindings: arm: msm: Update the maintainers for LLCC Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 05/17] dt-bindings: arm: msm: Fix register regions used for LLCC banks Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 06/17] arm64: dts: qcom: sdm845: Fix the base addresses of " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 07/17] arm64: dts: qcom: sc7180: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 08/17] arm64: dts: qcom: sc7280: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 09/17] arm64: dts: qcom: sc8280xp: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 10/17] arm64: dts: qcom: sm8150: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 11/17] arm64: dts: qcom: sm8250: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 12/17] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 13/17] arm64: dts: qcom: sm8450: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 14/17] arm64: dts: qcom: sm6350: " Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 15/17] qcom: llcc/edac: Fix the base address used for accessing " Manivannan Sadhasivam
2023-01-14 13:27 ` Borislav Petkov
2023-01-15 4:01 ` Manivannan Sadhasivam
2022-12-28 8:40 ` [PATCH v5 16/17] qcom: llcc/edac: Support polling mode for ECC handling Manivannan Sadhasivam
2023-01-14 13:36 ` Borislav Petkov
2023-01-15 4:08 ` Manivannan Sadhasivam
2023-01-16 10:41 ` Borislav Petkov
2023-01-18 15:08 ` Manivannan Sadhasivam [this message]
2022-12-28 8:40 ` [PATCH v5 17/17] soc: qcom: llcc: Do not create EDAC platform device on SDM845 Manivannan Sadhasivam
2022-12-28 10:36 ` [PATCH v5 00/17] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Borislav Petkov
2022-12-28 16:47 ` Manivannan Sadhasivam
2022-12-28 17:55 ` Borislav Petkov
2023-01-02 17:30 ` Manivannan Sadhasivam
2023-01-14 7:12 ` Manivannan Sadhasivam
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