From: Hristo Venev <hristo@venev.name>
To: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: Borislav Petkov <bp@alien8.de>,
linux-edac@vger.kernel.org, Hristo Venev <hristo@venev.name>
Subject: [PATCH] EDAC/amd64: Add support for ECC on family 19h model 60h-6Fh
Date: Tue, 25 Apr 2023 23:12:39 +0300 [thread overview]
Message-ID: <20230425201239.324476-1-hristo@venev.name> (raw)
Ryzen 9 7950X uses model 61h. Treat it as Epyc 9004, but with 2 channels
instead of 12.
I tested this with two 32GB dual-rank DIMMs. The sizes appear to be
reported correctly:
[ 2.122750] EDAC MC0: Giving out device to module amd64_edac controller F19h_M60h: DEV 0000:00:18.3 (INTERRUPT)
[ 2.122751] EDAC amd64: F19h_M60h detected (node 0).
[ 2.122754] EDAC MC: UMC0 chip selects:
[ 2.122754] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 2.122755] EDAC amd64: MC: 2: 16384MB 3: 16384MB
[ 2.122757] EDAC MC: UMC1 chip selects:
[ 2.122757] EDAC amd64: MC: 0: 0MB 1: 0MB
[ 2.122758] EDAC amd64: MC: 2: 16384MB 3: 16384MB
[ 2.122759] AMD64 EDAC driver v3.5.0
ECC errors can also be detected:
[ 313.747594] mce: [Hardware Error]: Machine check events logged
[ 313.747597] [Hardware Error]: Corrected error, no action required.
[ 313.747613] [Hardware Error]: CPU:0 (19:61:2) MC21_STATUS[Over|CE|MiscV|AddrV|-|-|SyndV|CECC|-|-|-]: 0xdc2040000400011b
[ 313.747632] [Hardware Error]: Error Addr: 0x00000007ff7e93c0
[ 313.747639] [Hardware Error]: IPID: 0x0000009600050f00, Syndrome: 0x000100010a801203
[ 313.747652] [Hardware Error]: Unified Memory Controller Ext. Error Code: 0, DRAM ECC error.
[ 313.747669] EDAC MC0: 1 CE Cannot decode normalized address on mc#0csrow#3channel#0 (csrow:3 channel:0 page:0x0 offset:0x0 grain:64 syndrome:0x1)
[ 313.747672] [Hardware Error]: cache level: L3/GEN, tx: GEN, mem-tx: RD
Signed-off-by: Hristo Venev <hristo@venev.name>
---
drivers/edac/amd64_edac.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index b55129425c81..1080784e2784 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3816,6 +3816,10 @@ static int per_family_init(struct amd64_pvt *pvt)
case 0x50 ... 0x5f:
pvt->ctl_name = "F19h_M50h";
break;
+ case 0x60 ... 0x6f:
+ pvt->ctl_name = "F19h_M60h";
+ pvt->flags.zn_regs_v2 = 1;
+ break;
case 0xa0 ... 0xaf:
pvt->ctl_name = "F19h_MA0h";
pvt->max_mcs = 12;
--
2.40.0
next reply other threads:[~2023-04-25 20:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-25 20:12 Hristo Venev [this message]
2023-05-09 14:53 ` [PATCH] EDAC/amd64: Add support for ECC on family 19h model 60h-6Fh Yazen Ghannam
2023-05-10 23:42 ` Limonciello, Mario
2023-05-11 13:02 ` Yazen Ghannam
2023-05-11 17:45 ` Hristo Venev
2023-05-15 14:27 ` Borislav Petkov
2023-05-11 17:45 ` [PATCH v2] EDAC/amd64: Add support for ECC on family 19h model 60h-7Fh Hristo Venev
2023-05-11 17:58 ` Limonciello, Mario
2023-05-15 14:39 ` Borislav Petkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230425201239.324476-1-hristo@venev.name \
--to=hristo@venev.name \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=yazen.ghannam@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox